Prosecution Insights
Last updated: October 26, 2026
Application No. 18/972,423

MEMORY DEVICE SUPPORTING EXTENDED ROW HAMMER REFERESH OPERATION AND OPERATION METHOD THEREOF

Final Rejection §112
Filed
Dec 06, 2024
Priority
Dec 06, 2023 — RE 10-2023-0176033 +1 more
Examiner
TECHANE, MUNA A
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
2 (Final)
94%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 94% — above average
94%
Career Allowance Rate
538 granted / 575 resolved
+33.6% vs TC avg
Moderate +6% lift
Without
With
+6.5%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 9m
Avg Prosecution
14 currently pending
Career history
589
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
27.2%
-12.8% vs TC avg
§102
32.2%
-7.8% vs TC avg
§112
20.1%
-19.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 575 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-7, 9,11-14,16 & 18-24 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claims 1 & 23-24, the limitations cite “a plurality of count cells, each configured to store row hammer count data associated with a number of times a corresponding row of the plurality of rows is accessed; and a plurality of extended count cells, each configured to store information about at least one of extended row hammer count data associated with the number of times the corresponding row of the plurality of rows is accessed or a number of times a row hammer refresh operation is executed on the corresponding row of the plurality of rows”, it is unclear how the plurality of counts cells and the plurality of extended count cells are different from each other when both the counts cells and the extended counts cells are part of the plurality of memory cells that is included in at least one bank? A clear distinguish needs between the plurality counts cells are different from the plurality extended counts cells need to be made. Please see FIGs 14-17 and amend accordingly. The same rejection to claims 23 & 24 applies and make any required analogous changes in the dependent claims. Claims 2-7, 9, 11-14, 16 & 18 are rejected because of their dependency to the rejected base claim 1. Response to Arguments Applicant’s arguments, see Remark sections pages 4-6 , filed 08/06/26, with respect to the rejection(s) of claim(s) of 1-20 under 112(b) rejection have been fully considered but they are not persuasive. the applicant has stated that in page 5 “Moreover, Applicant submits that the claims distinguish count cells from extended count cells through their different functional configurations. In particular, the extended count cells store a number of times a row hammer refresh operation is executed on the corresponding row that is not recited for the regular count cells. A person of ordinary skill in the art would readily understand from the claim language alone that these are two functionally distinct types of storage elements”. In response to the arguments presented above by the applicant, the examiner respectfully disagreed. For example, the examiner clearly has distinguished in the rejection of claims 1 & 23-24 that, it is unclear how the plurality of counts cells and the plurality of extended count cells are different from each other when both the counts cells and the extended counts cells are part of the plurality of memory cells that is included in at least one bank? Unless a clear distinguish between those two operations has been identified, the rejection under 112(b) is maintained. Please amend the limitations cited as “a plurality of extended count cells, each configured to store information about at least one of extended row hammer count data associated with the number of times the corresponding row of the plurality of rows is accessed or a number of times a row hammer refresh operation is executed on the corresponding row of the plurality of rows” to: “a plurality of extended count cells, each configured to store information about at least one of extended row hammer count data associated with the number of times the corresponding row of the plurality of rows is accessed and a number of times a row hammer refresh operation is executed on the corresponding row of the plurality of rows”, in order to overcome the current rejection. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Shore et al (US20200251158 FIG 1; [0012 & 0064-0073] discloses memory device 100, BANK0-N comprising memory cells MCs, plurality of rows in one direction, count cells (126, 226, 326), counter memory cells storing bits representing an access count for that row. Based on the threshold value, e.g., if the value is below the Vt, the value is incremented, and the value is written back to the counter memory cells of the access row, if it is greater, the currently accessed row in an aggressor row e.g., reset value). Kim et al (US20230185460 FIG 3; [0006] discloses control circuit controls a row hammer circuit, performs a normal write operation to write data in normal cells in each of the plurality of memory cell row during the first time interval and performs an internal write operation to write an updated count data in counts cell curing a second write time interval). Cho et al (US11955159 FIG 1; col 5, lines 57-63 discloses row hammer circuit 500 counting a number of times of access of memory cell rows to store the counted values in each plurality of memory cell rows as count data). You et al (US20220383935 FIG 1-3; [0049-0050] discloses Banks 1-4, register 310 allocating address, counter 314 storing access address for activating memory cell rows). Nale et al (US20210365316 FIG 1; Abstract and [0018] discloses memory chips array storing a count value of row activations, counter cell that keeps a count of the number of times a particular row has been activated since last refresh operation and updating value back in the counter cells by increments). THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUNA A TECHANE whose telephone number is (571)272-7856. The examiner can normally be reached 571-272-7856. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at 571-272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MUNA A TECHANE/Primary Examiner, Art Unit 2827
Read full office action

Prosecution Timeline

Dec 06, 2024
Application Filed
May 08, 2026
Non-Final Rejection mailed — §112
Jun 04, 2026
Interview Requested
Jul 02, 2026
Applicant Interview (Telephonic)
Jul 02, 2026
Examiner Interview Summary
Aug 06, 2026
Response Filed
Oct 05, 2026
Final Rejection mailed — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
94%
Grant Probability
99%
With Interview (+6.5%)
1y 9m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 575 resolved cases by this examiner. Grant probability derived from career allowance rate.

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