Prosecution Insights
Last updated: April 19, 2026
Application No. 18/973,159

PREMATURE INCOMING PACKET PROCESSING

Non-Final OA §DP
Filed
Dec 09, 2024
Examiner
CYGIEL, GARY W
Art Unit
2137
Tech Center
2100 — Computer Architecture & Software
Assignee
Next Silicon Ltd.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
3y 4m
To Grant
86%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
405 granted / 533 resolved
+21.0% vs TC avg
Moderate +10% lift
Without
With
+9.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
20 currently pending
Career history
553
Total Applications
across all art units

Statute-Specific Performance

§101
5.1%
-34.9% vs TC avg
§103
42.4%
+2.4% vs TC avg
§102
29.2%
-10.8% vs TC avg
§112
17.0%
-23.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 533 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,164,793. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the instant patent are anticipated by the claims of the reference patent. Allowable Subject Matter Claims 1-20 include allowable subject matter. The following is a statement of reasons for the indication of allowable subject matter: The prior art discloses systems and methods for receiving pointers associated with incoming packets, initializing memory sections, monitoring content of a memory region, determining that a packet segment was written by identifying changes to a memory section, and subsequently processing the incoming packet (see, e.g., GUTIERREZ ¶0023.). The prior art additionally describes the speculative processing of a packet to identify the value of selected fields (see, e.g., HERRERA Fig 3;Col 6:60-7:38). Therefore, the primary reason for the allowance of the claims in this case, is the inclusion of the specific packet storage processing details including initializing a memory section in the memory block with a predefined data pattern, initiating a plurality of speculative execution threads each according to a respective one of a plurality of valid values of a field contained in the incoming packet, detecting a change in the content of the memory section, and determining an actual value of the field in the incoming packet after detecting the change, as are now included in all the independent claims, in combination with the other elements recited, which is not found or fairly obviated by the prior art of record. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. [A] Najam et al. (NPL: Speculative parallel pattern matching using stride-k DFA for deep packet inspection) – describes systems and methods for speculatively processing subsets of a packet in parallel (NAJAM, e.g., page 81 §5). Any inquiry concerning this communication or earlier communications from the examiner should be directed to Gary W Cygiel whose telephone number is (571)270-1170. The examiner can normally be reached Monday - Thursday 11am-3pm PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan P Savla can be reached at (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Gary W. Cygiel/Primary Examiner, Art Unit 2137
Read full office action

Prosecution Timeline

Dec 09, 2024
Application Filed
Dec 23, 2025
Non-Final Rejection — §DP
Apr 06, 2026
Response Filed

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12602176
COMPUTING DEVICE AND METHOD THEREOF
2y 5m to grant Granted Apr 14, 2026
Patent 12596505
COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN INFORMATION PROCESSING PROGRAM, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING APPARATUS
2y 5m to grant Granted Apr 07, 2026
Patent 12591519
MEMORY DEVICE AND OPERATING METHOD THEREOF
2y 5m to grant Granted Mar 31, 2026
Patent 12591368
VIRTUALIZED-IN-HARDWARE INPUT OUTPUT MEMORY MANAGEMENT
2y 5m to grant Granted Mar 31, 2026
Patent 12579086
DATA STORAGE WITH LOW COST DIES
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
86%
With Interview (+9.7%)
3y 4m
Median Time to Grant
Low
PTA Risk
Based on 533 resolved cases by this examiner. Grant probability derived from career allow rate.

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