DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kumar (US 2009/0243665).
Regarding claim 20, fig. 3 of Kumar discloses a semiconductor device comprising: a target circuit [212-218] including a plurality of elements [212-218], and connected to a first power node supplying a first power voltage [VDD] and a reference node supplying a reference voltage [ground], lower than the first power voltage; and a bias voltage generation circuit [110, 225] configured to output a first bias voltage [from between 291 and 292 to gate of 214] and a second bias voltage [from between 293 and 294 to gate of 216], input to a gate of each of some elements among the plurality of elements, wherein the bias voltage generation circuit includes a plurality of transistors [291-294] connected between the first power node and the reference node, and a plurality of capacitors [274-277] connected to some transistors, among the plurality of transistors, connected in sequence from the reference node.
Allowable Subject Matter
Claims 1-19 are allowed.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim describes an output driving circuit for generating output voltages. Lu describes an amplifier and multi-channel amplifying system. Nguyen describes a high voltage stage for a switching regulator.
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/SIBIN CHEN/Primary Examiner, Art Unit 2896
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