DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1 to 17 are presented for examination.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119, which papers have been placed of record in the file.
Information Disclosure Statement
The references listed in the information disclosure statement submitted on 12-9-2024 have been considered by the examiner (see attached PTO-1449).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 11, 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Kifune et al. (USPAP 2020/0301777).
Claims 1, 16 and 17:
Kifune substantially teaches the claimed invention. Kifune teaches a memory system comprising a controller (10) and a non-volatile memory (20) (see fig. 1 and par. 0016). Kifune teaches that the nonvolatile memory stores a codeword encoded by low density parity check code (see par. 0032). Kifune teaches that the memory controller includes a host interface (15) for communicating a request received from the host (see par. 0023).
Kifune teaches that data read from the nonvolatile memory is decoded by a decoder based on a reading voltage and a likelihood information of the read data (see par. 0044). Kifune teaches that the decoder (202b) performs soft decoding on the data read from the memory based on the reading voltage (see fig. 4 and par. 0042 and 0087). Kifune teaches that if all errors are not corrected then decoder 202a performs hard decision decoding on the read data and the value received from decoder 202b (see par. 0057 and 0089).
Kifune fails to specifically teach the limitation of: “estimate a third readout voltage based on reliability degree information indicating a reliability degree of the decoding processing;” however, this teaching is obvious to the teachings of Kifune because Kifune teaches that a memory system for improve correction ability of soft decision decoding includes a plurality of reading voltages shifted to lower and higher sides from the reference voltage and that an absolute value of the LLR indicates reliability of the bit data.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the claimed memory system to include using a plurality of reading voltages and having a higher or lower reliability as taught by Kifune because Kifune teaches a memory system for improved correction ability utilizes a plurality of reading voltages and high or low reliability. This modification would have been obvious because a person of ordinary skill in the art would have been motivated to employ a memory system having multiple reading voltages for providing an improved correcting ability of soft decision decoding as taught by Kifune (see par. 0093).
As per claim 3, Kifune teaches that a probability for determining that the decoding is performed correctly evaluates that the bit (1-th bit) is “1” or ‘0” (see par. 0057 to 0060).
As per claim 11, Kifune teaches that a bit value indicating “1” or “0” read by using the reference reading voltage is referred to hard bit (HB) and a memory storing both HB data and indexes as well as soft bit (SB) data and indexes (see par. 0046 et seq.).
Allowable Subject Matter
Claims 2, 4 to 10 and 12 to 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Sakurada et al. (USPAP 2015/0256201) discloses a memory control method, memory controller and storage device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHELLY A CHASE whose telephone number is (571)272-3816. The examiner can normally be reached Mon-Thu 8:00-5:30, 2nd Friday 8:00-4:30.
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/Shelly A Chase/ Primary Examiner, Art Unit 2112
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