Prosecution Insights
Last updated: September 29, 2026
Application No. 18/974,255

METHOD AND DEVICE FOR OPTIMIZING AN AUDIO PRODUCT

Non-Final OA §102
Filed
Dec 09, 2024
Priority
Dec 13, 2023 — IN 202341084983
Examiner
PATEL, YOGESHKUMAR G
Art Unit
Tech Center
Assignee
Harman International Industries Incorporated
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
566 granted / 678 resolved
+23.5% vs TC avg
Minimal +3% lift
Without
With
+3.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
18 currently pending
Career history
683
Total Applications
across all art units

Statute-Specific Performance

§101
5.1%
-34.9% vs TC avg
§103
68.6%
+28.6% vs TC avg
§102
12.2%
-27.8% vs TC avg
§112
11.6%
-28.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 678 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 08/05/2026 was filed after the mailing date of the Notice of Allowance on 06/05/2026 and Fees paid on 08/05/2026. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Objections Claim 1 is objected to because of the following informalities: Claim 1 recites “generating a plurality of memory allocations, each of the plurality of memory allocations, assigning each data block of each audio object to one of the plurality of memories”. A “comma” after “allocations” should be removed. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 12, and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hegde et al. (WO #2023/196918, used US PGPUB #2025/0238359). Regarding Claim 1, Hegde discloses a computer-implemented method for optimizing an audio product (¶0035 discloses the audio system has a framework that is populated with audio modules. Each audio module contains a distinct piece of audio processing logic to instruct an amplifier in the audio system to perform a function), wherein the audio product comprises a plurality of audio objects implemented on a processing device (¶0029 discloses for example, an object, such as an audio module in a multi-channel audio system, has memory types and sizes) comprising a plurality of memories each having a latency level (¶0026 discloses the CPU 108 has internal memory 110 that is divided into levels, L1 112, L2 114 to Ln 116, (where n depends on processor architecture), that are intended to be used in a manner that minimizes time for memory access. This is referred to as local memory, and as described above, the levels are differentiated by size and speed of access. Memory on the CPU 108 is typically accessed faster than external memory such as program memory 104 and data memory 106. Level L1 112 may be considered the fastest and level Ln 116 may be considered the slowest. Level L2 114 is slower than level L1 112 but faster than level Ln 116), wherein each of the plurality of audio objects requires storage capacity for at least one data block (¶0038 discloses the first core 402 has a first audio module 406 and a second audio module 408. The first audio module has three memory blocks 414a, 414b, and 414c. Each audio module may have multiple memory blocks, and each memory block may have a configurable memory latency. The memory latency 416 is selected, by the user, at the drop-down menu. Each memory block 414a, 414b, 414c defines an area of memory which requires allocation for the audio module 406), the method comprising: generating a plurality of memory allocations, each of the plurality of memory allocations[[,]] assigning each data block of each audio object to one of the plurality of memories (Hegde ¶0040 discloses once generated the configuration data is sent 316 to the audio system over the communication protocol, thereby creating a change to an allocation strategy without having to modify code and/or ref/ash the audio system), determining for at least one of the plurality of memory allocations a respective workload associated with a respective memory allocation including: configuring the plurality of audio objects according to the respective memory allocation (Hegde ¶0038 discloses the first core 402 has a first audio module 406 and a second audio module 408. The first audio module has three memory blocks 414a, 414b, and 414c. Each audio module may have multiple memory blocks, and each memory block may have a configurable memory latency. The memory latency 416 is selected, by the user, at the drop-down menu. Each memory block 414a, 414b, 414c defines an area of memory which requires allocation for the audio module 406), executing the audio product comprising the plurality of configured audio objects on the processing device (Hegde ¶0041 discloses each audio module 502 is shown with its consumption levels in the form of an average MIPS 504 and a maximum MIPS 506. The information presented in the consumption guide 500 provides the user with valuable feedback and information about resource consumption of the DSP as memory placement requests are sent to the computing device by the user), and determining the respective workload of the processing device during execution of the audio product, and selecting one of the plurality of memory allocations as an optimized memory allocation based on the plurality of respective workloads (Hegde ¶0042 discloses an allocator on the computing device of the audio system allocates 322 memory placements in accordance with the configuration data and the memory capacity of the DSP and system performance is checked at the computing device. The results are presented at the GUI as a results profile of CPU consumption data [per audio module) and actual memory allocation (which is audio system dependent]. The memory placement allocated by the allocator is then visible 324 on the GUI where the user can see a visual representation of the individual memory blocks and their latency). Claims 12 and 20 are rejected for the same reasons as set forth in Claim 1. Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Masuda (US #2007/0022416). Regarding Claim 1, Masuda discloses a computer-implemented method for optimizing an audio product, wherein the audio product comprises a plurality of audio objects implemented on a processing device (¶0165 discloses the application program may be used to playback a music video. In this case, the processing to decrypt the encrypted content, and the processing to play back the music is essential processing, so the importance of the data objects [say "data object M" and "data object N''] required for this processing will be "1") comprising a plurality of memories each having a latency level (¶0062 discloses the fast memory 1500 and the slow memory 1600 are memories with different access speeds. Refer to figs. 1, 2, 4 and 6), wherein each of the plurality of audio objects requires storage capacity for at least one data block (¶0154 discloses the data size 2412 expresses a data length of the data object indicated by the data name 2411. For instance, a data object with the data name 2411 "data object M" corresponds to a data size 2412 of "4 KB". That means, the "data object M" is four-kilobyte data), the method comprising: generating a plurality of memory allocations, each of the plurality of memory allocations, assigning each data block of each audio object to one of the plurality of memories (Masuda ¶0083 discloses the memory allocation pattern information 1310 is stored in the memory allocation pattern storage unit 1300. There may be more than one piece of allocation pattern information. Each memory secured by the application program 1200 may have a corresponding piece of allocation pattern information), determining for at least one of the plurality of memory allocations a respective workload associated with a respective memory allocation (Masuda ¶0085 discloses the memory allocation pattern information 1310 indicates a plurality of memory allocation patterns each specifying amounts of fast memory 1500 and slow memory 1600. These amounts are determined in advance using simulation or the like, and enable the application program to achieve a prescribed level of performance without wasting memory resources) including: configuring the plurality of audio objects according to the respective memory allocation (Masuda ¶0165 discloses for instance, the application program may be used to playback a music video. In this case, the processing to decrypt the encrypted content, and the processing to play back the music is essential processing, so the importance of the data objects [say "data object M" and "data object N''] required for this processing will be "1 ". However, the processing to play back the video content is not essential, so the importance of data ["data object O''] used in this processing is "0.8". Furthermore, the data ["data object P''] used in processing to display text data for the lyrics or the like has a low importance of "0.5". Operation), executing the audio product comprising the plurality of configured audio objects on the processing device (Masuda ¶0085 discloses these amounts are determined in advance using simulation or the like, and enable the application program to achieve a prescribed level of performance without wasting memory resources), and determining the respective workload of the processing device during execution of the audio product (Masuda ¶0077 discloses the memory allocation pattern determining unit 1110 calculates the amount of memory that can be allocated to the application program 1200 based on current use of the memory resources and expected further use by the execution device 1000, and selects the memory allocation pattern on the basis of the calculated amount), and selecting one of the plurality of memory allocations as an optimized memory allocation based on the plurality of respective workloads (Masuda ¶0076 discloses the memory allocation pattern determining unit 1110 functions to secure memory resources in response to a memory request from the application program 1200, and to return the start address of the allocated memory and the memory allocation pattern used to allocate the memory). Claims 12 and 20 are rejected for the same reasons as set forth in Claim 1. Regarding Claim 2, Masuda discloses the method of claim 1, wherein the respective workloads are determined consecutively for the at least one of the plurality of memory allocations (Masuda ¶0083 discloses the memory allocation pattern information 1310 is stored in the memory allocation pattern storage unit 1300. There may be more than one piece of allocation pattern information. Each memory secured by the application program 1200 may have a corresponding piece of allocation pattern information). Regarding Claim 3, Masuda discloses the method of claim 1, wherein the respective workloads are determined consecutively for the at least one of the plurality of memory allocations until at least one of the respective workloads meets a predefined workload threshold (Masuda ¶0085 discloses the memory allocation pattern information 1310 indicates a plurality of memory allocation patterns each specifying amounts of fast memory 1500 and slow memory 1600. These amounts are determined in advance using simulation or the like, and enable the application program to achieve a prescribed level of performance without wasting memory resources). Regarding Claim 4, Masuda discloses the method of claim 1, wherein the respective workload is defined as a relationship between a performance required for executing the audio product on the processing device with respect to a maximum performance of the processing device (Masuda ¶0085 discloses the memory allocation pattern information 1310 indicates a plurality of memory allocation patterns each specifying amounts of fast memory 1500 and slow memory 1600. These amounts are determined in advance using simulation or the like, and enable the application program to achieve a prescribed level of performance without wasting memory resources). Regarding Claim 5, Masuda discloses the method of claim 1, wherein executing the audio product on the processing device comprises applying a predefined signal to be processed by the processing device (Masuda ¶0165 discloses the application program may be used to playback a music video. In this case, the processing to decrypt the encrypted content, and the processing to play back the music is essential processing, so the importance of the data objects [say "data object M" and "data object N''] required for this processing will be "1"). Regarding Claim 6, Masuda discloses the method of claim 1, wherein each of the plurality of memories comprises an external memory which is coupled to a processor of the processing device (Masuda ¶0062 discloses the slow memory 1600 may be DRAM [Dynamic RAM]) or an internal cache memory of the processor (Masuda ¶0120 discloses since is generally the case the speed of access to slow memory is increased using cache memory, improving the cache hit rates enables an increase in the processing speed of the program). Regarding Claim 7, Masuda discloses the method of claim 1, wherein the processing device comprises at least one of a digital signal processor or a general purpose processor (Masuda ¶0080 discloses part or all of the various processing performed by the application execution control unit 1100 and other units is realized by a CPU. ¶0008 discloses DSP). Regarding Claim 8, Masuda discloses the method of claim 1, wherein each audio object comprises instructions for processing an audio signal when being executed on the processing device (Masuda ¶0153 discloses the data name 2411 indicates the names of data objects used by the application program 2200, and acts as in identifier. Whether the instructions are associated within the data object or a program is considered to be an implementation detail). Regarding Claim 9, Masuda discloses the method of claim 1, wherein each of the plurality of memory allocations is generated based on a size of each of the data blocks and a size of each of the plurality of memories (Masuda ¶0123 discloses the overall amount of required memory is variable, an advantageous effect is archived that a wider variety of devices is able to run the application program). Regarding Claim 10, Masuda discloses the method of claim 1, wherein the plurality of memory allocations comprises at least one or more different memory allocations that assign a particular data block of a particular audio object to one or more different memories with one or more different latency levels (Masuda ¶0085 discloses the memory allocation pattern information 1310 indicates a plurality of memory allocation patterns each specifying amounts of fast memory 1500 and slow memory 1600; fig. 2). Regarding Claim 11, Masuda discloses the method of claim 1, wherein the plurality of memory allocations comprises all possible combinations of assignments of data blocks of the audio objects to memories having different latency levels, wherein each combinations of assignments of data blocks is based on at least a size of each of the plurality of memories and a size of each of the data blocks (Masuda ¶0085 discloses the memory allocation pattern information 1310 indicates a plurality of memory allocation patterns each specifying amounts of fast memory 1500 and slow memory 1600. These amounts are determined in advance using simulation or the like, and enable the application program to achieve a prescribed level of performance without wasting memory resources). Claims 13-19 are rejected for the same reasons as set forth in Claims 2-11. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to YOGESHKUMAR G PATEL whose telephone number is (571)272-3957. The examiner can normally be reached 7:30 AM-4 PM PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Duc Nguyen can be reached at (571) 272-7503. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YOGESHKUMAR PATEL/Primary Examiner, Art Unit 2691
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Prosecution Timeline

Dec 09, 2024
Application Filed
Jul 31, 2026
Applicant Interview (Telephonic)
Aug 05, 2026
Request for Continued Examination
Aug 08, 2026
Response after Non-Final Action
Aug 17, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
87%
With Interview (+3.2%)
2y 3m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 678 resolved cases by this examiner. Grant probability derived from career allowance rate.

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