DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
2.The Information Disclosure Statement filed on 12/10/2024 has been considered.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
For claim 1,
a. the first electro-optical conversion unit to modulate…on lines 4,5;
b. the second electro-optical conversion unit to modulate…on lines 7,8.
For claim 4,
a. the first electro-optical conversion unit outputs an optical signal…on lines 3,4.
For claim 6,
a. the photoelectric conversion unit being used to perform photoelectric conversion…on lines 6-8.
For claim 8,
a. a multiplication unit, configured to multiply…on lines 3-5.
For claim 9,
a. a second multiplication unit, configured to multiply…on lines 3-5.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
a. the first electro-optical conversion unit is a Directly Modulated Laser (DML) or an External Modulated or an IQ modulator, see paragraph 39 and figures 2A, 2B, 2C, 2D and 2E
b. the second electro-optical conversion unit is an MZ-type modulator (MZM), or an electro absorption modulator (EAM) or a phase modulator (PM) or an amplitude modulator (such as an MZ-type modulator (MZM) or an electro absorption modulator (EAM)) and a phase modulator (PM) are connected in series.
c. The photoelectric conversion unit is a single detector (PD), see paragraph 63 and figures 4C and 4D.
d. the photoelectric multiplier shown in FIG. 4A to FIG. 4D, see paragraph 62.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1 and 2 are rejected under 35 USC 103 as being unpatentable over JP et al;(JP 4744720 B2) in view of Tang et al; (US 12659044).
Regarding claim 1, JP discloses an apparatus for determining signal correlation,(multi-level signal modulation apparatus for determining signal correlation, see figure 7) comprising: to input a first signal to a first electro-optical conversion unit, to enable the first electro-optical conversion unit to modulate to-be-modulated light according to the first signal and to obtain a to-be-measured signal;(the optical modulation signal generating means driving circuit 37 drives the optical modulation signal generating means 10 in amplitude modulation in accordance with one transmission signal input from the input terminal 35, see paragraph 67 and figure 7) input a second signal to a second electro-optical conversion unit, to enable the second electro-optical conversion unit to modulate to-be-modulated light according to the second signal;(the optical modulation signal generator drive circuit 38 drives the optical modulation signal generator 11 in amplitude modulation according to the other transmission signal input from the input terminal 36, see paragraph 68), and to obtain a correlation signal ;(the mixer 45 performs multiplication processing of one transmission signal input from the delay device 41 and the electric signal converted by the optical / electrical conversion means 44, that is, obtains a correlation between two input signals, see paragraph 70 and figure 7) determine a product signal of the to-be-measured signal and the correlation signal via a photoelectric method or an optical method; (the mixer 46 multiplies the other transmission signal input from the delay device 42 and the electrical signal converted by the optical / electrical conversion means 44, that is, obtains a correlation between the two input signals, see paragraph 71 and figure 7) and determine correlation of the to-be-measured signal and the correlation signal by performing an electrical average operation on the product signal (the mixer 45 and 46(digital integrator or analog integrator) performs multiplication processing of one transmission signal input from the delay device 41,42 and the electric signal converted by the optical / electrical conversion means 44, that is, obtains a correlation between two input signals, see paragraph 70,71,77 and figure 7)
However, JP does not explicitly disclose a memory; and a processor coupled to the memory.
In a related field of Tang discloses a memory; and a processor coupled to the memory ;(Digital signal processor (DSP), see figure 2).
Thus, it would be obvious for one of the ordinary skilled in the art before the effective filling date of the invention to combine the processor of Tang with JP to process the input signal data and optical signal and the motivation is to provide processing of the input data and/or optical signal.
Regarding claim 2, JP discloses the apparatus according to claim 1, wherein the first electro-optical conversion unit is a transmitter, or a partial modulation unit of a transmitter; (the optical modulation signal generating means 10 in amplitude modulation, see paragraph 67 and figure 7).
Claim 3 is rejected under 35 USC 103 as being unpatentable over JP et al;(JP 4744720 B2) in view of Tang et al; (US 12659044) and further in view of Lozsef et al; (US 2022/0190926).
Regarding claim 3, the combination of JP and Tang does not explicitly disclose the apparatus according to claim 1, wherein the second electro-optical conversion unit outputs a finite number of states.
In a related filed of endeavor, Lozsef discloses the apparatus according to claim 1, wherein the second electro-optical conversion unit outputs a finite number of states ;( optical transmitter, with the control logic 430 could be implemented as a finite state machine (FSM), see paragraph 35 and figure 4).
Thus, it would be obvious for one of the ordinary skilled in the art before the effective filling date of the invention to combine the Finite State Machine of Lozsef with JP and Tang to change from one finite state to another based on the input signal and the motivation is to provide an output state based on the input.
Claim 10 is rejected under 35 USC 103 as being unpatentable over JP et al;(JP 4744720 B2).
Regarding claim 10, JP discloses a method for determining signal correlation,(multi-level signal modulation apparatus for determining signal correlation, see figure 7) comprising: inputting a first signal to a first electro-optical conversion unit, to enable the first electro-optical conversion unit to modulate to-be-modulated light according to the first signal and to obtain a to-be-measured signal; ;(the optical modulation signal generating means driving circuit 37 drives the optical modulation signal generating means 10 in amplitude modulation in accordance with one transmission signal input from the input terminal 35, see paragraph 67 and figure 7) inputting a second signal to a second electro-optical conversion unit, to enable the second electro-optical conversion unit to modulate to-be-modulated light according to the input second signal;(the optical modulation signal generator drive circuit 38 drives the optical modulation signal generator 11 in amplitude modulation according to the other transmission signal input from the input terminal 36, see paragraph 68), and to obtain a correlation signal ;(the mixer 45 performs multiplication processing of one transmission signal input from the delay device 41 and the electric signal converted by the optical / electrical conversion means 44, that is, obtains a correlation between two input signals, see paragraph 70 and figure 7) determining a product signal of the to-be-measured signal and the correlation signal via a photoelectric method or an optical method; (the mixer 46 multiplies the other transmission signal input from the delay device 42 and the electrical signal converted by the optical / electrical conversion means 44, that is, obtains a correlation between the two input signals, see paragraph 71 and figure 7) and determining correlation of the to-be-measured signal and the correlation signal (the mixer 45 and 46(digital integrator or analog integrator) performs multiplication processing of one transmission signal input from the delay device 41,42 and the electric signal converted by the optical / electrical conversion means 44, that is, obtains a correlation between two input signals, see paragraph 70,71,77 and figure 7). However, JP does not explicitly disclose by performing an electrical average operation on the product signal. But it would be obvious for one of the ordinary skilled in the art digital integrator or an analog integrator can be use as an alternative to a mixer for obtaining correlation between the two signals, see paragraph 77 and the motivation is to accumulate the correlation value over time.
Allowable Subject Matter
3. Claims 4-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
4. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is reproduced below.
a. Sugihara et al; (US 2011/0013907) discloses multi-value optical transmitter in which DC bias can be controlled to be stabilized so as to obtain stable optical transmission signal quality in multi-value modulation using a dual-electrode MZ modulator by compensating deviation of DC bias from optimum value, see figure 1.
b. Mehjabin et al; (Experimental demonstration of the hybrid opto-electronic correlator for target recognition – March 2017 attached) discloses hybrid opto-electronic correlator (HOC) with a continuous-wave diode pumped solid-state laser (Verdi V2) with a 532 nm wavelength and after passing through a spatial filter and a lens, the expanded beam is split into two paths using a 50–50 beam splitter (BS). One path is used for retrieving the images, and the other path is used to create the phase stabilization and scanning circuit (PSSC), to produce the reference and query images, see figure 1.
c. Aikawa (Optical Comparison Operation for 8-bit QPSK Modulated signal by using serially cascaded Delay line Interferometer – August 2018 attached) discloses an optical comparator for an 8-bit quadrature phase shift keying signal, see figure 1.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMRITBIR K SANDHU whose telephone number is (571)270-1894. The examiner can normally be reached M-F 9am to 5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kenneth Vanderpuye can be reached at 571-272-3078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/AMRITBIR K SANDHU/ Primary Examiner, Art Unit 2634
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