Prosecution Insights
Last updated: October 01, 2026
Application No. 18/975,413

POWER SUPPLY AND CONTROLLER

Non-Final OA §103
Filed
Dec 10, 2024
Priority
Aug 22, 2024 — TW 113131674
Examiner
LEE, JYE-JUNE
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Chicony Power Technology Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
393 granted / 463 resolved
+16.9% vs TC avg
Minimal +4% lift
Without
With
+3.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
38 currently pending
Career history
494
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
48.8%
+8.8% vs TC avg
§102
36.4%
-3.6% vs TC avg
§112
11.6%
-28.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 463 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This action is in response to the application filed on 12/10/2024. Information Disclosure Statement The information disclosure statements (IDS) submitted on 12/10/2024 and 06/09/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Appropriate correction is required. Claim Objections Claim 13 is objected to because of the following informalities: Regarding claim 13, in line 2, “respectively have a body diode” appears that it should read as “respectively have body diodes”;in line 2, “a cathode of the body diode of the third switch and the fourth switch faces the coupled output port” appears that it should read as “cathodes of the body diodes of the third switch and the fourth switch respectively face each respective coupled output port”. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-9, 12, and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US Patent Application Publication US 2022/0350388 A1, hereinafter “Lin”) in view of Ma et al. (Chinese Patent CN 220043035 U, hereinafter “Ma”), and further in view of Perry et al. (US Patent Application Publication US 2020/0303939 A1, hereinafter “Perry”). Regarding claim 1, Lin discloses (see Fig. 1A) a power supply (the multiport USB power adaptor 100) comprising: an input port that receives an input voltage (the AC input received by the flyback-converter 102); a plurality of output ports (the USB ports 112a and 112b); a first conversion circuit that converts the input voltage into a first voltage (the flyback-converter 102 that outputs the voltage VIN, see [0030] of Lin “The flyback-converter 102 is operable to receive and convert a first AC or DC voltage to a second DC voltage”); a second conversion circuit coupled to the first conversion circuit and converting the first voltage into a second voltage (the buck-circuit 104a/104b that outputs the target voltage VOUT_C, see [0030] of Lin “Each of the buck-circuits 104a, 104b, coupled between the flyback-converter 102 and one of the USB ports 112a, 112b, are operable by the buck-controller 110 to receive an input voltage (VIN) from the flyback-converter and to output a target voltage (VOUT_C1, or VOUT_C2) to one of the USB ports”); and a control circuit (the USB controller 108 having the USB-PD subsystem 111), wherein when a first output port (the USB port 112a) completes a first power supply negotiation the control circuit connects the first conversion circuit to the first output port (see [0055] of Lin “the USB-PD subsystem enables the associated, first bypass-circuit (step 710), and controls VIN to equal the target voltage (VOUT_C) for the first port (step 712)”), and wherein before the first power supply negotiation is completed the second conversion circuit does not output the second voltage (see [0046] of Lin “If no device is detected, the USB port is disabled (step 406). If a device is connected, i.e., the first port is active, the buck-controller(s) associated with the first port is enabled and operated to supply a requested VOUT_C to the USB port”). Lin does not disclose a first switching circuit, coupled to the first conversion circuit and the output ports; and a second switching circuit, coupled to the second conversion circuit and the output ports. However, Ma teaches (see Fig. 4) a first switching circuit (the first switch K1 and the third switch K3), coupled to the first conversion circuit (the power supply terminal 211) and the output ports (the first output port 240 and the second output port 250) (see [0031] of Ma “The first switch K1 is coupled between the first output port 240 and the power supply terminal 211”; see [0032] of Ma “The third switch K3 is coupled between the second output port 250 and the power supply terminal 211”); and a second switching circuit (the second switch K2 and the fourth switch K4), coupled to the second conversion circuit (the output terminal 222) and the output ports (the first output port 240 and the second output port 250) (see [0031] of Ma “The second switch K2 is coupled between the first output port 240 and the output terminal 222”; see [0032] of Ma “The fourth switch K4 is coupled between the second output port 250 and the output terminal 222”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin to include a first switching circuit and a second switching circuit coupled to the first and second conversion circuits and the output ports, as taught by Ma, because it can couple each output port to one of the power supply terminal and the conversion circuit output through a switch (see [0071] of Ma “the first output port 240 and the second output port 250 may be simultaneously coupled to the power supply terminal 211 or the output terminal 222 of the voltage conversion circuit 220 via a switch so that the first output port 240 and the second output port 250 can output the same voltage”). Lin in view of Ma does not disclose that before the first power supply negotiation is completed, the first switching circuit disconnects the first conversion circuit from the output ports. However, Perry teaches (see Fig. 1) that before the first power supply negotiation is completed (during negotiation and before the charging voltage is established), the first switching circuit (the switch circuit 116) disconnects the first conversion circuit (the converter 101 at the power input terminal 109) from the output ports (the power output terminals 110) (see [0040] of Perry “the logic circuit 114 generates the switching control signals SC to disconnect all the respective charging power lines and the power output terminals 110 from the power input terminal 109 during negotiation and adjustment of the converter 101 according to the voltage select signal VSEL, and changes the switching control signals SC to selectively couple selected ones of the power output terminals 110 to the power input terminal 109 once the selected charging voltage has been established by the converter 101”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin in view of Ma so that the first switching circuit disconnects the first conversion circuit from the output ports before the first power supply negotiation is completed, as taught by Perry, because it can establish a connection to a port only after a charging voltage has been negotiated (see [0019] of Perry “reducing the size, cost and complexity of multi-port charges that have two or more converters”). Regarding claim 2, Lin discloses (see Fig. 7) wherein when a second output port (the USB port 112b) completes a second power supply negotiation, the control circuit controls the second conversion circuit to output or not to output the second voltage according to a comparison between a first voltage level (the requested VOUT_C1) corresponding to the first power supply negotiation and a second voltage level (the requested VOUT_C2) corresponding to the second power supply negotiation (see [0052] of Lin “enable the bypass circuit 106a or 106b associated with one of the USB ports 112a or 112b requesting the higher VOUT_C to provide a VOUT_C equal to VIN, and to enable and operate the buck-controller 110 and buck-circuit 104a or 104b associated with the other USB port to provide the requested, lower VOUT_C”). Regarding claim 3, Lin discloses (see Fig. 9) wherein when the first voltage level (the requested VOUT_C1) is the same as the second voltage level (the requested VOUT_C2), the second conversion circuit (the buck-circuit 104a/104b) does not output the second voltage (see [0053] of Lin “if the requested VOUT_C1 and requested VOUT_C2 are the same the USB-PD subsystem 111 of the USB controller 108 would control the flyback-converter 102 to provide a VIN equal to the requested VOUT_C1 and VOUT_C2 and then enable both bypass-circuits 106a and 106b”). Regarding claim 4, Lin discloses (see Fig. 7) wherein when the first voltage level (the requested VOUT_C1) is different from the second voltage level (the requested VOUT_C2), the second conversion circuit (the buck-circuit 104a/104b) outputs the second voltage (see [0056] of Lin “the USB-PD subsystem enables and operates the buck-circuit associated with the port to provide the target VOUT_C to port (step 716)”). Regarding claim 5, Lin does not disclose wherein when the first voltage level is greater than the second voltage level, the second switching circuit connects the second conversion circuit to the second output port. However, Ma teaches (see Fig. 4) wherein when the first voltage level is greater than the second voltage level (the first output port 240 demanding the higher voltage), the second switching circuit (the fourth switch K4) connects the second conversion circuit (the output terminal 222) to the second output port (the second output port 250) (see [0048] of Ma “The control circuit 260 obtains the first voltage feedback information and the second voltage feedback information to couple one of the first output port 240 and the second output port 250 with the higher demand voltage to the power supply terminal 211 and one of the lower demand voltage to the output terminal 222”; see [0032] of Ma “The fourth switch K4 is coupled between the second output port 250 and the output terminal 222”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin to connect the second conversion circuit to the second output port through the second switching circuit when the first voltage level is greater than the second voltage level, as taught by Ma, because it allows the lower-voltage second conversion output to be routed to the lower-demand output port (see [0071] of Ma “the voltages of the first output port 240 and the second output port 250 are different to be able to charge devices of different charging voltages”). Regarding claim 6, Lin does not disclose wherein when the first voltage level is less than the second voltage level, the control circuit controls the first switching circuit to disconnect the first conversion circuit from the first output port and connect the first conversion circuit to the second output port, and controls the second switching circuit to disconnect the second conversion circuit from the second output port and connect the second conversion circuit to the first output port. However, Ma teaches (see Fig. 4) wherein when the first voltage level is less than the second voltage level (the second output port 250 demanding the higher voltage), the control circuit (the control circuit 260) controls the first switching circuit to disconnect the first conversion circuit from the first output port and connect the first conversion circuit to the second output port (coupling the power supply terminal 211 to the second output port 250), and controls the second switching circuit to disconnect the second conversion circuit from the second output port and connect the second conversion circuit to the first output port (coupling the output terminal 222 to the first output port 240) (see [0048] of Ma “The control circuit 260 obtains the first voltage feedback information and the second voltage feedback information to couple one of the first output port 240 and the second output port 250 with the higher demand voltage to the power supply terminal 211 and one of the lower demand voltage to the output terminal 222”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin to control the first and second switching circuits to swap the connections of the first and second conversion circuits between the output ports according to the comparison of the voltage levels, as taught by Ma, because it allows whichever output port requires the higher voltage to be coupled to the first conversion circuit while the other output port is coupled to the second conversion circuit (see [0071] of Ma “the voltages of the first output port 240 and the second output port 250 are different to be able to charge devices of different charging voltages”). Regarding claim 7, Lin discloses (see Fig. 1C) wherein the first voltage (the voltage VIN output by the flyback-converter 102) is greater than the second voltage (the target voltage VOUT_C output by the buck-circuit 104a/104b) (see [0040] of Lin “The buck-circuit 104a/104b is capable of providing an output voltage from 0V to just below VIN”). Regarding claim 8, Lin discloses (see Fig. 1C) wherein the second conversion circuit comprises a voltage regulating switch (the switching element 152) coupled to a conversion path (the path through the inductor 156) between the first conversion circuit and the second switching circuit, the voltage regulating switch being kept off such that the second conversion circuit does not output the second voltage and performing a switching operation such that the second conversion circuit outputs the second voltage (see [0040] of Lin “When switching element 152 is on and switching element 154 is off, energy is stored in the inductor. When switching element 152 is off and switching element 154 is on, energy is sent to capacitor 158 to output voltage”). Regarding claim 9, Lin does not disclose wherein the first switching circuit comprises a first switch and a second switch, the first switch being located on a first path between the first conversion circuit and one of the output ports, and the second switch being located on a second path between the first conversion circuit and another of the output ports. However, Ma teaches (see Fig. 4) wherein the first switching circuit comprises a first switch (K1) and a second switch (K3), the first switch (K1) being located on a first path (the path coupling the power supply terminal 211 to the first output port 240) between the first conversion circuit (the power supply terminal 211) and one of the output ports (the first output port 240) (see [0031] of Ma “The first switch K1 is coupled between the first output port 240 and the power supply terminal 211”), and the second switch (K3) being located on a second path (the path coupling the power supply terminal 211 to the second output port 250) between the first conversion circuit (211) and another of the output ports (the second output port 250) (see [0032] of Ma “The third switch K3 is coupled between the second output port 250 and the power supply terminal 211”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin to provide the first switching circuit with a first switch and a second switch on respective paths between the first conversion circuit and the output ports, as taught by Ma, because it allows the first conversion circuit to be selectively coupled to either output port (see [0071] of Ma “the first output port 240 and the second output port 250 may be simultaneously coupled to the power supply terminal 211 or the output terminal 222 of the voltage conversion circuit 220 via a switch so that the first output port 240 and the second output port 250 can output the same voltage”). Regarding claim 12, Lin does not disclose wherein the second switching circuit comprises a third switch and a fourth switch, the third switch being located on a third path between the second conversion circuit and the output port coupled to the first path, and the fourth switch being located on a fourth path between the second conversion circuit and the output port coupled to the second path. However, Ma teaches (see Fig. 4) wherein the second switching circuit comprises a third switch (K2) and a fourth switch (K4), the third switch (K2) being located on a third path (the path coupling the output terminal 222 to the first output port 240) between the second conversion circuit (the output terminal 222) and the output port coupled to the first path (the first output port 240) (see [0031] of Ma “The second switch K2 is coupled between the first output port 240 and the output terminal 222”), and the fourth switch (K4) being located on a fourth path (the path coupling the output terminal 222 to the second output port 250) between the second conversion circuit (222) and the output port coupled to the second path (the second output port 250) (see [0032] of Ma “The fourth switch K4 is coupled between the second output port 250 and the output terminal 222”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin to provide the second switching circuit with a third switch and a fourth switch on respective paths between the second conversion circuit and the output ports, as taught by Ma, because it allows the second conversion circuit to be selectively coupled to either output port (see [0071] of Ma “the voltages of the first output port 240 and the second output port 250 are different to be able to charge devices of different charging voltages”). Regarding claim 16, Lin discloses (see Fig. 7) a controller (the USB controller 108 having the USB-PD subsystem 111) applicable to a power supply (the multiport USB power adaptor 100) comprising a first conversion circuit (the flyback-converter 102), a second conversion circuit (the buck-circuit 104a/104b), a first switching circuit, a second switching circuit and a plurality of output ports (the USB ports 112a and 112b), the controller performing a power supplying method comprising: carrying out a first power supply negotiation with a first output port (the USB port 112a); when the first power supply negotiation is completed, controlling the first conversion circuit to output a first voltage (the voltage VIN) and controlling the first switching circuit to connect the first conversion circuit to the first output port (see [0055] of Lin “the USB-PD subsystem enables the associated, first bypass-circuit (step 710), and controls VIN to equal the target voltage (VOUT_C) for the first port (step 712)”); and before the first power supply negotiation is completed, controlling the second conversion circuit not to output a second voltage (the target voltage VOUT_C) (see [0046] of Lin “If no device is detected, the USB port is disabled (step 406). If a device is connected, i.e., the first port is active, the buck-controller(s) associated with the first port is enabled and operated to supply a requested VOUT_C to the USB port”). Lin does not disclose a first switching circuit, a second switching circuit, and before the first power supply negotiation is completed, controlling the first switching circuit to disconnect the first conversion circuit from the output ports. However, Ma teaches (see Fig. 4) a first switching circuit (the first switch K1 and the third switch K3) coupled to the first conversion circuit (the power supply terminal 211) and the output ports, and a second switching circuit (the second switch K2 and the fourth switch K4) coupled to the second conversion circuit (the output terminal 222) and the output ports (see [0031] of Ma “The first switch K1 is coupled between the first output port 240 and the power supply terminal 211”; see [0032] of Ma “The fourth switch K4 is coupled between the second output port 250 and the output terminal 222”). Perry further teaches (see Fig. 1) before the first power supply negotiation is completed, controlling the first switching circuit (the switch circuit 116) to disconnect the first conversion circuit (the converter 101 at the power input terminal 109) from the output ports (the power output terminals 110) (see [0040] of Perry “the logic circuit 114 generates the switching control signals SC to disconnect all the respective charging power lines and the power output terminals 110 from the power input terminal 109 during negotiation and adjustment of the converter 101 according to the voltage select signal VSEL, and changes the switching control signals SC to selectively couple selected ones of the power output terminals 110 to the power input terminal 109 once the selected charging voltage has been established by the converter 101”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the controller of Lin with the first and second switching circuits taught by Ma and to control the first switching circuit to disconnect the first conversion circuit from the output ports before the first power supply negotiation is completed as taught by Perry, because it allows each conversion circuit to be selectively coupled to the output ports and a connection to be established only after a charging voltage has been negotiated (see [0019] of Perry “reducing the size, cost and complexity of multi-port charges that have two or more converters”). Regarding claim 17, Lin discloses (see Fig. 7) wherein the power supplying method further comprises carrying out a second power supply negotiation with a second output port (the USB port 112b), and controlling the second conversion circuit to output or not to output the second voltage according to a comparison between a first voltage level (the requested VOUT_C1) and a second voltage level (the requested VOUT_C2) (see [0052] of Lin “enable the bypass circuit 106a or 106b associated with one of the USB ports 112a or 112b requesting the higher VOUT_C to provide a VOUT_C equal to VIN, and to enable and operate the buck-controller 110 and buck-circuit 104a or 104b associated with the other USB port to provide the requested, lower VOUT_C”). Regarding claim 18, Lin does not disclose wherein when the first voltage level is greater than the second voltage level, the second switching circuit is controlled to connect the second conversion circuit to the second output port. However, Ma teaches (see Fig. 4) wherein when the first voltage level is greater than the second voltage level (the first output port 240 demanding the higher voltage), the second switching circuit (the fourth switch K4) is controlled to connect the second conversion circuit (the output terminal 222) to the second output port (the second output port 250) (see [0048] of Ma “The control circuit 260 obtains the first voltage feedback information and the second voltage feedback information to couple one of the first output port 240 and the second output port 250 with the higher demand voltage to the power supply terminal 211 and one of the lower demand voltage to the output terminal 222”; see [0032] of Ma “The fourth switch K4 is coupled between the second output port 250 and the output terminal 222”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the controller of Lin to control the second switching circuit to connect the second conversion circuit to the second output port when the first voltage level is greater than the second voltage level, as taught by Ma, because it allows the lower-voltage second conversion output to be routed to the lower-demand output port (see [0071] of Ma “the voltages of the first output port 240 and the second output port 250 are different to be able to charge devices of different charging voltages”). Regarding claim 19, Lin does not disclose wherein when the first voltage level is less than the second voltage level, the first switching circuit is controlled to disconnect the first conversion circuit from the first output port and connect the first conversion circuit to the second output port, and the second switching circuit is controlled to disconnect the second conversion circuit from the second output port and connect the second conversion circuit to the first output port. However, Ma teaches (see Fig. 4) wherein when the first voltage level is less than the second voltage level (the second output port 250 demanding the higher voltage), the first switching circuit is controlled to disconnect the first conversion circuit from the first output port and connect the first conversion circuit to the second output port (coupling the power supply terminal 211 to the second output port 250), and the second switching circuit is controlled to disconnect the second conversion circuit from the second output port and connect the second conversion circuit to the first output port (coupling the output terminal 222 to the first output port 240) (see [0048] of Ma “The control circuit 260 obtains the first voltage feedback information and the second voltage feedback information to couple one of the first output port 240 and the second output port 250 with the higher demand voltage to the power supply terminal 211 and one of the lower demand voltage to the output terminal 222”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the controller of Lin to control the first and second switching circuits to swap the connections of the conversion circuits between the output ports according to the comparison of the voltage levels, as taught by Ma, because it allows whichever output port requires the higher voltage to be coupled to the first conversion circuit while the other output port is coupled to the second conversion circuit (see [0071] of Ma “the voltages of the first output port 240 and the second output port 250 are different to be able to charge devices of different charging voltages”). Regarding claim 20, Lin discloses (see Fig. 1C) wherein the second conversion circuit comprises a voltage regulating switch (the switching element 152) coupled to a conversion path (the path through the inductor 156) between the first conversion circuit and the second switching circuit, and the power supplying method further comprises controlling the voltage regulating switch to be kept off such that the second conversion circuit does not output the second voltage, and controlling the voltage regulating switch to perform a switching operation such that the second conversion circuit outputs the second voltage (see [0040] of Lin “When switching element 152 is on and switching element 154 is off, energy is stored in the inductor. When switching element 152 is off and switching element 154 is on, energy is sent to capacitor 158 to output voltage”). Claims 10, 15, 21, and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Ma and Perry, and further in view of Isham et al. (US Patent Application Publication US 2018/0287495 A1, hereinafter “Isham”). Regarding claim 10, Lin in view of Ma and Perry does not disclose wherein the control circuit monitors a current of the first path according to an equivalent resistance of the first switch when the first switch is on, and monitors a current of the second path according to an equivalent resistance of the second switch when the second switch is on. However, Isham teaches (see Fig. 4) monitoring a current of the first path according to an equivalent resistance of the first switch when the first switch is on, and monitoring a current of the second path according to an equivalent resistance of the second switch when the second switch is on (the first switch and the second switch each corresponding to the MOS transistor switch 301, whose equivalent resistance is the on-resistance RDSON, and the current being determined from the measured on-state voltage drop) (see [0011] of Isham “If the RDSON of the switch is known and the on-state voltage drop is measured, the current through the switch can be determined according to Ohm’s Law, V = I * R”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin to monitor the currents of the first and second paths according to the equivalent resistances of the respective first and second switches when on, as taught by Isham, because measuring the on-state voltage drop of a switch already present in the path is a known current sensing technique and can help detect over current faults which provides protection of the circuit (see [0011] of Isham “Switching power supplies usually include a current sensing mechanism for various purposes, including, but not limited to, control loop inputs (current mode control), over-current detection, multi-phase converter inductor current balance, output current reporting, and input current reporting”). Regarding claim 15, Lin does not disclose wherein the control circuit monitors a current of the third path according to an equivalent resistance of the third switch when the third switch is on, and monitors a current of the fourth path according to an equivalent resistance of the fourth switch when the fourth switch is on. However, Isham teaches (see Fig. 4) monitoring a current of the third path according to an equivalent resistance of the third switch when the third switch is on, and monitoring a current of the fourth path according to an equivalent resistance of the fourth switch when the fourth switch is on (the third switch and the fourth switch each corresponding to the MOS transistor switch 301, whose equivalent resistance is the on-resistance RDSON, and the current being determined from the measured on-state voltage drop) (see [0011] of Isham “If the RDSON of the switch is known and the on-state voltage drop is measured, the current through the switch can be determined according to Ohm’s Law, V = I * R”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin to monitor the currents of the third and fourth paths according to the equivalent resistances of the respective third and fourth switches when on, as taught by Isham, because measuring the on-state voltage drop of a switch already present in the path is a known current sensing technique and can help detect over current faults which provides protection of the circuit (see [0011] of Isham “Switching power supplies usually include a current sensing mechanism for various purposes, including, but not limited to, control loop inputs (current mode control), over-current detection, multi-phase converter inductor current balance, output current reporting, and input current reporting”). Regarding claim 21, Lin does not disclose wherein the first switching circuit comprises a first switch and a second switch, the first switch being located on a first path between the first conversion circuit and the first output port, and the second switch being located on a second path between the first conversion circuit and the second output port; monitoring a current of the first path according to an equivalent resistance of the first switch when the first switch is on; and monitoring a current of the second path according to an equivalent resistance of the second switch when the second switch is on. However, Ma teaches (see Fig. 4) wherein the first switching circuit comprises a first switch (K1) and a second switch (K3), the first switch (K1) being located on a first path (the path coupling the power supply terminal 211 to the first output port 240) between the first conversion circuit (the power supply terminal 211) and the first output port (240) (see [0031] of Ma “The first switch K1 is coupled between the first output port 240 and the power supply terminal 211”), and the second switch (K3) being located on a second path (the path coupling the power supply terminal 211 to the second output port 250) between the first conversion circuit (211) and the second output port (250) (see [0032] of Ma “The third switch K3 is coupled between the second output port 250 and the power supply terminal 211”). Isham further teaches (see Fig. 4) monitoring a current of the first path according to an equivalent resistance of the first switch when the first switch is on, and monitoring a current of the second path according to an equivalent resistance of the second switch when the second switch is on (the first switch and the second switch each corresponding to the MOS transistor switch 301, whose equivalent resistance is the on-resistance RDSON) (see [0036] of Isham “The current can then be determined from the corrected RDSON voltage drop according to V = I * R”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the controller of Lin to provide the first switching circuit with the first and second switches taught by Ma and to monitor the currents of the first and second paths according to the equivalent resistances of those switches as taught by Isham, because measuring the on-state voltage drop of a switch already present in the path is a known current sensing technique and can help detect over current faults which provides protection of the circuit (see [0011] of Isham “Switching power supplies usually include a current sensing mechanism for various purposes, including, but not limited to, control loop inputs (current mode control), over-current detection, multi-phase converter inductor current balance, output current reporting, and input current reporting”). Regarding claim 24, Lin does not disclose wherein the second switching circuit comprises a third switch and a fourth switch, the third switch being located on a third path between the second conversion circuit and the first output port, and the fourth switch being located on a fourth path between the second conversion circuit and the second output port; monitoring a current of the third path according to an equivalent resistance of the third switch when the third switch is on; and monitoring a current of the fourth path according to an equivalent resistance of the fourth switch when the fourth switch is on. However, Ma teaches (see Fig. 4) wherein the second switching circuit comprises a third switch (K2) and a fourth switch (K4), the third switch (K2) being located on a third path (the path coupling the output terminal 222 to the first output port 240) between the second conversion circuit (the output terminal 222) and the first output port (240) (see [0031] of Ma “The second switch K2 is coupled between the first output port 240 and the output terminal 222”), and the fourth switch (K4) being located on a fourth path (the path coupling the output terminal 222 to the second output port 250) between the second conversion circuit (222) and the second output port (250) (see [0032] of Ma “The fourth switch K4 is coupled between the second output port 250 and the output terminal 222”). Isham further teaches (see Fig. 4) monitoring a current of the third path according to an equivalent resistance of the third switch when the third switch is on, and monitoring a current of the fourth path according to an equivalent resistance of the fourth switch when the fourth switch is on (the third switch and the fourth switch each corresponding to the MOS transistor switch 301, whose equivalent resistance is the on-resistance RDSON) (see [0036] of Isham “The current can then be determined from the corrected RDSON voltage drop according to V = I * R”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the controller of Lin to provide the second switching circuit with the third and fourth switches taught by Ma and to monitor the currents of the third and fourth paths according to the equivalent resistances of those switches as taught by Isham, because measuring the on-state voltage drop of a switch already present in the path is a known current sensing technique and can help detect over current faults which provides protection of the circuit (see [0011] of Isham “Switching power supplies usually include a current sensing mechanism for various purposes, including, but not limited to, control loop inputs (current mode control), over-current detection, multi-phase converter inductor current balance, output current reporting, and input current reporting”). Claims 11, 14, 22, and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Ma and Perry, and further in view of Kaestner (US Patent Application Publication US 2015/0323979 A1, hereinafter “Kaestner”). Regarding claim 11, Lin does not disclose wherein the first switching circuit comprises a first current detection unit and a second current detection unit, the first current detection unit being located on the first path, the second current detection unit being located on the second path, and the control circuit monitoring a current of the first path according to the first current detection unit and monitoring a current of the second path according to the second current detection unit. However, Kaestner teaches (see Fig. 3) a first current detection unit (the current sensing unit 320 and shunt resistor 310) and a second current detection unit (the current sensing unit 340 and shunt resistor 345), the first current detection unit being located on the first path (the power path of USB port 305), the second current detection unit being located on the second path (the power path of USB port 350), and a control logic unit (the power port control logic unit 300) monitoring a current of the first path according to the first current detection unit and monitoring a current of the second path according to the second current detection unit (see [0030] of Kaestner “the current drawn on USB port 305 is measured by current sensing unit 320 and shunt resistor 310. The current sensing unit 320 calculates the current drawn on USB port 305 based on the measured voltage drop across shunt resistor 310. Another current sensing unit 340 and shunt resistor 345 similarly determine the current drawn on USB port 350”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin to provide a first current detection unit on the first path and a second current detection unit on the second path that are monitored by the control circuit, as taught by Kaestner, because it allows the current drawn on each path to be independently monitored for over-current protection. Regarding claim 14, Lin does not disclose a third current detection unit coupled between the second conversion circuit and the second switching circuit, the control circuit monitoring a current of the third path or the fourth path according to the third current detection unit. However, Kaestner teaches (see Fig. 3) a third current detection unit (the current sensing unit 320 and shunt resistor 310) coupled on a power path, a control logic unit (the power port control logic unit 300) monitoring a current of the path according to the third current detection unit (see [0030] of Kaestner “The current sensing unit 320 calculates the current drawn on USB port 305 based on the measured voltage drop across shunt resistor 310”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin to provide a third current detection unit coupled between the second conversion circuit and the second switching circuit and monitored by the control circuit, as taught by Kaestner, because it allows the current delivered by the second conversion circuit to be monitored for over-current protection. Regarding claim 22, Lin does not disclose wherein the first switching circuit comprises a first switch and a second switch, the first switch being located on a first path between the first conversion circuit and the first output port, and the second switch being located on a second path between the first conversion circuit and the second output port, the first switching circuit further comprises a first current detection unit located on the first path and a second current detection unit located on the second path, and monitoring a current of the first path according to the first current detection unit and a current of the second path according to the second current detection unit. However, Ma teaches (see Fig. 4) wherein the first switching circuit comprises a first switch (K1) and a second switch (K3), the first switch (K1) being located on a first path (the path coupling the power supply terminal 211 to the first output port 240) between the first conversion circuit (the power supply terminal 211) and the first output port (240) (see [0031] of Ma “The first switch K1 is coupled between the first output port 240 and the power supply terminal 211”), and the second switch (K3) being located on a second path (the path coupling the power supply terminal 211 to the second output port 250) between the first conversion circuit (211) and the second output port (250) (see [0032] of Ma “The third switch K3 is coupled between the second output port 250 and the power supply terminal 211”). Kaestner further teaches (see Fig. 3) a first current detection unit located on the first path (the current sensing unit 320 and shunt resistor 310 on the power path of USB port 305) and a second current detection unit located on the second path (the current sensing unit 340 and shunt resistor 345 on the power path of USB port 350), and monitoring a current of the first path according to the first current detection unit and a current of the second path according to the second current detection unit (see [0030] of Kaestner “the current drawn on USB port 305 is measured by current sensing unit 320 and shunt resistor 310. The current sensing unit 320 calculates the current drawn on USB port 305 based on the measured voltage drop across shunt resistor 310. Another current sensing unit 340 and shunt resistor 345 similarly determine the current drawn on USB port 350”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the controller of Lin to provide the first switching circuit with the first and second switches taught by Ma and to monitor the currents of the first and second paths using respective current detection units as taught by Kaestner, because it allows the current drawn on each path to be independently monitored for over-current protection. Regarding claim 23, Lin does not disclose wherein the second switching circuit comprises a third switch and a fourth switch, the third switch being located on a third path between the second conversion circuit and the first output port, and the fourth switch being located on a fourth path between the second conversion circuit and the second output port, the power supply further comprises a third current detection unit coupled between the second conversion circuit and the second switching circuit, and monitoring a current of the third path or the fourth path according to the third current detection unit. However, Ma teaches (see Fig. 4) wherein the second switching circuit comprises a third switch (K2) and a fourth switch (K4), the third switch (K2) being located on a third path (the path coupling the output terminal 222 to the first output port 240) between the second conversion circuit (the output terminal 222) and the first output port (240) (see [0031] of Ma “The second switch K2 is coupled between the first output port 240 and the output terminal 222”), and the fourth switch (K4) being located on a fourth path (the path coupling the output terminal 222 to the second output port 250) between the second conversion circuit (222) and the second output port (250) (see [0032] of Ma “The fourth switch K4 is coupled between the second output port 250 and the output terminal 222”). Kaestner further teaches (see Fig. 3) a third current detection unit coupled on a power path (the current sensing unit 320 and shunt resistor 310), monitoring a current of the path according to the third current detection unit (see [0030] of Kaestner “The current sensing unit 320 calculates the current drawn on USB port 305 based on the measured voltage drop across shunt resistor 310”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the controller of Lin to provide the second switching circuit with the third and fourth switches taught by Ma and a third current detection unit coupled between the second conversion circuit and the second switching circuit as taught by Kaestner, because it allows the current delivered by the second conversion circuit to be monitored for over-current protection. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Ma and Perry, and further in view of Carter (US Patent Application Publication US 2010/0066431 A1, hereinafter “Carter”). Regarding claim 13, Lin does not disclose wherein the third switch and the fourth switch respectively have a body diode, and a cathode of the body diode of the third switch and the fourth switch faces the coupled output port. However, Carter teaches (see Fig. 2) wherein the third switch and the fourth switch (the MOSFETs 208) respectively have a body diode (the intrinsic body diode of each MOSFET 208), and a cathode of the body diode of the third switch and the fourth switch faces the coupled output port (the cathode of each body diode oriented toward the load 216, so as to inhibit reverse current between the supply and the load) (see [0026] of Carter “the MOSFETs 208 each comprise an intrinsic body diode”; see [0027] of Carter “the body diode of the fourth transistor 208d is substantially inhibiting current from flowing between the second power supply 204b and the load 216”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the power supply of Lin to implement the third switch and the fourth switch as MOSFETs each having a body diode with a cathode facing the coupled output port, as taught by Carter, because using the parasitic body diode of the switch to block reverse current eliminates separate isolation diodes and their associated power dissipation (see [0011] of Carter “Some embodiments of the present invention benefit from the discrete isolation-diode topology, but also take advantage of the parasitic body diode in the FET, thus eliminating parts, and shunts the power dissipating diode when the switching is complete”). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2017/0093292 A1 discloses a power conversion apparatus that provides one of two output voltages to an output port according to a load detection result. CN 213279502 U discloses a multi-port charging circuit having a switch matrix routing two conversion stages to a plurality of output ports. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JYE-JUNE LEE whose telephone number is (571)270-7726. The examiner can normally be reached on M-F 9 AM - 5 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 5712721838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MONICA LEWIS/ Supervisory Patent Examiner, Art Unit 2838 /JYE-JUNE LEE/Examiner, Art Unit 2838
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Prosecution Timeline

Dec 10, 2024
Application Filed
Jul 01, 2026
Non-Final Rejection mailed — §103
Sep 24, 2026
Applicant Interview (Telephonic)
Sep 25, 2026
Examiner Interview Summary

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