Prosecution Insights
Last updated: April 19, 2026
Application No. 18/975,452

DISPLAY DEVICE

Non-Final OA §103
Filed
Dec 10, 2024
Examiner
AU, SCOTT D
Art Unit
2624
Tech Center
2600 — Communications
Assignee
LG Display Co., Ltd.
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
3y 0m
To Grant
88%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
397 granted / 518 resolved
+14.6% vs TC avg
Moderate +11% lift
Without
With
+11.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
18 currently pending
Career history
536
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
66.0%
+26.0% vs TC avg
§102
18.1%
-21.9% vs TC avg
§112
7.8%
-32.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 518 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Objections Claims 11 and 18 are objected to because of the following informalities: According to claim 11, recites “ort more of the first circuit film”, accordingly. The examiner kindly suggests the applicant to change to “[ort] or more of the first circuit film”, instead. According to claim 18, recites “applying a driving voltage to the sub-pixels”, accordingly. The examiner kindly suggests the applicant to change to “applying a driving voltage to the sub-pixels;”, instead. Appropriate corrections are required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 11-12, 17, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al.(US 2022/0208108 hereinafter Lee) in view of Lin, Chun-Fu (TW I817890 B hereinafter Lin), and Luciani Pierre (EP 0408425 B1 hereinafter Luciani). Referring to claim 1, Lee disclose a display device (Fig. 1; 100), comprising: a control printed circuit board (Fig. 2; CPCB) on which a power management integrated circuit (Fig. 2; 310) configured to generate and output a driving voltage is mounted ([0066]; The controller 140 and a power management integrated circuit 310 may be mounted on the control printed circuit board CPCB. The controller 140 can perform an overall control function related to the driving of the display panel 110 and control operations of the data driving circuit 120 and the gate driving circuit 130. The power management integrated circuit 310 can supply various types of voltages or currents to the data driving circuit 120 and the gate driving circuit 130 or control various types of voltages or currents to be supplied.); first and second connection cables (Fig. 2; CBL cables) connected to the control printed circuit board (Fig. 2; CPCB) each through a respective first connector (Fig. 2; a respective first connector is presented but not shown that allows the CBL cables connected to CPCB); first and second source printed circuit boards (Fig.2; SPCB boards) connected to the first and second connection cables (Fig. 2; CBL cables), respectively, each through a respective second connector (Fig. 2; a respective second connector is presented but not shown that allows the CBL cables connected to the SPCB boards); circuit films (Fig. 2; circuit films SF) each connected to one of the first or the second source printed circuit boards (Fig. 2; SPCB boards) (Fig. 2; circuit films Sf connected to SPCB boards), and each including a source driver integrated circuit (Fig. 2; source driver integrated circuits SDIC); and a display panel (Fig. 2; display panel 110) which is connected to the circuit films (Fig. 2; circuit films SF) (Fig. 2; display panel 110 is connected to circuit films SF), the display panel including sub-pixels configured to receive the driving voltage output from the power management integrated circuit (Fig. 2; 310) through one of the first or second connection cable (Fig. 2; CBL cables) ([0033]; The display panel 110 may include a substrate SUB, and signal lines such as a plurality of data lines DL, a plurality of gate lines GL, and the like disposed over the substrate SUB. The display panel 110 may include a plurality of sub-pixels SP connected to the plurality of gate lines GL and the plurality of data lines DL…. and [0066]; The controller 140 and a power management integrated circuit 310 may be mounted on the control printed circuit board CPCB. The controller 140 can perform an overall control function related to the driving of the display panel 110 and control operations of the data driving circuit 120 and the gate driving circuit 130. The power management integrated circuit 310 can supply various types of voltages or currents to the data driving circuit 120 and the gate driving circuit 130 or control various types of voltages or currents to be supplied.), wherein the control printed circuit board (Fig. 2; CPCB) further includes a controller (Fig; controller 140) configured to acquire first sensing data from sub-pixels connected to the first connection cable (Fig. 2; CBL cables), acquire second sensing data from sub-pixels connected to the second connection cable (Fig. 2; CBL cables) ([0126]; The source driver integrated circuit SDIC of data driving circuit 120 can transmit respective sensing data corresponding to the voltage at the second node N2 of the driving transistor DRT and the sensing voltage Vsen of the dummy pull-down transistor Dd to the controller 140…, [0127]; The controller 140 can determine a voltage value of a power supply voltage GVDD of the gate driving circuit 130 according to lifetime dispersion and an expected lifetime of the pull-down transistor Td of the gate driving circuit 130 in the form of a lookup table as shown in FIG. 5 based on the sensing data corresponding to the sensing voltage Vsen of the dummy pull-down transistor Dd…, [0128]; The controller 140 can control a voltage to be output from the power management integrated circuit 310, and thereafter, a power supply voltage GVDD output from the power management integrated circuit 310 may gradually increase from a low voltage to a high voltage according to a driving time…, and [0067]; A circuital connection between at least one source printed circuit board SPCB and the control printed circuit board CPCB may be performed through at least one connection cable CBL. The connection cable CBL may be, for example, a flexible printed circuit FPC, a flexible flat cable FFC, or the like.). However, Lee is silent on first and second connection cables connected to each through a respective first connector and a respective second connector; and determine connection failure involving one or more of the first connection cable or the second connection cable based on a difference between the first sensing data and the second sensing data. In an analogous art, Lin discloses first and second connection cables connected to each through a respective first connector and a respective second connector (Fig. 11; each connection line 490N connected to each respective first and second connector headers on each connection end.). PNG media_image1.png 463 998 media_image1.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Lin to the system of Lee in order to improve reliability and/or alleviate color cast problems. However, Lee in view of Lin does not explicitly disclose determine connection failure involving one or more of the first connection cable or the second connection cable based on a difference between the first sensing data and the second sensing data. In an analogous art, Luciani discloses determine connection failure involving one or more of the first connection cable or the second connection cable based on a difference between the first sensing data and the second sensing data (Luciani- see attachment highlighted section; One of the fundamental principles used within this embodiment consists in determining expressions of current from the potential differences sensed between the terminals of each component of a set of components connected to the same common terminal or observation node, and on the basis of functional models describing their respective behaviors, note being made that these models can be representative of a malfunction or of a good functioning, as will be seen below.). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Luciani to the system of Lee in view of Lin in order to diagnose of one or more defective components. Referring to claim 2, Lee as modified by Luciani discloses wherein the controller is configured to output a failure detection signal when the difference between the first sensing data and the second sensing data is greater than a threshold value (Luciani- see attachment highlighted section; One of the fundamental principles used within this embodiment consists in determining expressions of current from the potential differences sensed between the terminals of each component of a set of components connected to the same common terminal or observation node, and on the basis of functional models describing their respective behaviors, note being made that these models can be representative of a malfunction or of a good functioning, as will be seen below…., highlighted section; Generally speaking, this test of said condition includes the comparison of an algebraic value with a reference value. More precisely, when at least some of the current expressions are actual algebraic values of current, the test of the set of current expressions comprises the algebraic sum of these current values which is then compared with a reference value. We could for example test if this algebraic sum is positive or negative…, and highlighted section; In the case where all the current expressions are algebraic values proper, we test whether the algebraic sum of all the current values is equal to or different from 0, to within a precision threshold.). Referring to claim 11, Lee discloses a display device (Fig. 1; 100), comprising: a control printed circuit board (Fig. 2; CPCB) on which a power management integrated circuit (Fig. 2; 310) configured to generate and output a driving voltage is mounted ([0066]; The controller 140 and a power management integrated circuit 310 may be mounted on the control printed circuit board CPCB. The controller 140 can perform an overall control function related to the driving of the display panel 110 and control operations of the data driving circuit 120 and the gate driving circuit 130. The power management integrated circuit 310 can supply various types of voltages or currents to the data driving circuit 120 and the gate driving circuit 130 or control various types of voltages or currents to be supplied.); first and second circuit films (Fig. 2; circuit films SF) each connected to the control printed circuit board (Fig. 2; CPCB) (Fig. 2; circuit films SF are connected to control printed circuit board CPCB via SPCB and CBL cables); and a display panel (Fig. 2; display panel 110) connected to the first circuit film (Fig. 2; circuit films SF) (Fig. 2; display panel 110 connected to circuit films SF), the display panel including sub-pixels configured to receive the driving voltage from the power management integrated circuit (Fig. 2; 310) ([0033]; The display panel 110 may include a substrate SUB, and signal lines such as a plurality of data lines DL, a plurality of gate lines GL, and the like disposed over the substrate SUB. The display panel 110 may include a plurality of sub-pixels SP connected to the plurality of gate lines GL and the plurality of data lines DL…. and [0066]; The controller 140 and a power management integrated circuit 310 may be mounted on the control printed circuit board CPCB. The controller 140 can perform an overall control function related to the driving of the display panel 110 and control operations of the data driving circuit 120 and the gate driving circuit 130. The power management integrated circuit 310 can supply various types of voltages or currents to the data driving circuit 120 and the gate driving circuit 130 or control various types of voltages or currents to be supplied.), wherein the control printed circuit board (Fig. 2; CPCB) further includes a controller (Fig; controller 140) configured to acquire first sensing data from sub-pixels connected to the first circuit film (Fig. 2; circuit films SF), acquire second sensing data from sub-pixels connected to the second circuit film (Fig. 2; circuit films SF) ([0126]; The source driver integrated circuit SDIC of data driving circuit 120 can transmit respective sensing data corresponding to the voltage at the second node N2 of the driving transistor DRT and the sensing voltage Vsen of the dummy pull-down transistor Dd to the controller 140…, [0127]; The controller 140 can determine a voltage value of a power supply voltage GVDD of the gate driving circuit 130 according to lifetime dispersion and an expected lifetime of the pull-down transistor Td of the gate driving circuit 130 in the form of a lookup table as shown in FIG. 5 based on the sensing data corresponding to the sensing voltage Vsen of the dummy pull-down transistor Dd…, [0128]; The controller 140 can control a voltage to be output from the power management integrated circuit 310, and thereafter, a power supply voltage GVDD output from the power management integrated circuit 310 may gradually increase from a low voltage to a high voltage according to a driving time…, and [0065] The circuit film SF on which the source driver integrated circuit SDIC is mounted may be connected to at least one source printed circuit board SPCB. That is, one side of the circuit film SF on which the source driver integrated circuit SDIC is mounted may be electrically connected to the display panel 110 and the other side thereof may be electrically connected to the source printed circuit board SPCB.). However, Lee does not explicitly disclose first and second circuit films each connected to the control printed circuit board through a respective first connector; a display panel connected to the first circuit film and the second circuit film each through a respective second connector; and determine connection failure involving one or more of the first circuit film or the second circuit film based on a difference between the first sensing data and the second sensing data. In an analogous art, Lin discloses first and second circuit films (Fig. 2; Film package bonds 210F) each connected to the control printed circuit board (Fig. 2; control printed circuit board 270) through a respective first connector (Fig. 2; first connector is presented but not shown that connects the film package bonds 210f to the CPCB 270); a display panel (Fig. 2; display panel 150) connected to the first circuit film and the second circuit film (Fig. 2; Film package bonds 210F) each through a respective second connector (Fig. 2; connector head 270H) (display panel 150 connected to film package bonds 210F via connector head 270H). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Lin to the system of Lee in order to improve reliability and/or alleviate color cast problems. However, Lee in view of Lin does not explicitly disclose determine connection failure involving one or more of the first circuit film or the second circuit film based on a difference between the first sensing data and the second sensing data. In an analogous art, Luciani discloses determine connection failure involving one or more of the first circuit film or the second circuit film based on a difference between the first sensing data and the second sensing data (Luciani- see attachment highlighted section; One of the fundamental principles used within this embodiment consists in determining expressions of current from the potential differences sensed between the terminals of each component of a set of components connected to the same common terminal or observation node, and on the basis of functional models describing their respective behaviors, note being made that these models can be representative of a malfunction or of a good functioning, as will be seen below.). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Luciani to the system of Lee in view of Lin in order to diagnose of one or more defective components. Referring to claim 12, Lee as modified by Luciani discloses wherein the controller is configured to output a failure detection signal in response to the difference between the first sensing data and the second sensing data is greater than a threshold value (Luciani- see attachment highlighted section; One of the fundamental principles used within this embodiment consists in determining expressions of current from the potential differences sensed between the terminals of each component of a set of components connected to the same common terminal or observation node, and on the basis of functional models describing their respective behaviors, note being made that these models can be representative of a malfunction or of a good functioning, as will be seen below…., highlighted section; Generally speaking, this test of said condition includes the comparison of an algebraic value with a reference value. More precisely, when at least some of the current expressions are actual algebraic values of current, the test of the set of current expressions comprises the algebraic sum of these current values which is then compared with a reference value. We could for example test if this algebraic sum is positive or negative…, and highlighted section; In the case where all the current expressions are algebraic values proper, we test whether the algebraic sum of all the current values is equal to or different from 0, to within a precision threshold.). Referring to claim 17, Lee discloses a method of driving a display device (Fig. 1; 100) including a control printed circuit board (Fig. 2; CPCB) on which a controller (Fig; controller 140) and a power management integrated circuit (Fig. 2; 310) configured to generate and output a driving voltage are mounted ([0066]; The controller 140 and a power management integrated circuit 310 may be mounted on the control printed circuit board CPCB. The controller 140 can perform an overall control function related to the driving of the display panel 110 and control operations of the data driving circuit 120 and the gate driving circuit 130. The power management integrated circuit 310 can supply various types of voltages or currents to the data driving circuit 120 and the gate driving circuit 130 or control various types of voltages or currents to be supplied.), first and second connection cables (Fig. 2; CBL cables) connected to the control printed circuit board (Fig. 2; CPCB) each through a respective first connector (Fig. 2; a respective first connector is presented but not shown that allows the CBL cables connected to CPCB), first and second source printed circuit boards (Fig.2; SPCB boards) connected to the first and second connection cables (Fig. 2; CBL cables), respectively, each through a respective second connector (Fig. 2; a respective second connector is presented but not shown that allows the CBL cables connected to the SPCB boards), circuit films (Fig. 2; circuit films SF) on which the source driver integrated circuit (Fig. 2; source driver integrated circuits SDIC) is mounted and which is connected to the first and second source printed circuit boards (Fig. 2; SPCB boards) (Fig. 2; circuit films Sf connected to SPCB boards), and a display panel (Fig. 2; display panel 110) which is connected to the circuit films (Fig. 2; circuit films SF) and on which sub-pixels receiving the driving voltage from the power management integrated circuit (Fig. 2; 310) through the first or second connection cable (Fig. 2; CBL cables) are disposed ([0033]; The display panel 110 may include a substrate SUB, and signal lines such as a plurality of data lines DL, a plurality of gate lines GL, and the like disposed over the substrate SUB. The display panel 110 may include a plurality of sub-pixels SP connected to the plurality of gate lines GL and the plurality of data lines DL…. and [0066]; The controller 140 and a power management integrated circuit 310 may be mounted on the control printed circuit board CPCB. The controller 140 can perform an overall control function related to the driving of the display panel 110 and control operations of the data driving circuit 120 and the gate driving circuit 130. The power management integrated circuit 310 can supply various types of voltages or currents to the data driving circuit 120 and the gate driving circuit 130 or control various types of voltages or currents to be supplied.), the method comprising: by the controller (Fig; controller 140), acquiring first sensing data from the sub-pixels connected to the first connection cable (Fig. 2; CBL cables) and acquiring second sensing data from the sub-pixels connected to the second connection cable (Fig. 2; CBL cables) ([0126]; The source driver integrated circuit SDIC of data driving circuit 120 can transmit respective sensing data corresponding to the voltage at the second node N2 of the driving transistor DRT and the sensing voltage Vsen of the dummy pulldown transistor Dd to the controller 140…, [0127]; The controller 140 can determine a voltage value of a power supply voltage GVDD of the gate driving circuit 130 according to lifetime dispersion and an expected lifetime of the pulldown transistor Td of the gate driving circuit 130 in the form of a lookup table as shown in FIG. 5 based on the sensing data corresponding to the sensing voltage Vsen of the dummy pull-down transistor Dd…, [0128]; The controller 140 can control a voltage to be output from the power management integrated circuit 310, and thereafter, a power supply voltage GVDD output from the power management integrated circuit 310 may gradually increase from a low voltage to a high voltage according to a driving time…, and [0067]; A circuital connection between at least one source printed circuit board SPCB and the control printed circuit board CPCB may be performed through at least one connection cable CBL. The connection cable CBL may be, for example, a flexible printed circuit FPC, a flexible flat cable FFC, or the like.). However, Lee is silent on is silent on first and second connection cables connected to each through a respective first connector and a respective second connector; determining whether a difference between the first sensing data and the second sensing data is greater than a first threshold value; and outputting a failure detection signal when the difference between the first sensing data and the second sensing data is greater than the first threshold value. In an analogous art, Lin discloses first and second connection cables connected to each through a respective first connector and a respective second connector (Fig. 11; each connection line 490N connected to each respective first and second connector headers on each connection end.). PNG media_image2.png 200 400 media_image2.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Lin to the system of Lee in order to improve reliability and/or alleviate color cast problems. However, Lee in view of Lin is silent on is silent on determining whether a difference between the first sensing data and the second sensing data is greater than a first threshold value; and outputting a failure detection signal when the difference between the first sensing data and the second sensing data is greater than the first threshold value. In an analogous art, Luciani discloses whether a difference between the first sensing data and the second sensing data is greater than a first threshold value (Luciani- see attachment highlighted section; One of the fundamental principles used within this embodiment consists in determining expressions of current from the potential differences sensed between the terminals of each component of a set of components connected to the same common terminal or observation node, and on the basis of functional models describing their respective behaviors, note being made that these models can be representative of a malfunction or of a good functioning, as will be seen below…., highlighted section; Generally speaking, this test of said condition includes the comparison of an algebraic value with a reference value. More precisely, when at least some of the current expressions are actual algebraic values of current, the test of the set of current expressions comprises the algebraic sum of these current values which is then compared with a reference value. We could for example test if this algebraic sum is positive or negative…, and highlighted section; In the case where all the current expressions are algebraic values proper, we test whether the algebraic sum of all the current values is equal to or different from 0, to within a precision threshold. ); and outputting a failure detection signal when the difference between the first sensing data and the second sensing data is greater than the first threshold value (Luciani- see attachment highlighted section; One of the fundamental principles used within this embodiment consists in determining expressions of current from the potential differences sensed between the terminals of each component of a set of components connected to the same common terminal or observation node, and on the basis of functional models describing their respective behaviors, note being made that these models can be representative of a malfunction or of a good functioning, as will be seen below…, highlighted section; Generally speaking, this test of said condition includes the comparison of an algebraic value with a reference value. More precisely, when at least some of the current expressions are actual algebraic values of current, the test of the set of current expressions comprises the algebraic sum of these current values which is then compared with a reference value. We could for example test if this algebraic sum is positive or negative…, and highlighted section; As for the screen, it allows in particular the display of the defective component or components revealed by the device during the test.). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Luciani to the system of Lee in view of Lin in order to diagnose of one or more defective components. Referring to claim 21, Lee discloses a display device (Fig. 1; 100), comprising: a control printed circuit board (Fig. 2; CPCB) including a controller (Fig; controller 140) and a power management integrated circuit (Fig. 2; 310) configured to generate and output a driving voltage ([0066]; The controller 140 and a power management integrated circuit 310 may be mounted on the control printed circuit board CPCB. The controller 140 can perform an overall control function related to the driving of the display panel 110 and control operations of the data driving circuit 120 and the gate driving circuit 130. The power management integrated circuit 310 can supply various types of voltages or currents to the data driving circuit 120 and the gate driving circuit 130 or control various types of voltages or currents to be supplied.); a display panel (Fig. 2; display panel 110) including a first sub-pixel and a second sub-pixel ([0033]; The display panel 110 may include a substrate SUB, and signal lines such as a plurality of data lines DL, a plurality of gate lines GL, and the like disposed over the substrate SUB. The display panel 110 may include a plurality of sub-pixels SP connected to the plurality of gate lines GL and the plurality of data lines DL); a first connection path (Fig. 2; CBL cables) including a first connector connected between the first sub-pixel and the power management integrated circuit (Fig. 2; 310); and a second connection path (Fig. 2; CBL cables) including a second connector connected between the second sub-pixel and the power management integrated circuit (Fig. 2; A first and second connectors are presented but not shown that allow the CBL cables connected to power management integrated circuit 310 and the sub-pixels in the display 110), wherein the controller (Fig; controller 140) is configured to acquire first sensing data from the first sub-pixel and second sensing data from the second sub-pixel ([0126]; The source driver integrated circuit SDIC of data driving circuit 120 can transmit respective sensing data corresponding to the voltage at the second node N2 of the driving transistor DRT and the sensing voltage Vsen of the dummy pulldown transistor Dd to the controller 140…, [0127]; The controller 140 can determine a voltage value of a power supply voltage GVDD of the gate driving circuit 130 according to lifetime dispersion and an expected lifetime of the pulldown transistor Td of the gate driving circuit 130 in the form of a lookup table as shown in FIG. 5 based on the sensing data corresponding to the sensing voltage Vsen of the dummy pull-down transistor Dd…, and [0128]; The controller 140 can control a voltage to be output from the power management integrated circuit 310, and thereafter, a power supply voltage GVDD output from the power management integrated circuit 310 may gradually increase from a low voltage to a high voltage according to a driving time). However, Lee does not explicitly disclose a first connection path including a first connector; a second connection path including a second connector; and determine connection failure involving one or more of the first connector or the second connector based on a difference between the first sensing data and the second sensing data. In an analogous art, Lin discloses a first connection path including a first connector; a second connection path including a second connector (see Fig. 11 below; each connection line 490N connected to each respective first and second connector headers on each connection end.). PNG media_image3.png 200 400 media_image3.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Lin to the system of Lee in order to improve reliability and/or alleviate color cast problems. However, Lee in view of Lin is silent on is silent determine connection failure involving one or more of the first connector or the second connector based on a difference between the first sensing data and the second sensing data. In an analogous art, Luciani discloses determine connection failure involving one or more of the first connector or the second connector based on a difference between the first sensing data and the second sensing data (Luciani- see attachment highlighted section; One of the fundamental principles used within this embodiment consists in determining expressions of current from the potential differences sensed between the terminals of each component of a set of components connected to the same common terminal or observation node, and on the basis of functional models describing their respective behaviors, note being made that these models can be representative of a malfunction or of a good functioning, as will be seen below.). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Luciani to the system of Lee in view of Lin in order to diagnose of one or more defective components. Claim Objections Claims 3-10, 13-16, and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Referring to claim 3, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitation “wherein the controller is configured to determine an average current luminance based on sensing data sensed from the sub-pixels and in response to the average current luminance is greater than a threshold value, further determine the connection failure involving one or more of the first connection cable or the second connection cable”. Referring to claim 4, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitation “wherein the power management integrated circuit is configured to output the driving voltage and a sensing voltage, and the controller is configured to control the power management integrated circuit to output the sensing voltage and to determine the connection failure based on the first and second sensing data acquired in response to the sensing voltage”. Referring to claims 5-10 are objected upon dependent on the claim 4. Referring to claim 13, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitation “wherein the controller is configured to determine an average current luminance based on sensing data sensed from the sub-pixels and in response to the average current luminance is greater than a threshold value, further determine the connection failure involving one or more of the first circuit film and the second circuit film”. Referring to claim 14, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitation “wherein the power management integrated circuit is configured to output the driving voltage and a sensing voltage, and the controller is configured to control the power management integrated circuit to output the sensing voltage and determine the connection failure based on the first and second sensing data acquired in response to the sensing voltage”. Referring to claims 15-16 are objected upon dependent on the claim 14. Referring to claim 18, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitation “wherein the acquiring of the first sensing data and the second sensing data includes: applying a driving voltage to the sub-pixels; acquiring sensing data from the sub-pixels; determining an average current luminance based on the sensing data; and determining whether the average current luminance is greater than a second threshold value, and in response the average current luminance is greater than the second threshold value, acquiring the first sensing data and the second sensing data by applying a sensing voltage to the sub-pixels”. Referring to claims 19-20 are objected upon dependent on the claim 18. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SCOTT D AU whose telephone number is (571)272-5948. The examiner can normally be reached M-F. General 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Eason can be reached at 571-270-7230. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SCOTT D AU/Examiner, Art Unit 2624
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Prosecution Timeline

Dec 10, 2024
Application Filed
Feb 05, 2026
Non-Final Rejection — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
88%
With Interview (+11.4%)
3y 0m
Median Time to Grant
Low
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