Prosecution Insights
Last updated: August 17, 2026
Application No. 18/976,218

ELECTRONIC DEVICE AND OBJECT DETECTION METHOD THEREOF

Non-Final OA §103
Filed
Dec 10, 2024
Examiner
KASHYAPA, ANUSHA
Art Unit
2669
Tech Center
2600 — Communications
Assignee
Himax Technologies Limited
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-62.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
13 currently pending
Career history
10
Total Applications
across all art units

Statute-Specific Performance

§101
7.9%
-32.1% vs TC avg
§103
47.4%
+7.4% vs TC avg
§102
23.7%
-16.3% vs TC avg
§112
21.1%
-18.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation is: "A Convolutional Neural Network device" in claim 5. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 5-8, 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over US 20060171465 (hereinafter referred to as Thyagarajan) in view of US 20200413070 (hereinafter referred to as Huang). Regarding claim 1, Thyagarajan teaches a method comprising method, comprising: receiving a plurality of blocks of the image information [see 0013 where information from a video (indicating image data is also present) is segmented into blocks; PNG media_image1.png 155 1417 media_image1.png Greyscale performing a block-based discrete cosine transform (DCT) on a plurality of blocks to obtain a plurality of DCT-coefficient blocks respectively [see 0013 above where a DCT is applied to the blocks and 0015 where after the DCT, DCT coefficients are obtained], PNG media_image2.png 58 1222 media_image2.png Greyscale wherein the DCT-coefficient block comprises a DC coefficient and a plurality of AC coefficients corresponding to difference frequencies [see paragraph 0064 and 0065 respectfully which teach DC and AC coefficients, where in the case of a 16 x 16 block, there is one DC coefficient and a plurality of AC coefficient. DC coefficients indicate zero frequencies, and AC coefficients represent non zero frequencies in the context of DCT]; PNG media_image3.png 99 1202 media_image3.png Greyscale PNG media_image4.png 172 979 media_image4.png Greyscale performing a Zig-Zag scanning operation on the plurality of DCT-coefficient blocks to obtain a plurality of DCT-coefficient strips respectively [See paragraph 0071 where zigzag scanning is to obtain a stream of serialized quantized coefficients of each block]; PNG media_image5.png 206 794 media_image5.png Greyscale and concatenating at least two different DCT-coefficient strips as a modified DCT-coefficient strip [See paragraph 0023 where two of the DCT coefficient streams are modified and concatenated to create a modified sequence] ; PNG media_image6.png 294 967 media_image6.png Greyscale Thyagarajan does not teach performing an object detection operation by feeding the modified DCT-coefficient strip to a convolution neural network device. Huang teaches performing an object detection operation using a convolutional neural network device [See paragraph 0022 where a neural network can be used to perform object detection]. Huang additionally teaches using DCT and zig-zag scanning to get a one-dimensional array of the block data [see 0053]. PNG media_image7.png 298 1212 media_image7.png Greyscale PNG media_image8.png 151 1143 media_image8.png Greyscale Therefore it would have been obvious to one with ordinary skill in the art before the effective filing date to combine the compression method of Thyagarajan with the object detection model of Huang to reduce the required computing power to detect objects, as they are in the same field of endeavor of processing images. The motivation to combine would be so that "object detection accuracy may be improved" [See paragraph 0074 of Huang]. Claim 5 is similarly analyzed to claim 1 with the additional limitations of an electronic device, and two processing circuits, one for image retrieval and block segmentation, and another for the zigzag operation and concatenation [See 0092 of Thyagarajan which discloses processers, indicating processing circuits]. The above references also disclose the convolution neural network device [see above 0022 of Huang where the CNN is part of an electronic device] PNG media_image9.png 187 1072 media_image9.png Greyscale Regarding claim 2, Thyagarajan and Huang teach the object detection method according to claim 1, further comprising: obtaining a partial DCT-coefficient strip by extracting information of the DCT-coefficient block among a setting frequency range. [See paragraph 0060 of Thyagarajan which discloses that the blocks are split so that they fall into a variance (frequency) range. The splitting of the blocks indicates that the DCT- coefficient strip that is later obtained by the zig-zag scanning is partial to the entire length of the block] PNG media_image10.png 509 588 media_image10.png Greyscale Claim 8 is similarly analyzed to claim 2 with the additional limitations of claim 5 Regarding claim 3, Thyagarajan and Huang teach the object detection method according to claim 2, further comprising: setting a threshold frequency [see 0060 of Thyagarajan above where the threshold variance (frequency) is set, see the line assigning T16= 50 or T8= 1100 indicating the threshold for that particular block]; And setting the setting frequency range between the threshold frequency and a zero frequency. [See 0060 above of Thyagarajan where the blocks must fit within the range, where the high end would be the threshold frequency. Since frequency range must be under the threshold, this indicates that the low end of the range would be the zero frequency]. Claim 9 is similarly analyzed to claim 3 with the additional limitations of claim 5 Regarding claim 6, Thyagarajan and Huang teach the electronic device according to claim 5, further comprising: a memory device, coupled to the second processing circuit and the convolution neural network device, for storing data for an object detection operation [See paragraph 0019 of Huang where the memory device is coupled with the processer, and see 0022 of Huang above which teaches the CNN] . PNG media_image11.png 226 1074 media_image11.png Greyscale Regarding claim 7, Thyagarajan and Huang teach the electronic device according to claim 5, wherein the memory device is a static memory circuit [See 0138 of Huang]. PNG media_image12.png 177 1074 media_image12.png Greyscale Claims 4 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Thyagarajan in view of Huang in further view of US 5479527 (hereinafter referred to as Chen). Regarding claim 4, Thyagarajan and Huang teach the object detection method according to claim 3. They do not teach that concatenating the strips involves arraying neighboring strips in length direction to generate a modifies strip with the DC coefficient is concatenated next to the highest frequency AC coefficient of the neighbor. Chen does teach that concatenating the at least two different DCT-coefficient strips as the modified DCT-coefficient strip comprises: arranging, in a length direction, the at least two neighboring DCT-coefficient strips to generate the modified DCT-coefficient strip [see claim 1 of Chen where the second sequence is modified from the zig-zag operation, and comprises a DC coefficient followed by lengths of non-zero AC coefficient. Since the sequence is continues, it indicates that the procedure is done block by block, ensuring that the nearby strips are a part of the sequence]; PNG media_image13.png 449 1084 media_image13.png Greyscale wherein the DC coefficient of one of the neighboring DCT-coefficient strips is concatenated next to the most-frequency AC coefficient of another the neighboring DCT-coefficient strip [see claim one of Chen above where the DC coefficient is concatenated next to the AC coefficient, which start with non-zero coefficients and finish with zero AC coefficients, indicating that the higher frequency (non-zero coefficient) is concatenated right next to the DC coefficient]. Therefore it would have been obvious to one with ordinary skill in the art to combine the data manipulation of Thyagarajan and the object recognition model of Huang with the method of combining strips of AC and DC coefficients of Chen as they are in the same field of endeavor of processing images. The motivation to combine would be to create streamlined sequences of data to ensure that images can be processed with less delays, and to increase throughput of the circuit (see column 2 line 40 of Chen which discusses prior art that Chen improves on). Claim 10 is similarly analyzed to claim 4 with the additional limitations of claim 5. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Thyagarajan in view of Huang in further view of US 20180150721 (hereinafter referred to as Mostafa). Regarding claim 11, Thyagarajan and Huang teach the electronic device according to claim 5, and Huang additionally teaches that the first processing circuit is a first central processing unit [see paragraph 0132 which states that the processing can occur via a CPU, and 0127 and fig. 12 which teach a first processing circuit] PNG media_image14.png 277 1071 media_image14.png Greyscale PNG media_image15.png 130 1063 media_image15.png Greyscale and the second processing circuit is a second central processing unit [see Fig. 11 and 0110 which describes the second processing circuit], PNG media_image16.png 85 1052 media_image16.png Greyscale Thyagarajan and Huang do not teach the convolution neural network device comprises a neural processing unit. Mostafa does teach that the CNN incorporates a neural processing unit [See 0042 of Mostafa where a NPU is used in association with the convolution processing apparatus with the CNN] PNG media_image17.png 440 890 media_image17.png Greyscale Therefore it would have been obvious to combine before the effective filing date to one with ordinary skill in the art to combine the electronic device and processing circuits of Thyagarajan and Huang with the NPU of Mostafa as they are in the same field of endeavor of processing images,. The motivation to combine would be to increase efficiency of computing AI and machine learning related tasks. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANUSHA KASHYAPA whose telephone number is (571)272-8766. The examiner can normally be reached Monday-Friday 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chan Park can be reached at (571) 272-7409. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANUSHA KASHYAPA/Examiner, Art Unit 2669 /CHAN S PARK/Supervisory Patent Examiner, Art Unit 2669
Read full office action

Prosecution Timeline

Dec 10, 2024
Application Filed
Jul 30, 2026
Non-Final Rejection mailed — §103 (current)

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
Grant Probability
Low
PTA Risk
Based on 0 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month