DETAILED ACTION
1. This Office Action is responsive to claims filed for No. 18/978,375 on April 2, 2026. Please note Claims 1, 2, 6-10 and 14-22 are pending.
Notice of Pre-AIA or AIA Status
2. The present application is being examined under the pre-AIA first to invent provisions.
Continued Examination Under 37 CFR 1.114
3. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on April 2, 2026 has been entered.
Claim Rejections - 35 USC § 103
4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
6. Claims 1, 2, 6, 8-10, 14 and 16-22 are rejected under 35 U.S.C. 103 as being unpatentable over An et al. ( US 2025/0174192 A1 ) in view of An et al. ( US 2024/0221647 A1 ), hereinafter referred to as An2.
An teaches in Claim 1:
An electroluminescent display apparatus ( [0002] discloses a display device ), comprising:
a display panel including a target pixel for sensing and a data line connected to the target pixel ( Figure 1, [0051] discloses an OLED display panel 110, including pixels PX which can receive sensing signals SS and data voltages along data lines DL );
a data driver configured to supply a display data voltage to the target pixel via the data line in an image writing period ( Figure 10, [0105] discloses step S330 of applying data voltages to the pixels in a data writing period ), supply a sensing data voltage to the target pixel via the data line in a sensing period ( Figure 10, [0105] discloses step S340 of performing a sensing operation to the at least one pixel in a sensing period ), supply a luminance compensation data voltage to the target pixel via the data line in a sensing line compensation period ( Figure 10, [0105] discloses step S350 of applying an initialization voltage to the at least one pixel in a second pre-charge period ), and supply a luminance recovery data voltage to the target pixel via the data line in a recovery period ( Figure 10, [0105] discloses step S360 of applying a previous data voltage to the at least one pixel. Other aspects describe this process as a recovery data writing in the blank period, [0103], etc ); and
a sensing circuit configured to sense an electrical characteristic of the target pixel based on the sensing data voltage in the sensing period ( Figure 1, [0050], [0065] discloses a sensing circuit 150 to sense a driving characteristic, such as threshold voltage, of the driving transistor TDR by measuring a sensing current ISEN through the sensing line SL ),
wherein the image writing period, the sensing period, the sensing line compensation period, and the recovery period are sequentially arranged in one frame ( Figures 9 and 10, [0105] disclose the flowchart of steps describing these claimed periods in sequence, and in one frame );
wherein the one frame includes a vertical blank period outside the image writing period ( Figure 9, [0102], [0067] discloses the blank period between/outside the active periods (the image writing period) is a vertical blank period ), the vertical blank period including the sensing period, the sensing line compensation period, and the recovery period ( Abstract notes each of the periods, described above in Figure 10 steps s340-s360, occur in the blank period ); but
An does not explicitly teach “wherein the luminance compensation data voltage has a voltage level higher than the display data voltage, wherein the luminance recovery data voltage is within a recovery voltage range from the display data voltage to the luminance compensation data voltage” and to expand on that, “wherein the target pixel is configured to have: a first luminance corresponding to the display data voltage in the image writing period; a second luminance lower than the first luminance in the sensing period; a third luminance higher than the first luminance and corresponding to the luminance compensation data voltage in the sensing line compensation period; and a fourth luminance lower than the third luminance, equal to or higher than the first luminance, and corresponding to the luminance recovery data voltage in the recovery period.”
Initially, An teaches in Figures 7 and 8, [0090]+ of data writing with a voltage value, as well as a recovery data with a voltage value as well. However, despite these, An may not explicitly teach of the above claimed aspects.
However, in the same field of endeavor, displays with sensing and recovery aspects, An2 teaches of a similar sequencing of driving, ( An2, Figure 4, [0069] ), namely of applying data voltages, performing a sensing operation, applying a pre-charge data voltage after the sensing operation and then applying a previous data voltage after a predetermined time (akin to An’s recovery aspects). An2 teaches in Figure 5, [0074] of a sensing period SP, pre-charge data application period CDAP (akin to An’s initialization voltage application during the second pre-charge period) and a recovery data application period RDAP (akin to An’s applying of a previous data voltage). Notably, An2 teaches:
“wherein the luminance compensation data voltage has a voltage level higher than the display data voltage ( An2, Figure 5, [0077] discloses a pre-charge data voltage CDV to the pixel PX after the sensing operation, with a voltage of about 10V. This is higher than the data voltage of about 4V, as detailed in [0063] ) and wherein the luminance recovery data voltage is within a recovery voltage range including the display data voltage and the luminance compensation data voltage ( An2, Figure 5, [0065] discloses a PDV value, applied during the RDAP period, of about 4V, which is within a range of the data voltage and the pre-charge data voltage CDV )” and
“wherein the target pixel is configured to have: a first luminance corresponding to the display data voltage in the image writing period ( An2, Figure 5, discloses during an active period AP, of a data voltage during emission (read as an akin image writing period). [0057], [0077] disclose examples of a maximum voltage of 8V and this depends on the data voltage needed for image emission. Please note the voltage at the gate node, which shows 16V as a maximum as well ); a second luminance lower than the first luminance in the sensing period ( Figure 5 shows a voltage during SIP/SP, which is a sensing period and this has an SDV of 6V, leading to a gate node voltage of 6V up to 8V, which is less than the maximum during the active period ); a third luminance higher than the first luminance and corresponding to the luminance compensation data voltage in the sensing line compensation period ( Figure 5, [0065] discloses CDAP/BEP1 (read as an akin sensing line compensation period) which has a voltage up to 22V ); and a fourth luminance lower than the third luminance, equal to or higher than the first luminance, and corresponding to the luminance recovery data voltage in the recovery period. ( Figure 5 shows RDAP (read as akin to the luminance recovery data period) with starts at 22V and decreases, within the range of being equal to a higher than the interpreted first luminance )”
Therefore, it would have been obvious to one of ordinary skill in the art, at the effective filed date of the invention, to implement the explicit data voltages, as taught by An2, with the motivation that by using these voltage ranges, effective operation can be achieved. For example, the sensing line compensation should be higher than the data voltage so as to offset the loss of luminance. Furthermore, the recovery voltage can prevent the horizontal bright line, ( Anh2, [0064] ).
An2 teaches in Claim 2:
The electroluminescent display apparatus of claim 1, wherein the luminance recovery data voltage has a same voltage level as the display data voltage and the fourth luminance is equal to the first luminance. ( Figure 5, [0075], [0093] discloses PDV and DV are both 4V )
An teaches in Claim 6:
The electroluminescent display apparatus of claim 20, wherein the length of the recovery period increases as the frame frequency is lowered. ( Figure 9 shows that for a low frame rate situation, the blank period is increased and this impacts the start time and duration of the recovery data writing, as detailed above. Respectfully, at lower frequencies, one of ordinary skill in the art realizes data recovery and in general, blank periods are increased )
An teaches in Claim 8:
The electroluminescent display apparatus of claim 1, further comprising: a gate driver configured to supply the target pixel with a first gate pulse synchronized with the display data voltage in the image writing period ( Figure 1, [0066] discloses a scan driver 130 providing scan signals SC, and in conjunction with the data voltage, causes a pixel to emit ), supply the target pixel with a second gate pulse synchronized with the sensing data voltage in the sensing period ( Figure 1, [0078] discloses the scan driver 130 providing sensing signals SS with an activation level and this synchronizes with the sensing current ISEN provided by sensing circuit 150 ), supply the target pixel with a third gate pulse synchronized with the luminance compensation data voltage in the sensing line compensation period ( An2, Figure 5, [0078] discloses the sensing signal SS may have the on-level during CDAP. To clarify, An2 also provides the sensing signal from the scan driver 130, as shown in Figure 1. One of ordinary skill in the art would realize the scan driver of An could provide the same sensing signal to also be starting pulse for the CDAP/second pre-charge period ) and supply the target pixel with a fourth gate pulse synchronized with the luminance recovery data voltage in the recovery period. ( An2, Figure 5, [0081] discloses the sensing signal SS may have the on-level during RDAP. To clarify, An2 also provides the sensing signal from the scan driver 130, as shown in Figure 1. One of ordinary skill in the art would realize the scan driver of An could provide the same sensing signal to also be starting pulse for the RDAP/recovery data writing )
An teaches in Claim 9:
A driving method ( [0002] discloses a display device and associated driving method ) of an electroluminescent display apparatus including a display panel including a target pixel for sensing and a data line connected to the target pixel ( Figure 1, [0051] discloses an OLED display panel 110, including pixels PX which can receive sensing signals SS and data voltages along data lines DL ), the driving method comprising:
supplying a display data voltage to the target pixel via the data line in an image writing period ( Figure 10, [0105] discloses step S330 of applying data voltages to the pixels in a data writing period );
supplying a sensing data voltage to the target pixel via the data line in a sensing period ( Figure 10, [0105] discloses step S340 of performing a sensing operation to the at least one pixel in a sensing period );
supplying a luminance compensation data voltage to the target pixel via the data line in a sensing line compensation period ( Figure 10, [0105] discloses step S350 of applying an initialization voltage to the at least one pixel in a second pre-charge period );
supplying a luminance recovery data voltage to the target pixel via the data line in a recovery period ( Figure 10, [0105] discloses step S360 of applying a previous data voltage to the at least one pixel. Other aspects describe this process as a recovery data writing in the blank period, [0103], etc ); and
sensing an electrical characteristic of the target pixel based on the sensing data voltage in the sensing period ( Figure 1, [0050], [0065] discloses a sensing circuit 150 to sense a driving characteristic, such as threshold voltage, of the driving transistor TDR by measuring a sensing current ISEN through the sensing line SL ),
wherein the image writing period, the sensing period, the sensing line compensation period, and the recovery period are sequentially arranged in one frame ( Figures 9 and 10, [0105] disclose the flowchart of steps describing these claimed periods in sequence, and in one frame );
wherein the one frame includes a vertical blank period outside the image writing period ( Figure 9, [0102], [0067] discloses the blank period between/outside the active periods (the image writing period) is a vertical blank period ), the vertical blank period including the sensing period, the sensing line compensation period, and the recovery period ( Abstract notes each of the periods, described above in Figure 10 steps s340-s360, occur in the blank period ); but
An does not explicitly teach “wherein the luminance compensation data voltage has a voltage level higher than the display data voltage, wherein the luminance recovery data voltage is within a recovery voltage range from the display data voltage to the luminance compensation data voltage” and to expand on that, “wherein the target pixel is configured to have: a first luminance corresponding to the display data voltage in the image writing period; a second luminance lower than the first luminance in the sensing period; a third luminance higher than the first luminance and corresponding to the luminance compensation data voltage in the sensing line compensation period; and a fourth luminance lower than the third luminance, equal to or higher than the first luminance, and corresponding to the luminance recovery data voltage in the recovery period.”
Initially, An teaches in Figures 7 and 8, [0090]+ of data writing with a voltage value, as well as a recovery data with a voltage value as well. However, despite these, An may not explicitly teach of the above claimed aspects.
However, in the same field of endeavor, displays with sensing and recovery aspects, An2 teaches of a similar sequencing of driving, ( An2, Figure 4, [0069] ), namely of applying data voltages, performing a sensing operation, applying a pre-charge data voltage after the sensing operation and then applying a previous data voltage after a predetermined time (akin to An’s recovery aspects). An2 teaches in Figure 5, [0074] of a sensing period SP, pre-charge data application period CDAP (akin to An’s initialization voltage application during the second pre-charge period) and a recovery data application period RDAP (akin to An’s applying of a previous data voltage). Notably, An2 teaches:
“wherein the luminance compensation data voltage has a voltage level higher than the display data voltage ( An2, Figure 5, [0077] discloses a pre-charge data voltage CDV to the pixel PX after the sensing operation, with a voltage of about 10V. This is higher than the data voltage of about 4V, as detailed in [0063] ) and wherein the luminance recovery data voltage is within a recovery voltage range including the display data voltage and the luminance compensation data voltage ( An2, Figure 5, [0065] discloses a PDV value, applied during the RDAP period, of about 4V, which is within a range of the data voltage and the pre-charge data voltage CDV )” and
“wherein the target pixel is configured to have: a first luminance corresponding to the display data voltage in the image writing period ( An2, Figure 5, discloses during an active period AP, of a data voltage during emission (read as an akin image writing period). [0057], [0077] disclose examples of a maximum voltage of 8V and this depends on the data voltage needed for image emission. Please note the voltage at the gate node, which shows 16V as a maximum as well ); a second luminance lower than the first luminance in the sensing period ( Figure 5 shows a voltage during SIP/SP, which is a sensing period and this has an SDV of 6V, leading to a gate node voltage of 6V up to 8V, which is less than the maximum during the active period ); a third luminance higher than the first luminance and corresponding to the luminance compensation data voltage in the sensing line compensation period ( Figure 5, [0065] discloses CDAP/BEP1 (read as an akin sensing line compensation period) which has a voltage up to 22V ); and a fourth luminance lower than the third luminance, equal to or higher than the first luminance, and corresponding to the luminance recovery data voltage in the recovery period. ( Figure 5 shows RDAP (read as akin to the luminance recovery data period) with starts at 22V and decreases, within the range of being equal to a higher than the interpreted first luminance )”
Therefore, it would have been obvious to one of ordinary skill in the art, at the effective filed date of the invention, to implement the explicit data voltages, as taught by An2, with the motivation that by using these voltage ranges, effective operation can be achieved. For example, the sensing line compensation should be higher than the data voltage so as to offset the loss of luminance. Furthermore, the recovery voltage can prevent the horizontal bright line, ( Anh2, [0064] ).
An2 teaches in Claim 10:
The driving method of claim 9, wherein the luminance recovery data voltage has a same voltage level as the display data voltage, and the fourth luminance is equal to the first luminance ( Figure 5, [0075], [0093] discloses PDV and DV are both 4V )
An teaches in Claim 14:
The driving method of claim 17, wherein the length of the recovery period increases as the frame frequency is lowered. ( Figure 9 shows that for a low frame rate situation, the blank period is increased and this impacts the start time and duration of the recovery data writing, as detailed above. Respectfully, at lower frequencies, one of ordinary skill in the art realizes data recovery and in general, blank periods are increased )
An teaches in Claim 16:
The driving method of claim 9, further comprising:
supplying the target pixel with a first gate pulse synchronized with the display data voltage in the image writing period ( Figure 1, [0066] discloses a scan driver 130 providing scan signals SC, and in conjunction with the data voltage, causes a pixel to emit );
supplying the target pixel with a second gate pulse synchronized with the sensing data voltage in the sensing period ( Figure 1, [0078] discloses the scan driver 130 providing sensing signals SS with an activation level and this synchronizes with the sensing current ISEN provided by sensing circuit 150 );
supplying the target pixel with a third gate pulse synchronized with the luminance compensation data voltage in the sensing line compensation period ( An2, Figure 5, [0078] discloses the sensing signal SS may have the on-level during CDAP. To clarify, An2 also provides the sensing signal from the scan driver 130, as shown in Figure 1. One of ordinary skill in the art would realize the scan driver of An could provide the same sensing signal to also be starting pulse for the CDAP/second pre-charge period ); and
supplying the target pixel with a fourth gate pulse synchronized with the luminance recovery data voltage in the recovery period. ( An2, Figure 5, [0081] discloses the sensing signal SS may have the on-level during RDAP. To clarify, An2 also provides the sensing signal from the scan driver 130, as shown in Figure 1. One of ordinary skill in the art would realize the scan driver of An could provide the same sensing signal to also be starting pulse for the RDAP/recovery data writing )
An teaches in Claim 17:
The driving method of claim 9, wherein the display panel has a frame frequency that is variable based on a variable length of the vertical blank period ( Figure 9, [0103] discloses the blank period has a length corresponding to the frame rate, i.e. high or low (read as variable length of the vertical blank period) ), a length of the sensing line compensation period is fixed based on a maximum frame frequency within a variable range of the frame frequency ( [0075] discloses the length of the second pre-charge is based on the maximum frame rate. As such, the length is fixed/based on a wide range, including the maximum. Respectfully, this limitation is broad ), and a length of the recovery period is changed based on a change in the frame frequency ( Figure 9, [0103] discloses different lengths for the blank period and this affects the start time point and duration of the recovery data writing. To clarify, An teaches to vary the duration of periods for low and high frame rate situations, as shown in Figure 9 )
An2 teaches in Claim 18:
The driving method of claim 9, wherein the target pixel is configured to maintain the fourth luminance until the target pixel is supplied with a next display data voltage in an image writing period in a next frame following the one frame. ( An2, Figure 5 shows RDAP being followed by BEP2, which leads into the next active period, as shown by the 16V )
An teaches in Claim 19:
The driving method of claim 9, wherein the second luminance corresponds to a black gray level. ( Respectfully, sensing voltages are done during a blanking period and are often black voltages, such as black frame insertion, etc. Examiner asserts Official Notice to this being well known )
An teaches in Claim 20:
The electroluminescent display apparatus of claim 1, wherein the display panel has a frame frequency that is variable based on a variable length of the vertical blank period ( Figure 9, [0103] discloses the blank period has a length corresponding to the frame rate, i.e. high or low (read as variable length of the vertical blank period) ), a length of the sensing line compensation period is fixed based on a maximum frame frequency within a variable range of the frame frequency ( [0075] discloses the length of the second pre-charge is based on the maximum frame rate. As such, the length is fixed/based on a wide range, including the maximum. Respectfully, this limitation is broad ), and a length of the recovery period is changed based on a change in the frame frequency. ( Figure 9, [0103] discloses different lengths for the blank period and this affects the start time point and duration of the recovery data writing. To clarify, An teaches to vary the duration of periods for low and high frame rate situations, as shown in Figure 9 )
An teaches in Claim 21:
The electroluminescent display apparatus of claim 1, wherein the target pixel is configured to maintain the fourth luminance until the target pixel is supplied with a next display data voltage in an image writing period in a next frame following the one frame. ( An2, Figure 5 shows RDAP being followed by BEP2, which leads into the next active period, as shown by the 16V )
An teaches in Claim 22:
The electroluminescent display apparatus of claim 1, wherein the second luminance corresponds to a black gray level. ( Respectfully, sensing voltages are done during a blanking period and are often black voltages, such as black frame insertion, etc. Examiner asserts Official Notice to this being well known )
7. Claims 7 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over An et al. ( US 2025/0174192 A1 ) in view of An et al. ( US 2024/0221647 A1 ), hereinafter
referred to as An2, as applied to Claim 1, further in view of Noh et al.
( US 2022/0036812 A1 ).
As per Claim 7:
An does not explicitly teach “wherein a compensation gain for determining a level of the luminance compensation data voltage is differentially set based on a position of a pixel line including the target pixel.”
However, in the same field of endeavor, displays with sensing and recovery aspects, Noh teaches to apply compensation gains to pixels of sensing pixel group lines, ( Noh, [0046] ). Notably, specific pixel group lines are applied various sensing data voltages and compensation gains are subsequently applied. Please note multiple data voltages can be applied depending on the specific group line (read as based on a position of a pixel line including the target pixel).
Therefore, it would have been obvious to one of ordinary skill in the art, at the effective filed date of the invention, to apply different compensation gains, as taught by Noh, with the motivation that different sensing group lines may have different characteristics and more effective compensation can be achieved by considering the position of the pixel, ( Noh, [0046] ).
As per Claim 15:
An does not explicitly teach “wherein a compensation gain for determining a level of the luminance compensation data voltage is differentially set based on a position of a pixel line including the target pixel.”
However, in the same field of endeavor, displays with sensing and recovery aspects, Noh teaches to apply compensation gains to pixels of sensing pixel group lines, ( Noh, [0046] ). Notably, specific pixel group lines are applied various sensing data voltages and compensation gains are subsequently applied. Please note multiple data voltages can be applied depending on the specific group line (read as based on a position of a pixel line including the target pixel).
Therefore, it would have been obvious to one of ordinary skill in the art, at the effective filed date of the invention, to apply different compensation gains, as taught by Noh, with the motivation that different sensing group lines may have different characteristics and more effective compensation can be achieved by considering the position of the pixel, ( Noh, [0046] ).
Response to Arguments
8. Applicant’s arguments considered, but are respectfully not persuasive.
Please note the updated rejection in light of the claim amendments.
Please note An2 has been cited for the new amendments, notably Figure 5. Applicant does not provide any specific arguments against the combination as well.
Conclusion
9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DENNIS P JOSEPH whose telephone number is (571)270-1459. The examiner can normally be reached Monday - Friday 5:30 - 3:30 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amr Awad can be reached at 571-272-7764. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DENNIS P JOSEPH/Primary Examiner, Art Unit 2621
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