Office Action Predictor
Last updated: April 16, 2026
Application No. 18/978,551

DISPLAY DEVICE AND METHOD OF CONTROLLING THE SAME

Final Rejection §103
Filed
Dec 12, 2024
Examiner
MERCEDES, DISMERY E
Art Unit
2627
Tech Center
2600 — Communications
Assignee
Lg Display Co., LTD.
OA Round
2 (Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
2y 6m
To Grant
90%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
740 granted / 964 resolved
+14.8% vs TC avg
Moderate +13% lift
Without
With
+13.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
29 currently pending
Career history
993
Total Applications
across all art units

Statute-Specific Performance

§101
2.8%
-37.2% vs TC avg
§103
52.0%
+12.0% vs TC avg
§102
21.5%
-18.5% vs TC avg
§112
17.6%
-22.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 964 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 12, 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shao et al. (US 2020/0202807) in view of Jeoung et al. (US 2016/0155409). As to Claim 12, Shao et al. discloses A method of controlling a display device including a display panel and a gate driving circuit having a plurality of stages for providing a gate signal to the display panel (fig.8; para.0061-0062), the method comprising: when the gate driving circuit is powered off, applying a first discharge signal to all input terminals of the gate driving circuit (fig.1c-2, para.0038; shutdown discharge period t2, all signals applied to the shutdown-discharge control port Xon, the first reference voltage port VDD, the second reference voltage port VGL, and the clock port CLK, are simultaneously set to a first voltage level (a high voltage level)); discharging a Q node and a gate signal output node by applying a second discharge signal to a QB node of an N-th stage included in the gate driving circuit (para. 0039- pull up node PU and output are discharged during the shutdown discharge period t2; para.0048- the first sub-circuit 41 is configured, under control of the first signal provided at the first reference voltage port VDD1, to control a voltage level at the first pull-down node PD1 to be at the first voltage level and to set a voltage level of the pull-up node PU and the output port Output to a same voltage level of the second signal applied to the second reference voltage port VGL; para.0058); and applying a third discharge signal to a QB node discharge transistor of the N-th stage configured to discharge the QB node, where N is a positive integer, and wherein the first discharge signal is in a high voltage state (para.0038- all signals set a high level voltage during shutdown period t2) Shao et al. does not expressly disclose applying a third discharge signal to a QB node discharge transistor of the N-th stage configured to discharge the QB node. Jeoung et al. discloses a third discharge signal to a QB node discharge transistor of the N-th stage configured to discharge the QB node (fig.5, para.0054, transistor T2 discharges node N2 in response to control signal CS; para.0091- during power off sequence, transistors connected to the node controller CS are discharged). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Shao et al. with the teachings of Jeong et al., the motivation being to so that the nodes are more thoroughly discharged, and the transistors connected to nodes are less likely to be stressed, thereby increasing the lifespan and reliability of the display device. discharge the nodes As to Claim 16, Shao et al. in view of Jeong et al. disclose wherein the input terminals include a start signal/carry signal (VST/CRY) input terminal (Jeoung-fig 1, Vst, para.0034), a high-voltage power (VDD) input terminal (Shao-fig.1c-3-Vdd; Jeoung- fig.10-VH1,VH2), a clock signal (CLK) input terminal (fig.1c-3- CLK; Jeoung-fig.10, CLK), a stable signal (Stable) input terminal (Shao-fig.1c-3; Reset). a first low-voltage power (VSS) input terminal (Jeoung-fig.10, Vss), and a second low-voltage power (VGL) input terminal (fig.1c-3; VGL). Allowable Subject Matter Claims 1-11, 13-14 allowed. The following is a statement of reasons for the indication of allowable subject matter: Independent Claims 1, 13 are allowable over the prior art of record for the reasons noted in office action 09/30/2025. Claim 15 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant’s arguments with respect to claim(s) 12 have been considered but are moot because the new ground of rejection applied as necessitated by amendment. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: see PTO-892 form. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DISMERY E. MERCEDES whose telephone number is (571)272-7558. The examiner can normally be reached Monday-Friday, 9am-5pm, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571-272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DISMERY MERCEDES/Primary Examiner, Art Unit 2627
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Prosecution Timeline

Dec 12, 2024
Application Filed
Sep 24, 2025
Non-Final Rejection — §103
Dec 02, 2025
Response Filed
Feb 07, 2026
Final Rejection — §103
Apr 03, 2026
Response after Non-Final Action

Precedent Cases

Applications granted by this same examiner with similar technology

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FOLDABLE DISPLAY DEVICE AND METHOD FOR COMPENSATING FOR DETERIORATION OF FLEXIBLE DISPLAY PANEL
2y 5m to grant Granted Apr 07, 2026
Patent 12597387
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Patent 12597383
Display Panel and Display Device Including the Same
2y 5m to grant Granted Apr 07, 2026
Patent 12586508
ASYNCHRONOUS DISPLAY PIXEL DATA STREAMING OVER I/O CONNECTIONS
2y 5m to grant Granted Mar 24, 2026
Patent 12578768
PARALLEL MOTION TRACKPAD
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
77%
Grant Probability
90%
With Interview (+13.0%)
2y 6m
Median Time to Grant
Moderate
PTA Risk
Based on 964 resolved cases by this examiner. Grant probability derived from career allow rate.

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