DETAILED ACTION
This office action is in response to the application filed on 12/12/2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Inventorship
This application currently names joint inventors. In considering patentability of the claims under 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various claims was commonly owned at the time any inventions covered therein were made absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was not commonly owned at the time a later invention was made in order for the examiner to consider the applicability of 35 U.S.C. 103(c) and potential 35 U.S.C. 102(e), (f) or (g) prior art under 35 U.S.C. 103(a).
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 4 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claim 4 recites the limitation "wherein the first DC voltage and the second DC voltage are equal or not equal". The Examiner notes this limitation is redundant, seemingly does not further limit the limitation and thus renders the limitation unclear.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 4, 5 and 15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3, 4 and 14 of U.S. Patent No. 12218587, hereinafter ‘587. Although the claims at issue are not identical, they are not patentably distinct from each other.
Regarding claim 1, ‘587 teaches A voltage converter for converting an input voltage to an output voltage, the voltage converter comprising: a coil; multiple switches including one or more switches connected to the coil; a modulation signal generator configured to: receive the output voltage and one or more detection signals indicating a magnitude of a coil current flowing through the coil; and generate a first signal and a second signal based at least in part upon the output voltage and the one or more detection signals; and an operation mode controller configured to: receive the input voltage, the output voltage, the first signal, and the second signal; and generate one or more mode signals based at least in part upon the input voltage, the output voltage, the first signal, and the second signal; wherein the one or more mode signals indicate that the voltage converter operates in an operation mode selected from multiple operation modes. (Claim 1)
Regarding claim 4, ‘587 teaches the input voltage is a first DC voltage; and the output voltage is a second DC voltage; wherein the first DC voltage and the second DC voltage are equal or not equal. (claim 3)
Regarding claim 5, ‘587 teaches further comprising: a current detector including one or more resistors and one or more amplifiers; wherein: the one or more resistors are configured to allow the coil current to flow through the one or more resistors; and the one or more amplifiers are coupled to the one or more resistors and configured to generate the one or more detection signals indicating the magnitude of the coil current. (Claim 4)
Regarding claim 15, ‘587 teaches each signal of the first signal and the second signal is a pulse-width-modulation signal. (claim 14)
Allowable Subject Matter
Claims 34-49 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 34, the prior art fails to disclose: “...generate one or more mode signals based at least in part upon the input voltage, the output voltage, and the one or more detection signals; and a control signal generator configured to: receive the one or more mode signals; and generate multiple control signals based at least in part on the one or more mode signals; wherein the one or more mode signals indicate that the voltage converter operates in an operation mode selected from multiple operation modes; wherein the multiple control signals correspond to the operation mode selected from the multiple operation modes.” in combination with the additionally claimed features, as are claimed by the Applicant.
Regarding claim 38, the prior art fails to disclose: “...generate one or more mode signals based at least in part upon the input voltage, the output voltage, and the one or more detection signals; wherein the one or more mode signals indicate that the voltage converter operates in an operation mode selected from multiple operation modes; wherein the multiple operation modes include a first operation mode, a second operation mode, and a third operation mode.” in combination with the additionally claimed features, as are claimed by the Applicant.
Regarding claim 42, the prior art fails to disclose: “...generate one or more mode signals based at least in part upon the input voltage, the output voltage, and the one or more detection signals; wherein the one or more mode signals indicate that the voltage converter operates in an operation mode selected from multiple operation modes; wherein the modulation signal generator includes: a voltage adder configured to receive a first detection signal of the one or more detection signals and generate a first processed signal; and a voltage subtractor configured to receive a second detection signal of the one or more detection signals and generate a second processed signal.” in combination with the additionally claimed features, as are claimed by the Applicant.
Regarding claim 46, the prior art fails to disclose: “...generate one or more mode signals based at least in part upon the input voltage, the output voltage, and the one or more detection signals; wherein the one or more mode signals indicate that the voltage converter operates in an operation mode selected from multiple operation modes; wherein: the one or more mode signals include a first mode signal, a second mode signal, a third mode signal, and a fourth mode signal; wherein each mode signal of the first mode signal, the second mode signal, the third mode signal, and the fourth mode signal is at a logic high level or a logic low level.” in combination with the additionally claimed features, as are claimed by the Applicant.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE J MOODY whose telephone number is (571)272-5242. The examiner can normally be reached on M-F 10 AM - 4 PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KYLE J MOODY/
Primary Examiner, Art Unit 2838
Prosecution Insights