Prosecution Insights
Last updated: July 17, 2026
Application No. 18/980,298

METHOD TO DYNAMICALLY REDUCE FIRST FAILURE DATA CAPTURE RESOURCE CONSUMPTION

Final Rejection §102§103
Filed
Dec 13, 2024
Examiner
HUANG, BRYAN PAI SONG
Art Unit
2114
Tech Center
2100 — Computer Architecture & Software
Assignee
International Business Machines Corporation
OA Round
2 (Final)
83%
Grant Probability
Favorable
3-4
OA Rounds
9m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
19 granted / 23 resolved
+27.6% vs TC avg
Minimal +5% lift
Without
With
+4.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
13 currently pending
Career history
45
Total Applications
across all art units

Statute-Specific Performance

§101
7.7%
-32.3% vs TC avg
§103
81.2%
+41.2% vs TC avg
§102
8.6%
-31.4% vs TC avg
§112
2.6%
-37.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 23 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments, see REMARKS, filed May 19, 2026, with respect to rejections of claims 1, 3 – 6, 9 – 15, 18 and 19 under 35 U.S.C. 101 have been fully considered and are persuasive. Independent claims 1, 12 and 18 have been amended to integrate subject matter that was considered eligible in the previous action. Dependent claims 3 – 6, 9 – 11, 13 – 15, and 19 are therefore also eligible. The rejections of the claims under 35 U.S.C. 101 have been withdrawn. Applicant's arguments filed regarding the rejections under 35 U.S.C. 102 and 103 have been fully considered but they are not persuasive. Applicant argues that Murthikrishnan is directed to log data or pattern instances in files, not underlying candidate system elements. The Examiner respectfully disagrees. Referring to paragraphs 0063 – 0065, the patterns of Muthikrishnan are mapped to their sources, which include components and processes of the system. The patterns as viewed by the log management system as proxies for these components and processes. Disrupting these log patterns is, as viewed by the log management system, disrupting the causing elements. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 – 5, 7, 9 – 14, 16, and 18 – 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Muthukrishnan et al. (US Patent Application Publication 2023/0325294), hereinafter Muthukrishnan. Regarding claim 1, Muthukrishnan teaches a method of dynamically reducing first failure data capture (FFDC) resource consumption (Abstract, Muthukrishnan is directed to a method of detecting and addressing excessive overhead in logging. According to paragraph 0002, the logs contain warning and error conditions, therefore they are technology that allows for systems to gather and store data in the event of a failure or fault. FFDC is thus interpreted to include the logging of Muthukrishnan), the method comprising: identifying an FFDC runaway condition in a computing system (Abstract, detecting the excessive log pattern or triggering condition); analyzing a plurality of FFDC artifacts associated with the FFDC runaway condition, including identifying a set of potential causing elements (Paragraphs 0032/0033, detecting a set of log patterns from collected log data. Paragraph 0035 and 0097/0098, these log patterns are then analyzed by analytic service 110 which can identify the processes actually responsible for the patterns), wherein the set of potential causing elements includes a plurality of elements potentially responsible for causing the FFDC runaway condition (Paragraph 0097, the analytic service may facilitate determining the root cause); determining, from the set of potential causing elements, one or more actual causing elements responsible for causing the FFDC runaway condition (Paragraph 0081, the log management system may predict problematic patterns; Paragraph 0097/0098, the processes actually responsible for the log patterns may be identified), wherein determining the one or more actual causing elements includes disrupting (Paragraph 0087, log messages from particular patterns are removed, which disrupts the logging element associated with the patterns) each of the set of potential causing elements (Paragraph 0088, the removal is performed for each detected pattern that satisfies a threshold) and comparing an associated FFDC artifact with one or more of the plurality of FFDC artifacts (Referring to paragraph 0053 of the application’s specification, a test to identify the source of an FFDC artifact includes disrupting the element and comparing it to known artifacts. Referring to Fig. 4 and paragraph 0093 of Muthukrishnan, after deleting a problematic pattern, it is compared with the pattern repository to determine if it has been registered. If it has been registered, that associated remedies may be raised. In paragraph 0094, if a problematic pattern is not yet registered in the pattern repository, the pattern is identified and registered in the repository. Therefore the disruption of deleting the logs and comparison to associated artifacts is part of the determination of the actual causing elements, as part of building the pattern repository, as described in paragraph 0063), and wherein the set of potential causing elements includes a component, a process, or an address space (Paragraphs 0063 – 0065, the patterns are mapped to a source which includes a problematic database server, processor, OS, or other system component); and performing, on the one or more actual causing elements, one or more actions to address current FFDC runaway conditions (Paragraph 0081, the log management system can execute operations to reduce impact of patterns; Paragraph 0097, the report may be consumed by diagnostic applications to trigger remedial actions). Regarding claim 2, Muthukrishnan teaches the method of claim 1, wherein identifying the FFDC runaway condition includes monitoring the computing system and determining that a rate of FFDC artifact storage has increased above a threshold (Paragraph 0017, the log management system may detect a threat if the log size or count of a log pattern exceeds a threshold). Regarding claim 3, Muthukrishnan teaches the method of claim 1, wherein analyzing the plurality of FFDC artifacts associated with the FFDC runaway condition includes filtering out one or more of the plurality of FFDC artifacts based one or more criteria (Muthukrishnan teaches filtering in two potential interpretations. First, filtering out messages that are identified as problematic as part of a remedial action, as in Paragraph 0015, where logs are filtered based on severity, or Paragraph 0100, where they are filtered based on patterns; Second, filtering while capturing the data into different categories to more easily identify problematic patterns, as in Paragraph 0061, where classifiers are applied to identify patterns that are problematic). Regarding claim 4, Muthukrishnan teaches the method of claim 3, wherein the one or more criteria includes at least one of: an error severity level (Paragraph 0015, logs are filtered based on severity; Paragraph 0061, logs are filtered based on whether or not they are problematic). Regarding claim 5, Muthukrishnan teaches the method of claim 1, wherein analyzing the plurality of FFDC artifacts associated with the FFDC runaway condition is carried out by one of a machine learning model or an artificial intelligence model (Paragraphs 0069 and 0081, the profiling of patterns and analysis of patterns may both be performed by a machine learning/artificial intelligence model). Regarding claim 9, Muthukrishnan teaches the method of claim 1, wherein the one or more actions to address current FFDC runaway conditions are performed, based on referencing a policy (Paragraph 0016, the triggering conditions are interpreted as a policy), automatically by the computing system (Paragraph 0097, the remedial actions may be automatic). Regarding claim 10, Muthukrishnan teaches the method of claim 1, wherein the one or more actions includes sending a notification to a user and performing the one or more actions responsive to receiving, from the user, a response to the notification (Paragraphs 0080 and 0095 – 0097, the alert notification may instead suggest remedial actions for the administrator to perform, or alert the administrator so they can resolve the issue). Regarding claim 11, Muthukrishnan teaches the method of claim 1, further comprising cleaning up the plurality of FFDC artifacts associated with the FFDC runaway condition (Paragraphs 0087 – 0090, deleting or otherwise compressing the log files). Regarding claim 12, Muthukrishnan teaches a system for dynamically reducing FFDC resource consumption, the system comprising: a disk storage configured for storing FFDC artifacts (Paragraph 0120); one or more subsystems configured to store FFDC artifacts in the disk storage (Paragraph 0022); and a processor configured to monitor the disk storage (Claim 11). Claim 12 otherwise recites similar language to claim 1, and is similarly rejected. Claim 13 recites similar language to claim 3, and is similarly rejected. Claim 14 recites similar language to claim 4, and is similarly rejected. Regarding claim 18, Muthukrishnan teaches a computer program product comprising a computer readable storage medium and computer program instructions stored therein (Claim 17). Claim 18 otherwise recites similar language to claim 1, and is similarly rejected. Claim 19 recites similar language to claim 3, and is similarly rejected. Regarding claim 21, Muthukrishnan teaches the computer program product of claim 18, wherein the instructions to identify the FFDC runaway condition are executed to monitor a computing system (Paragraph 0016, monitoring the logs) and determine that a rate of FFDC artifact storage has increased above a threshold (Paragraph 0014 – 0016, the system is directed to identifying an increased rate of messages and controlling the log rate; Paragraph 0017, the log management system determines whether the memory size or count of a log pattern exceeds a threshold). Regarding claim 22, Muthukrishnan teaches the computer program product of claim 18, wherein the instructions to analyze the plurality of FFDC artifacts associated with the FFDC runaway condition are executed to filter out one or more of the plurality of FFDC artifacts based on one or more criteria (Paragraph 0015, messages may be filtered based on severity; Paragraph 0096, messages conforming to a problematic pattern are filtered). Regarding claim 23, Muthukrishnan teaches the computer program product of claim 22, wherein the one or more criteria includes at least one of: an error severity level (Paragraph 0015, the log messages may be filtered based on error severity), an associated subsystem (Paragraph 0096, messages conforming to a problematic pattern are filtered; Paragraphs 0063 – 0065, the problematic may be associated with a subsystem or component), or an associated workload being executed. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 6 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Muthikrishnan in view of the Wikipedia article for collation (NPL, archived from latest version before effective filing date), hereinafter Wikipedia. Regarding claim 6, Muthikrishnan teaches the method of claim 1, wherein potential causing elements have an associated number of error counts (Fig. 6). Muthikrishnan does not teach that, responsive to identifying the set of potential causing elements, ordering the set of potential causing elements based on a number of error counts. Wikipedia teaches ordering a set based on a number (Ordering, Numerical and chronological). One of ordinary skill in the art would be motivated to sort the potential causing elements found by Muthikrishnan by the amount of errors as taught by Wikipedia. They would be motivated to do so to allow the administrator viewing the set of potential causing elements to more easily identify elements more likely to be an actual causing element (Wikipedia header, collation provides the advantage of making it fast and easy for a user to find an element in the list, and because the first or last elements in a sorted list are most likely to be useful). Sorting is a very well-understood technique that improves the effectiveness of information (Wikipedia header, a human would perform a search through a sorted list unconsciously). It would be clear to one of ordinary skill in the art to apply sorting to the amount of errors because it indicates a pattern is problematic (Muthikrishnan paragraphs 0015 and 0017, severity and error count indicate a potential threat). Claim 15 recites similar language to claim 6, and is similarly rejected. Claims 8 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Muthikrishnan in view of the IEEE Dictionary (NPL, The Authoritative Dictionary of IEEE Standards Terms). Regarding claim 8, Muthikrishnan teaches the method of claim 1. Muthikrishnan does not explicitly teach that disrupting each of the set of potential causing elements is performed serially based on an ordering of the set of potential causing elements (Although Muthikrishnan indicates that each pattern is checked and scanned through on a per-pattern basis, it does not explicitly teach that the order of operations is serial). The IEEE Dictionary teaches that computer processes are either performed serially or in parallel (Page 791, parallel definition (2), page 792, parallel processing, Page 1029, serial definition (2), and serial processing). It would have been obvious to one of ordinary skill in the art that the disruption process of Muthikrishnan could be performed serially based on an ordering of the set of elements as taught by the IEEE Dictionary. It would be obvious because serial ordering is one of a limited number of commonly-known options for how processes can be performed. One of ordinary skill in the art would understand the trade-offs between processing each problematic pattern serially and in parallel. Furthermore, there is an implicit serial order of operations of Muthikrishnan Fig. 4 and paragraph 0085, where the trigger conditions for performing removal are checked on a per-pattern basis. It would be clear to one or ordinary skill in the art that, in light of Muthikrishnan paragraph 0085, the patterns would have their instances removed and analyzed in the order they meet the trigger condition. Claim 17 recites similar language to claim 8, and is similarly rejected. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRYAN PAI SONG HUANG whose telephone number is (571)272-0510. The examiner can normally be reached Monday - Friday 11:30 AM - 8:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ASHISH THOMAS can be reached at (571) 272-0631. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /B.P.H./Examiner, Art Unit 2114 /ASHISH THOMAS/Supervisory Patent Examiner, Art Unit 2114
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Prosecution Timeline

Dec 13, 2024
Application Filed
Jan 27, 2026
Non-Final Rejection mailed — §102, §103
Apr 27, 2026
Response Filed
Apr 27, 2026
Response after Non-Final Action
May 19, 2026
Response Filed
Jun 22, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
83%
Grant Probability
87%
With Interview (+4.6%)
2y 4m (~9m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 23 resolved cases by this examiner. Grant probability derived from career allowance rate.

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