DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claims 1 and 8 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3, 5, 8, 10, and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2022/0375401 hereinafter Kim).
In regards to claim 1, Kim discloses a micro-LED display apparatus, comprising:
a timing controller configured to output image data (see figure 11, timing diagram therefore there is a timing controller);
a display panel including a plurality of pixel arrays that are connected to a data line (see figure 1, display panel 100); and
a data driver configured to generate a data voltage based on the image data and apply the data voltage to the data line (see figure 5A, pixel circuit receives VDATA signal, therefore a data driver),
wherein a pixel array of the plurality of pixel arrays comprises a gate in array (GIA) circuit that provides a scan signal to a subpixel of the pixel array (see paragraph 0071, gate driver is integrated in the unit pixel in a GIA fashion), and wherein the GIA circuit comprises:
a first transistor including a gate electrode connected to a QB node of the GIA circuit, a source electrode that receives a gate high voltage, and a drain electrode that outputs an N-th carry signal (see figure 9, transistor T7cr, gate connected to QB node, source receives VGH and drain outputs CROUT(n));
a second transistor including a gate electrode connected to a Q node of the GIA circuit, a source electrode that outputs the N-th carry signal, and a drain electrode that receives an N-th carry clock signal (see figure 9, transistor T6cr, gate connected to Q node, source outputs CROUT(n) and drain receives CRCLK(n));
a third transistor including a gate electrode connected to the same QB node as the gate electrode of the first transistor, a source electrode that receives the gate high voltage, and a drain electrode that outputs an N-th scan signal (see figure 9, transistor T7r, gate connected to QB node, source receives VGH and drain outputs SCOUT2(n); and
a fourth transistor including a gate electrode connected to the same Q node as the gate electrode of the second transistor, a source electrode that outputs the N-th scan signal, and a drain electrode that receives an N- th clock signal (see figure 9, transistor T6r, gate connected to Q node, source outputs SCOUT2(n), drain receives SCCLK(2n).
In regards to claim 3, as recited in claim 1, Kim further discloses wherein the GIA circuit further comprises:
a first gate driver configured to provide a first scan signal to the subpixel (see figure 19); and
a second gate driver configured to provide a second scan signal to the subpixel (see figure 19).
In regards to claim 5, as recited in claim 3, Kim further discloses wherein the first gate driver and the second gate driver further comprise a capacitor that receives the N-th scan signal and is connected to the Q node (see figure 9, capacitor C1r connected to SCOUT2(n)).
In regards to claim 8, Kim discloses a gate driving circuit, comprising:
a gate in array (GIA) circuit configured to provide a scan signal to a subpixel (see paragraph 0071, gate driver is integrated in the unit pixel in a GIA fashion), the GIA circuit comprising:
a first transistor including a gate electrode connected to a QB node of the GIA circuit, a source electrode that receives a gate high voltage, and a drain electrode that outputs an N-th carry signal (see figure 9, transistor T7cr, gate connected to QB node, source receives VGH and drain outputs CROUT(n)); and
a second transistor including a gate electrode connected to a Q node of the GIA circuit, a source electrode that outputs the N-th carry signal, and a drain electrode that receives an N-th carry clock signals (see figure 9, transistor T6cr, gate connected to Q node, source outputs CROUT(n) and drain receives CRCLK(n));
a third transistor including a gate electrode connected to the same QB node as the gate electrode of the first transistor, a source electrode that receives the gate high voltage, and a drain electrode that outputs an N-th scan signal (see figure 9, transistor T7r, gate connected to QB node, source receives VGH and drain outputs SCOUT2(n); and
a fourth transistor including a gate electrode connected to the same Q node as the gate electrode of the second transistor, a source electrode that outputs the N-th scan signal, and a drain electrode that receives an N- th clock signal (see figure 9, transistor T6r, gate connected to Q node, source outputs SCOUT2(n), drain receives SCCLK(2n).
In regards to claim 10, as recited in claim 8, Kim further discloses wherein the GIA circuit further comprises:
a first gate driver configured to provide a first scan signal to the subpixel (see figure 19); and a second gate driver configured to provide a second scan signal to the subpixel (see figure 19).
In regards to claim 12, as recited in claim 10, Kim further discloses wherein the first gate driver and the second gate driver further comprise a capacitor that receives the N-th scan signal and is connected to the Q node (see figure 9, capacitor C1r connected to SCOUT2(n)).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 2 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2022/0139335 hereinafter Lee) in view of Kim.
In regards to claim 2, as recited in claim 1, Kim does not particularly disclose wherein the GIA circuit is on a first GIA region, a second GIA region, and a third GIA region of a display panel.
Lee teaches wherein the GIA circuit is on a first GIA region, a second GIA region, and a third GIA region of a display panel (see figure23, multiple GIA, therefore multiple GIA regions).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kim and include multiple GIA regions as taught by Lee, thereby using known techniques to yield predictable results.
In regards to claim 9, as recited in claim 8, Kim does not particularly disclose wherein the GIA circuit is on a first GIA region, a second GIA region, and a third GIA region of a display panel.
Lee teaches wherein the GIA circuit is on a first GIA region, a second GIA region, and a third GIA region of a display panel (see figure23, multiple GIA, therefore multiple GIA regions).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kim and include multiple GIA regions as taught by Lee, thereby using known techniques to yield predictable results.
Claims 6 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. (US 2018/0138256 hereinafter Han) in view of Kim.
In regards to claim 6, Kim fails to disclose wherein the N-th carry signal is a same as the N-th scan signal, and wherein the N-th carry clock signal is a same as the N-th clock signal.
Han teaches wherein the N-th carry signal is a same as the N-th scan signal, and wherein the N-th carry clock signal is a same as the N-th clock signal (see figure 9, Cout and Scout have the same timing as do the CRCLK and SCCLK signals).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kim and include the carry and scan signals being the same and the carry clock signal and clock signal are the same as taught by Han, thereby using known techniques to yield predictable results.
In regards to claim 13, as recited in claim 10, Kim fails to disclose wherein the N-th carry signal is a same as the N-th scan signal, and wherein the N-th carry clock signal is the same as the N-th clock signal.
Han teaches wherein the N-th carry signal is a same as the N-th scan signal, and wherein the N-th carry clock signal is a same as the N-th clock signal (see figure 9, Cout and Scout have the same timing as do the CRCLK and SCCLK signals).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kim and include the carry and scan signals being the same and the carry clock signal and clock signal are the same as taught by Han, thereby using known techniques to yield predictable results.
Allowable Subject Matter
Claims 7 and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/CHRISTOPHER J KOHLMAN/Primary Examiner, Art Unit 2628