Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claim 1-17 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 3-17 of U.S. Patent No. 12204214 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because.
Claim 1 is anticipated by Claim 3 of U.S. Patent No. 12204214 B2.
Claim 2 is anticipated by Claim 3 of U.S. Patent No. 12204214 B2.
Claim 3 is anticipated by Claim 3 of U.S. Patent No. 12204214 B2.
Claim 4 is anticipated by Claim 3 of U.S. Patent No. 12204214 B2.
Claim 5 is anticipated by Claim 3 and 5 of U.S. Patent No. 12204214 B2.
Claim 6 is anticipated by Claim 3 and 6 of U.S. Patent No. 12204214 B2.
Claim 7 is anticipated by Claim 3 and 8 and 9 of U.S. Patent No. 12204214 B2.
Claim 8 is anticipated by Claim 4 and 5 of U.S. Patent No. 12204214 B2.
Claim 9 is anticipated by Claim 5 of U.S. Patent No. 12204214 B2.
Claim 10 is anticipated by Claim 12 of U.S. Patent No. 12204214 B2.
Claim 11 is anticipated by Claim 12 of U.S. Patent No. 12204214 B2.
Claim 12 is anticipated by Claim 12 of U.S. Patent No. 12204214 B2.
Claim 13 is anticipated by Claim 12 of U.S. Patent No. 12204214 B2.
Claim 14 is anticipated by Claim 12 and 14 of U.S. Patent No. 12204214 B2.
Claim 15 is anticipated by Claim 12 and 15 of U.S. Patent No. 12204214 B2.
Claim 16 is anticipated by Claim 12 and 17 of U.S. Patent No. 12204214 B2.
Claim 17 is anticipated by Claim 12,17,18 of U.S. Patent No. 12204214 B2.
Allowable Subject Matter
Claim 1-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding Claim 1,
Yang et al (US 12204213 B2) discloses (Fig. 2,3a,3b) An array substrate, comprising: a base substrate (10); a first metal layer (M1) disposed on one side of the base substrate; a second metal layer (M2) disposed at one side of the first metal layer away from the base substrate, the second metal layer comprising a plurality of data lines (DL); and a pixel electrode (P) layer disposed at one side of the second metal layer away from the first metal layer, the pixel electrode layer comprising a plurality of pixel electrodes (PV1 including P); wherein the array substrate further comprises a plurality of shielding electrodes (22,23); wherein each of the shielding electrodes (22,23) is at least disposed between one of the data lines (DL) and one of the pixel electrodes (P).
The prior art does not disclose nor would it be obvious to one of ordinary skill in the art to disclose wherein each of the shielding electrodes is at least disposed between one of the data lines and one of the pixel electrodes in an area corresponding to gaps between the adjacent pixel electrodes, the adjacent shielding electrodes are partially connected in some areas, and the adjacent shielding electrodes are disconnected in some areas, orthogonal projections of the shielding electrodes projected on the base substrate partially overlap with orthogonal projections of the pixel electrodes projected on the base substrate.
Claims 2-7 depends on Claim 1, therefore are allowable.
Regarding Claim 8,
Lin et al (US 11467455) discloses (Fig. 2a-2b) An array substrate, comprising: a base substrate (100); a first metal layer (110) disposed on one side of the base substrate; a second metal layer (140) disposed on one side of the first metal layer away from the base substrate, the second metal layer comprising a plurality of data lines (142); and a pixel electrode layer (190) disposed on one side of the second metal layer away from the first metal layer, the pixel electrode layer comprising a plurality of pixel electrodes (190); wherein the array substrate further comprises a plurality of shielding electrodes (170); wherein each of the shielding electrodes (170) is at least disposed between one of the data lines (142) and one of the pixel electrodes (190), the shielding electrodes (170) are arranged corresponding to the pixel electrodes (190) respectively.
The prior art does not disclose nor would it be obvious to one of ordinary skill in the art to disclose wherein the adjacent shielding electrodes arranged corresponding to the adjacent pixel electrodes are electrically insulated from each other; along a direction perpendicular to a direction of the data line, a widest width of an orthogonal projection of the shielding electrode projected on the base substrate is less than a shortest width of an orthogonal projection of the pixel electrode projected on the base substrate.
Claims 9 depends on Claim 8, therefore are allowable.
Regarding Claim 10,
Yang et al (US 12204213 B2) discloses (Fig. 2,3a,3b) A liquid crystal display panel, comprising: an array substrate (100), a color filter substrate (160), and a liquid crystal layer (LC) disposed between the array substrate and the color filter substrate, wherein the array substrate comprises: a base substrate (100); a first metal layer (110) disposed on one side of the base substrate; a second metal layer (140) disposed at one side of the first metal layer away from the base substrate, the second metal layer comprising a plurality of data lines (142); and a pixel electrode layer (190) disposed at one side of the second metal layer away from the first metal layer, the pixel electrode layer (190) comprising a plurality of pixel electrodes (190); wherein the array substrate further comprises a plurality of shielding electrodes (170).
The prior art does not disclose nor would it be obvious to one of ordinary skill in the art to disclose wherein each of the shielding electrodes is at least disposed between one of the data lines and one of the pixel electrodes, in an area corresponding to gaps between the adjacent pixel electrodes, the adjacent shielding electrodes are partially connected in some areas, and the adjacent shielding electrodes are disconnected in some areas, orthogonal projections of the shielding electrodes projected on the base substrate partially overlap with orthogonal projections of the pixel electrodes projected on the base substrate .
Claims 11-17 depends on Claim 10, therefore are allowable.
Conclusion
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/LUCY P CHIEN/Primary Examiner, Art Unit 2871
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