DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/30/2026 has been entered.
Response to Amendment
The amendments filed 7/30/2026 have been accepted. Claims 1-19 are still pending. Claims 1, 7, 8, and 14 are amended. Applicant’s amendments to the abstract and claims have overcome each and every objection and 103 rejection previously set forth in the Non-Final Office Action mailed 4/30/2026.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-19 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-17 of U.S. Patent No. 12,169,639. Although the claims at issue are not identical, they are not patentably distinct from each other because the independent claims of the instant application are broader method and system claim versions of those presented in the patent and the dependent claims are either the same as those in the patent or cover material that would still fall under the coverage of the patent.
Instant Application
Patent
1. (Currently Amended) A method for managing data between a host and a storage device comprising: receiving a read command from a host, wherein the read command specifies first data that is to be read from non-volatile storage memory of the storage device, and wherein the read command includes parameters, and wherein one of the parameters specifies a Compute Function (CF) to be performed with the first data read from the non-volatile storage memory; in response to receiving the read command, reading the first data from the non-volatile storage memory and performing the CF using the first data read from the non-volatile storage memory and second data obtained from a storage that is external to the non-volatile storage memory of the storage device to determine a computation result wherein another one of the parameters is a flag that specifies whether to ignore one of the first data and the second data when performing the CF; and transferring the computation result to the host.
2. The method of claim 1, further comprising, before transferring the computation result, storing the computation result in a drive buffer of the storage device that is separate from the non-volatile storage memory of the storage device.
3. The method of claim 1, wherein the second data is obtained from a bus-addressable memory, and wherein the command includes a physical address of the bus-addressable memory.
4. The method of claim 3, wherein the bus-addressable memory is in the host.
5. The method of claim 3, wherein the bus-addressable memory is in another storage device.
17. A method, comprising: receiving, by a controller of a storage device, a command from a host to read data from or write data to non-volatile storage of the storage device, wherein the read or write command contains a set of parameters including: an identification of a Compute Function (CF), locations of first and second data for the CF, an address type for one or both of the locations of the first and second data, wherein the address type is configured to specify that one or both of the locations is either a bus-addressable physical memory or the non-volatile storage memory, and first and second numbers of logical blocks of the first and second data, respectively, wherein the first and second numbers of logical blocks for the data for the CF are different; in response to receiving the command, performing, by the controller, the CF using the first and second data, wherein at least one of the first and second data comprises internal data stored in the storage device or external data transferred from the host to determine a computation result; storing the computation result in a drive buffer of the storage device that is separate from the non-volatile storage; and transferring data between the drive buffer and the host in accordance with the command.
6. The method of claim 1, wherein the second data comprises coefficient data stored in a coefficient table of the storage device.
5. The non-transitory computer-readable medium of claim 4, wherein the internal data comprises coefficient data stored in a coefficient table of the storage device.
7. (Currently Amended) The method of claim 1, wherein the CF comprises one of a database query language function, a Reed-Solomon or Erasure coding operation, or a database stable operation.
2. The non-transitory computer-readable medium of claim 1, wherein the CF comprises one of an mathematical or arithmetic operation, a logical operation, a Boolean operation, a bitwise operation, a compare operation, a string operation, a database query language function, a Reed-Solomon or Erasure coding operation, a data encryption operation, or a database stable operation; the mathematical or arithmetic operation comprises one or more of: add, subtract, multiply, divide or Galois field (GF); the logical operation comprises one or more of: AND, OR, NAND, NOR, NOT or XOR; the Boolean operation comprises one or more of: AND, OR, or XOR; the bitwise operation comprises one or more of: logical shift, arithmetic shift, or rotate; the compare operation comprises one or more of: greater than, less than, or not equal to; the string operation comprises one or more of a copy, find, or compare; and the database query language function comprises one or more of: AVG( ), FIRST( ), LAST( ), MAX( ), MIN( ), and SUM( ).
8. (Currently Amended) A method for managing data between a host and a storage device comprising: receiving a command from a host to write first data to non-volatile storage memory of the storage device, wherein the command includes parameters, wherein one of the parameters specifies a Compute Function (CF) to be performed with the first data; in response to receiving the command, performing the CF using the first data and second data obtained from a storage that is external to the non-volatile storage memory of the storage device to determine a computation result wherein another one of the parameters is a flag that specifies whether to ignore one of the first data and the second data when performing the CF; and transferring the computation result to the non-volatile storage memory of the storage device.
9. The method of claim 8, further comprising, before transferring the computation result, storing the computation result in a drive buffer of the storage device that is separate from the non-volatile storage memory of the storage device.
10. The method of claim 8, wherein the second data is obtained from a bus-addressable memory, and wherein the command includes a physical address of the bus-addressable memory.
11. The method of claim 10, wherein the bus-addressable memory is in the host.
12. The method of claim 10, wherein the bus-addressable memory is in another storage device.
17. A method, comprising: receiving, by a controller of a storage device, a command from a host to read data from or write data to non-volatile storage of the storage device, wherein the read or write command contains a set of parameters including: an identification of a Compute Function (CF), locations of first and second data for the CF, an address type for one or both of the locations of the first and second data, wherein the address type is configured to specify that one or both of the locations is either a bus-addressable physical memory or the non-volatile storage memory, and first and second numbers of logical blocks of the first and second data, respectively, wherein the first and second numbers of logical blocks for the data for the CF are different; in response to receiving the command, performing, by the controller, the CF using the first and second data, wherein at least one of the first and second data comprises internal data stored in the storage device or external data transferred from the host to determine a computation result; storing the computation result in a drive buffer of the storage device that is separate from the non-volatile storage; and transferring data between the drive buffer and the host in accordance with the command.
13. The method of claim 10, wherein the second data comprises coefficient data stored in a coefficient table of the storage device.
5. The non-transitory computer-readable medium of claim 4, wherein the internal data comprises coefficient data stored in a coefficient table of the storage device.
14. (Currently Amended) A storage device comprising: a non-volatile storage memory; and a controller, wherein the controller is configured to: receive a command from a host to write first data to the non-volatile storage memory of the storage device, or read first data from the non-volatile storage device, wherein the command includes parameters, and wherein one of the parameters specifies a Compute Function (CF) to be performed with the first data; in response to receiving the command, perform the CF using the first data and second data obtained from a storage that is external to the non-volatile storage memory of the storage device to determine a computation result wherein another one of the parameters is a flag that specifies whether to ignore one of the first data and the second data when performing the CF; if the command is to write the first data, transfer the computation result to the non-volatile storage memory of the storage device; and if the command is to read the first data, transfer the computation result to the host.
15. The storage device of claim 14, further comprising a drive buffer that is separate from the non-volatile storage memory of the storage device, wherein before transferring the computation result, the controller is configured to store the computation result in the drive buffer.
16. The storage device of claim 14, wherein the second data is obtained from a bus-addressable memory, and wherein the command includes a physical address of the bus-addressable memory.
17. The storage device of claim 16, wherein the bus-addressable memory is in the host.
18. The storage device of claim 16, wherein the bus-addressable memory is in another storage device.
16. A storage device, comprising: a non-volatile storage; and a controller having a drive buffer separate from the non-volatile storage and a processor configured to: receive a command from a host to read data from or write data to the non-volatile storage, wherein the read or write command contains a set of parameters including: an identification of a Compute Function (CF), locations of first and second data for the CF, an address type for one or both of the locations of the first and second data, wherein the address type is configured to specify that one or both of the locations is either a bus-addressable physical memory or the non-volatile storage memory, and first and second numbers of logical blocks of the first and second data, respectively, wherein the first and second numbers of logical blocks for the data for the CF are different; in response to receiving the command, perform the CF using the first and second data, wherein at least one of the first and second data comprises internal data stored in the storage device or external data transferred from the host to determine a computation result; store the computation result in the drive buffer; and transfer data between the drive buffer and the host in accordance with the command.
19. The storage device of claim 16, wherein the second data comprises coefficient data stored in a coefficient table of the storage device.
5. The non-transitory computer-readable medium of claim 4, wherein the internal data comprises coefficient data stored in a coefficient table of the storage device.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5, 8-10, 12, 14-16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Piszczek et al. (US Patent 9,092,152, hereafter referred to as Piszczek) in view of Kim et al. (US PGPub 2017/0220410, hereafter referred to as Kim) in view of McCrossan et al. (US PGPub 2008/0050091, hereafter referred to as McCrossan).
Regarding claim 1, Piszczek teaches a method for managing data between a host and a storage device comprising: receiving a read command from a host wherein the read command specifies first data that is to be read from non-volatile storage memory of the storage device (Abstract, states that a read or write command can be received that has control bits that identify a computational operation (compute function) to be performed. Col. 3, lines 38-47, states that the commands can come from a host), and wherein the read command includes parameters, and wherein one of the parameters specifies a Compute Function (CF) to be performed with the first data read from the non-volatile storage memory (Col. 3, lines 34-37, states the external memory can be flash memory. Col. 4, line 58-Col. 5 line 14, describes processing a read request which involves retrieving data from the external flash memory and performing the computational operation on it. Fig. 4 and Col. 9, lines 16-29, shows the address included in the command which will have control bits (parameters) that can specify the compute function to be carried out.), in response to receiving the read command, reading the first data form the non-volatile storage memory and performing the CF using the first data read from the non-volatile storage memory and second data obtained from a storage that is external to the non-volatile storage memory of the storage device to determine a computation result (Col. 4, line 58-Col. 5 line 14, state that when a read command is received the computational operation can be determined and the result can be written to memory. While not explicitly stated that data from another memory is used, Col. 5, lines 1-4, states the operations can be add, subtract multiply, and divide which are operations that require an additional piece of data to be used in conjunction with the data read from the non-volatile memory. Since Piszczek teaches operations that require two pieces of data and data that can be external to the non-volatile memory being used for an operation (Col. 4, lines 33-54, in the description of a write command) one of ordinary skill would recognize that the additional data for an operation specified in a read command can come from a storage that is external to the non-volatile memory). Piszczek does not teach wherein another one of the parameters is a flag that specifies whether to ignore one of the first data and the second data when performing the CF or transferring the computation result to the host.
Kim teaches and transferring the computation result to the host (Paragraph [0089], states the computation result can be sent to the host). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Piszczek to use the RAID protocol of Kim so as to select the most efficient mode from a plurality of recovery modes (Kim, Paragraph [0105]). Piszczek and Kim do not teach wherein another one of the parameters is a flag that specifies whether to ignore one of the first data and the second data when performing the CF.
McCrossan teaches wherein another one of the parameters is a flag that specifies whether to ignore one of the first data and the second data (Paragraph [0269], states that an ignore flag can be set which will indicate which data not to load into the data buffer). Since both Piszczek/Kim and McCrossan teach the use of parameters it would have been obvious to one of ordinary skill in the art to combine the prior art elements according to known methods by modifying the teachings of Piszczek and Kim to utilize an ignore flag as taught in McCrossan to obtain the predictable result of wherein another one of the parameters is a flag that specifies whether to ignore one of the first data and the second data when performing the CF.
Regarding claim 2, Piszczek, Kim, and McCrossan teach all the limitations to claim 1. Piszczek further teaches before transferring the computation result, storing the computation result in a drive buffer of the storage device that is separate from the non-volatile storage memory of the storage device (Col. 4, lines 33-47, as stated in the rejection to claim 1, the data in the write command and data retrieved from the external memory can be placed in buffers which are separate from the external memory). The combination of and reason for combining are the same as those given in claim 1.
Regarding claim 3, Piszczek, Kim, and McCrossan teach all the limitations to claim 1. Piszczek further teaches wherein the second data is obtained from memory (Col. 4, lines 33-45, as the data in the write command has to be stored in a memory to begin with it means it has be obtained from a memory), a bus-addressable memory (Col. 8, lines 24-29, states the memory is bus-addressable), and wherein the command includes a physical address of the bus-addressable memory (Col. 9, lines 16-29, show that the commands include a physical address for the bus-addressable memory). Since Piszczek and Kim teach both obtaining the second data from memory and bus-addressable memory It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the memory that the second data is in with a bus-addressable memory to obtain the predictable result of wherein the second data is obtained from a bus-addressable memory.
Regarding claim 5, Piszczek, Kim, and McCrossan teach all the limitations to claim 3. Piszczek further teaches wherein the bus-addressable memory is in another storage device (Col. 4, lines 33-45, since the second data comes from a memory device at the host it means it is in another storage device). The combination of and reason for combining are the same as those given in claim 1.
Regarding claim 8-10 and 12, claims 8-10 and 12 are the method claims associated with claims 1-3 and 5. Since Piszczek, Kim, and McCrossan teach all the limitations to claims 1-3 and 5 and Piszczek further teaches receiving a command from a host to write first data to non-volatile storage memory of the storage device and transferring the computation result to the non-volatile storage memory of the storage device (Abstract and Col. 4, lines 33-47 as stated in the rejection to claim 1), they also teach all the limitations to claims 8-10 and 12; therefore the rejections to claims 1-3 and 5 also apply to claims 8-10 and 12.
Regarding claims 14-16 and 18, claims are the device claims associated with claims associated with claims 1-3, 5, 8-10, and 12. Since Piszczek, Kim, and McCrossan teach all the limitations of claims and Piszczek further teaches a non-volatile memory and a controller (Fig. 9 shows the flash memory and controllers), they also teach all the limitations 14-16 and 18; therefore the rejections to claims 1-3, 5, 8-10, and 12 also apply to claims 14-16 and 18.
Claims 4, 11, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Piszczek, Kim, and McCrossan as applied to claims 3, 10, and 16 above, and further in view of Chiang et al. (US PGPub 2017/0228302, hereafter referred to as Chiang).
Regarding claim 4, Piszczek, Kim, and McCrossan teach all the limitations to claim 3. Piszczek and Kim do not teach wherein the bus-addressable memory is in the host.
Chiang teaches wherein the memory is in the host (Fig. 1 and Paragraph [0017], shows a host system with multiple different memories). Since both Piszczek/Kim/McCrossan and Chiang teach the use of multiple memories It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the location of the bus-addressable memory of Piszczek, Kim, and McCrossan to be in the host as taught in Chiang to obtain the predictable result of wherein the bus-addressable memory is in the host (as all this does is specify the location).
Regarding claim 11, claim 11 is the method claim associated with claim 4. Since Piszczek, Kim, McCrossan, and Chiang teach all the limitations of claim 4, they also teach all the limitations of claim 11; therefore the rejection to claim 4 also applies to claim 11.
Regarding claim 17, is the device claim associated with claim 4. Since Piszczek, Kim, McCrossan, and Chiang teach all the limitations of claim 4 and Piszczek further teaches a non-volatile memory and a controller (Fig. 9 shows the flash memory and controllers), they also teach all the limitations to claim 17; therefore the rejection to claim 4 also applies to claim 17.
Claims 6 , 13, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Piszczek, Kim, and McCrossan as applied to claims 1, 8, and 14 above, and further in view of Wang et al. (US PGPub 2021/0096816, hereafter referred to as Wang).
Regarding claim 6, Piszczek, Kim, and McCrossan teach all the limitations to claim 1. Piszczek, Kim, and McCrossan do not teach wherein the second data comprises coefficient data stored in a coefficient table of the storage device.
Wang teaches wherein the second data comprises coefficient data stored in a coefficient table of the storage device (Paragraph [0040], states that one of the parameters can be a coefficient that is part of a lookup table). Since both Piszczek/Kim/McCrossan and Wang teach internal data it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the data of Piszczek, Kim, and McCrossan with that of Wang to obtain the predictable result of wherein the internal data comprises coefficient data stored in a coefficient table of the storage device.
Regarding claim 13, claim 13 is the method claim associated with claim 6. Since Piszczek, Kim, McCrossan, and Wang teach all the limitations of claim 6, they also teach all the limitations of claim 13; therefore the rejection to claim 6 also applies to claim 13.
Regarding claim 19, is the device claim associated with claim 6. Since Piszczek, Kim, McCrossan, and Wang teach all the limitations of claim 6 and Piszczek further teaches a non-volatile memory and a controller (Fig. 9 shows the flash memory and controllers), they also teach all the limitations to claim 19; therefore the rejection to claim 6 also applies to claim 19.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Piszczek, Kim, and McCrossan as applied to claim 1 above, and further in view of Kannon et al. (US PGPub 2020/0045111, hereafter referred to as Kannon).
Regarding claim 7, Piszczek, Kim, and McCrossan teach all the limitations to claim 1. Piszczek, Kim, and McCrossan do not teach wherein the CF comprises one of a database query language function, a Reed-Solomon or Erasure coding operation, or a database stable operation.
Kannon teaches wherein the CF comprises one of a database query language function, a Reed-Solomon or Erasure coding operation, or a database stable operation (Paragraphs [0074]-[0075], states that some of the functions can be erasure coding). Since both Piszczek/Kim/McCrossan and Kannon teach the use of compute functions it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the compute functions of Piszczek, Kim, and McCrossan with those of Kannon to obtain the predictable result of wherein the CF comprises one of a database query language function, a Reed-Solomon or Erasure coding operation, or a database stable operation.
Response to Arguments
Applicant’s arguments with respect to claims have been considered but are moot because the applicant amended the claims with the limitation “wherein another one of the parameters is a flag that specifies whether to ignore one of the first data and the second data when performing the CF” to overcome the prior rejections set forth in the Final Rejection mailed 4/30/2026. To address this, new reference McCrossan has been incorporated into the rejection to help teach the amended limitations of the independent claims.
Regarding applicant’s argument to the rejections of claims 2, 9, and 15, the applicant merely makes the assertion that the prior art references do not apply without providing further evidence. Therefore the rejections still hold.
Regarding applicant’s argument against the rejection of claim 7, the applicant amended the claim to overcome the Raghava reference, so the argument is moot.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS A PAPERNO whose telephone number is (571)272-8337. The examiner can normally be reached Mon-Fri 9:30-5 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hosain Alam can be reached at 571-272-3978. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/NICHOLAS A. PAPERNO/Examiner, Art Unit 2132