DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 15-20 is/are rejected under 35 U.S.C. 102(a) as being anticipated by Visser (US 20180278240 A1).
Regarding claim 15, Visser teaches a radio frequency (RF) transceiver (Visser discloses an integrated wireless transceiver circuit comprising transmitter and receiver paths (such as a power amplifier PA and low noise amplifier LNA) forming a structural unit, para. 0016-20,43-45), comprising: a balun (Visser discloses an on-chip balun circuit 10, para. 0035-42) comprising:
a first conductive winding comprising a first set of conductive spirals and a second set of conductive spirals selectively coupled to the first set of conductive spirals (Visser discloses a transceiver loop 3 corresponds to the first conductive winding, which can comprise a transmission loop and a receiver loop or multiple windings/turns. Alternatively, first antenna loop 1 and second antenna loop 2 together form the first conductive winding with switches T1 and T2 selectively coupling/enabling them, para. 0026-36);
a second conductive winding selectively coupled to a reference node, wherein the second conductive winding is configured to be inductively coupled to at least a first portion of the first conductive winding (Visser discloses a first antenna loop 1 forms a second conductive winding magnetically/inductively coupled to transceiver loop 3. First switch T1 selectively couples ground terminal A1GND of first antenna loop 1 to external ground connection pad Pg1 or shared pad Pg (reference node), para. 0026-36); and
a third conductive winding selectively coupled to the reference node, wherein the third conductive winding is configured to be inductively coupled to at least the first portion of the first conductive winding (Visser discloses a second antenna loop 2 forms a third conductive winding magnetically/inductively coupled to transceiver loop 3. Second switch T2 selectively couples ground terminal A2GND of second antenna loop 2 to external ground connection pad Pg2 or shared pad Pg (reference node), para. 0031-45).
Regarding claim 16, Visser teaches the RF transceiver of claim 15, further comprising: a first switch (Visser Mapping: Discloses first switch T1 implemented as an NMOS or PMOS field effect transistor, para. 0031-45), wherein the second conductive winding comprises a first terminal, a second terminal, and a third set of conductive spirals coupled between the first terminal and the second terminal (Visser teaches First antenna loop 1 (second conductive winding) comprises ground terminal A1GND (first terminal), antenna signal terminal A1 (second terminal), and conductive loop/spiral segments formed between them, para. 0031-45), wherein the first switch is coupled between the first terminal and the reference node (Visser discloses first switch T1 connected between ground terminal A1GND of first antenna loop 1 and ground connection pad Pg1 or shared pad Pg (reference node), para. 0031-45).
Regarding claim 17, Visser teaches the RF transceiver of claim 16, further comprising a second switch (Visser Mapping: Discloses second switch T2 implemented as an NMOS or PMOS field effect transistor), wherein the third conductive winding comprises a third terminal, a fourth terminal, and a fourth set of conductive spirals coupled between the third terminal and the fourth terminal (Visser teaches: Second antenna loop 2 (third conductive winding) comprises ground terminal A2GND (third terminal), antenna signal terminal A2 (fourth terminal), and conductive loop/spiral segments formed between them), wherein the second switch is coupled between the third terminal and the reference node (Visser discloses second switch T2 connected between ground terminal A2GND of second antenna loop 2 and ground connection pad Pg2 or shared pad Pg (reference node), para. 0031-45).
Regarding claim 18, Visser teaches the RF transceiver of claim 17, wherein the balun is configured to: operate at a first frequency band in a first mode where the first switch is closed and the second switch is open (Visser discloses an operational mode where switch T1 is closed (enabling loop 1) and switch T2 is open (disabling loop 2). Visser discloses multi-port antenna switching networks for connecting sources or loads across different frequency bands); and operate at a second frequency band in a second mode where the first switch is open and the second switch is closed (Visser discloses a second operational mode where switch T1 is open and switch T2 is closed. Selecting between multiple antenna ports/loops operating across multi-frequency standards is explicitly suggested, para. 0031-45).
Regarding claim 19, Visser teaches the RF transceiver of claim 17, further comprising a transmit path including the balun and first switch circuitry coupled to the second terminal of the second conductive winding (Visser discloses a transmit path/circuit including power amplifier PA, balun 10, and first coupling capacitor CAP1 (first switch/coupling circuitry) connected to antenna signal terminal A1 (second terminal), para. 0031-45).
Regarding claim 20, Visser teaches the RF transceiver of claim 19, wherein the transmit path further comprises second switch circuitry coupled to the fourth terminal of the third conductive winding (Visser discloses second coupling capacitor CAP2 (second switch/coupling circuitry) connected to antenna signal terminal A2 (fourth terminal) of second antenna loop 2 in the transmit path, para. 0031-45).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 2, 7, 8, and 11-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Visser in view of Frattini (US 20220165477 A1).
Regarding claim 1, Visser teaches a radio frequency (RF) transceiver, comprising:
a planar transformer (Visser discloses an on-chip planar balun circuit (transformer) 10 configured in a planar, on-chip design in a single metal layer, para. 0016-20,43-45) comprising:
a first conductive winding comprising a first set of conductive spirals and a second set of conductive spirals selectively coupled to the first set of conductive spirals (Visser teaches the first antenna loop 1 and second/further antenna loop 2 together correspond to the first conductive winding. Visser discloses first antenna loop 1 and second antenna loop 2 coupled to respective switches T1 and T2 in their ground paths to selectively enable/couple them, para. 0026-36),
wherein the first set of conductive spirals forms a first area inside the first set of conductive spirals (Visser teaches the first antenna loop 1 forms an interior spatial area enclosed within its conductive loop boundary),
wherein the second set of conductive spirals forms a second area inside the second set of conductive spirals (Visser teaches: The second antenna loop 2 forms an interior spatial area enclosed within its conductive loop boundary),
wherein the first set of conductive spirals comprises at least one first conductive segment arranged in a layer (Visser teaches: First antenna loop 1 comprises conductive loop segments formed in a metal layer of the on-chip design), and
wherein the second set of conductive spirals comprises at least one second conductive segment arranged in the layer (Visser teaches: Second antenna loop 2 comprises conductive loop segments formed in the same metal layer); and
a second conductive winding configured to be inductively coupled to at least a portion of the first conductive winding (Visser discloses transceiver loop 3 forming a second winding magnetically/inductively coupled to antenna loops 1 and 2),
wherein the second conductive winding comprises a third set of conductive spirals having at least one third conductive segment being arranged adjacent to the at least one first conductive segment in the layer (Visser discloses transceiver loop 3 coaxially positioned in the exact same metal layer adjacent to antenna loops 1 and 2).
Visser is silent to teaching that wherein the first area is non-overlapping in space with the second area.
In the same field of endeavor, Frattini teaches a device wherein the first area is non-overlapping in space with the second area (Frattini discloses that the first area (S1) and second area (S2) are disposed side-by-side and separated from each other in space, fig. 10b, para. 0074-79).
Visser discloses an on-chip balun circuit integrated in an RF transceiver, where the antenna loops and transceiver loops are arranged concentrically/coaxially
Therefore, a POSITA seeking to improve signal integrity in Visser’s RF transceiver would be motivated to substitute Visser’s coaxial loop layout with Frattini’s side-by-side, non-overlapping split loop arrangement to minimize unwanted EMI and far-field radiation from the on-chip balun into adjacent transceiver components.
Regarding claim 2, the combination of Visser and Frattini teaches the RF transceiver of claim 1, wherein: the third set of conductive spirals forms a third area inside the third set of conductive spirals (Visser teaches: Transceiver loop 3 forms an interior area enclosed within its loop boundaries); and the third area overlaps in space with the first area (Visser teaches: Because transceiver loop 3 and antenna loop 1 are coaxially positioned/nested in one layer, the interior area of transceiver loop 3 overlaps in space with the interior area of antenna loop 1).
Regarding claim 7, the combination of Visser and Frattini teaches the RF transceiver of claim 2, wherein: the planar transformer further comprises a third conductive winding configured to be inductively coupled to the second set of conductive spirals, wherein the third conductive winding comprises a fourth set of conductive spirals having at least one fourth conductive segment being arranged adjacent to the at least one second conductive segment in the layer (Visser discloses that transceiver loop 3 can comprise separate transmission and receiver loops. The receiver or transmission loop (third conductive winding) is inductively coupled to antenna loop 2 (second set of spirals), coaxially arranged in the same metal layer adjacent to antenna loop 2. Frattini teaches fourth coil 1040 inductively coupled to second coil 1020); and the second conductive winding is configured to be inductively coupled to the first set of conductive spirals (Visser discloses transceiver loop 3 (or its TX/RX loop portion) inductively coupled to antenna loop 1 (first set of spirals). Frattini discloses third coil 1030 inductively coupled to first coil 1010).
Regarding claim 8, the combination of Visser and Frattini teaches the RF transceiver of claim 7, wherein: the fourth set of conductive spirals forms a fourth area inside the fourth set of conductive spirals (Frattini discloses that secondary coil 1040 encloses an interior spatial area (S2) on the surface of the substrate); the third area is non-overlapping in space with the fourth area (Frattini discloses that secondary coil 1030 (third area) and secondary coil 1040 (fourth area) occupy side-by-side, spatially non-overlapping interior areas (S1,S2) on the substrate); and the fourth area overlaps in space with the second area (Frattini discloses that secondary coil 1040 (fourth area) is vertically aligned with primary coil 1020 (second area S2), causing its interior spatial area to overlap in space along a vertical projection).
Regarding claim 11, the combination of Visser and Frattini teaches the RF transceiver of claim 1, wherein: the layer includes a metal layer of an integrated circuit (Visser Mapping: Discloses that the loops are formed in a metal layer of an on-chip integrated circuit design on a semiconductor substrate); and each of the first set of conductive spirals, the second set of conductive spirals, and the third set of conductive spirals are formed in the metal layer (Visser Mapping: Discloses that antenna loops 1, 2, and transceiver loop 3 are all coaxially positioned in the single metal layer).
Regarding claim 12, the combination of Visser and Frattini teaches the RF transceiver of claim 1, wherein each of the first set of conductive spirals, the second set of conductive spirals, and the third set of conductive spirals form a respective symmetric inductor spiral (Visser discloses that good balun circuits with multiple antenna loops advantageously have a symmetrical layout and symmetrical winding configuration (e.g. octagonal shaped loops with symmetrical crossings).
Regarding claim 13, the combination of Visser and Frattini teaches the RF transceiver of claim 1, further comprising a transmit chain comprising the planar transformer (Visser discloses balun circuit 10 connected to a power amplifier PA as part of an integrated transmitter circuit / transmit chain on the chip).
Regarding claim 14, the combination of Visser and Frattini teaches the RF transceiver of claim 13, wherein the transmit chain further comprises: one or more mixers; and one or more amplifiers, wherein the planar transformer is coupled between the one or more mixers and the one or more amplifiers (Visser discloses an integrated transceiver circuit on a single chip containing transmitter and receiver front-end chains. Mixers are conventional components in integrated RF transceiver chains for frequency translation. Visser discloses balun circuit 10 integrated on-chip and connected to a power amplifier (PA) in the transmitter circuit / transmit chain, positioned in the transmit signal path between up-conversion mixing circuitry and power amplification stages).
Claim(s) 3 and 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Visser and Frattini as applied to claim 2 above, and further in view of Feng (US 20130082810 A1).
Regarding claim 3, the combination of Visser and Frattini teaches the RF transceiver of claim 2, wherein: the second conductive winding comprises a fourth set of conductive spirals having at least one fourth conductive segment being arranged adjacent to the at least one second conductive segment in the layer (Visser discloses an on-chip balun circuit integrated in an RF transceiver where transceiver loops and antenna loops comprise multiple turns/windings coaxially positioned in a single metal layer. Visser further teaches that the transceiver loop (second conductive winding) can comprise separate transmission and receiver loops coaxially arranged in the layer adjacent to the antenna loops).
The combination of Visser and Frattini is silent to teaching that wherein the fourth set of conductive spirals is selectively coupled to the third set of conductive spirals.
In the same field of endeavor, Feng teaches a device wherein the fourth set of conductive spirals is selectively coupled to the third set of conductive spirals (Feng discloses embedding switches (80,90,210,310) inside transformer windings between turns and conductive segments to selectively couple conductive spiral sets/windings. Feng specifically teaches placing switches between the inner and outer turns/segments of secondary and tertiary windings to selectively couple them and control signal paths and magnetic coupling coefficients to a primary winding, fig. 2, para. 0025-35).
Therefore, a POSITA would combine Visser and Frattini with Feng. Feng teaches embedding switches directly inside transformer winding turns and segments. Feng explicitly discloses that placing switches between inner and outer winding turns reduces the voltage swing across the switches (to half the port voltage swing), allowing the use of lower-voltage switches with reduced insertion loss while achieving high port-to-port isolation through coupling cancellation. A POSITA seeking to selectively reconfigure or couple the secondary/tertiary spiral winding sets in Visser and Frattini without incurring high insertion loss or taking up extra die area would be motivated to incorporate Feng’s embedded inter-turn switches into the planar transformer layout.
Regarding claim 4, the combination of Visser, Frattini and Feng teaches the RF transceiver of claim 3, wherein: the fourth set of conductive spirals forms a fourth area inside the fourth set of conductive spirals (Frattini discloses secondary coil 1040 defining and enclosing an interior spatial area (S2) on the surface of the substrate. Feng and Visser similarly disclose winding loops that define enclosed interior spatial area); the third area is non-overlapping in space with the fourth area (Frattini explicitly discloses splitting the secondary winding into side-by-side coils where secondary coil 1030 (third area S1) and secondary coil 1040 (fourth area S2) define side-by-side, spatially non-overlapping interior areas. Combining this side-by-side, non-overlapping topology with Visser’s transceiver directly satisfies this limitation); and the fourth area overlaps in space with the second area (Frattini discloses that secondary coil 1040 (fourth area) is vertically aligned with primary coil 1020 (second area S2) across an isolation core layer (404), causing its interior spatial area to overlap in space along a vertical projection).
Claim(s) 9 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Visser and Frattini as applied to claim 7 above, and further in view of Heikkinen (US 20070158782 A1).
Regarding claim 9, the combination of Visser and Frattini teaches the RF transceiver of claim 7.
The combination of Visser and Frattini is silent to teaching that wherein the planar transformer is configured to: operate in a first mode at a first frequency band with the second set of conductive spirals coupled in series between a first portion of the first set of conductive spirals and a second portion of the first set of conductive spirals and with third conductive winding inductively coupled to the second set of conductive spirals; and operate in a second mode at a second frequency band with the first set of conductive spirals inductively coupled to the second conductive winding.
In the same field of endeavor, Heikkinen teaches a device wherein the planar transformer is configured to: operate in a first mode at a first frequency band with the second set of conductive spirals coupled in series between a first portion of the first set of conductive spirals and a second portion of the first set of conductive spirals and with third conductive winding inductively coupled to the second set of conductive spirals; and operate in a second mode at a second frequency band with the first set of conductive spirals inductively coupled to the second conductive winding (Heikkinen teaches operating in a first mode at a lower frequency band (LB) when bypass switch S1 is in an open-switch configuration. Series-Connected Inductor Portions: Heikkinen discloses distributing a planar monolithic inductor into smaller series-connected inductor portions (L11 ,L 21 ,L 22 ,L12 ). In the open-switch configuration, current flows through the cascade of inductor portions. Inductive Coupling Aspect: Heikkinen teaches mutual inductive coupling (M2 or M 12) between the inner and outer spiral turns).
Therefore, a POSITA seeking to expand Visser's RF transceiver balun to support multi-frequency band/multi-standard operation would look to Heikkinen's explicit solution: distributing a planar winding into smaller portions with symmetric bypass/shortcut switches (S1) to provide controllable inductance steps. Incorporating Heikkinen's tapped winding topology into Visser's planar balun allows a single, shared on-chip structure to cover multiple frequency bands, eliminating redundant passive components and significantly reducing silicon die area.
Regarding claim 10, the combination of Visser and Frattini teaches the RF transceiver of claim 7.
The combination of Visser and Frattini is silent to teaching that wherein the planar transformer further comprises a first switch coupled between the first set of conductive spirals and the second set of conductive spirals.
In the same field of endeavor, Heikkinen teaches a device wherein the planar transformer further comprises a first switch coupled between the first set of conductive spirals and the second set of conductive spirals (Heikkinen explicitly discloses a bypass/shortcut switch S1 (e.g., an NMOS, PMOS, or BJT transistor switch). Switch Coupling: Under BRI, switch S1 is connected between intermediate tapping nodes (SW p, SW m) located along clockwise and counter-clockwise spiral metal lines (21, 22) to shortcut intermediate turns from outer turns).
Therefore, a POSITA seeking to expand Visser's RF transceiver balun to support multi-frequency band/multi-standard operation would look to Heikkinen's explicit solution: distributing a planar winding into smaller portions with symmetric bypass/shortcut switches (S1) to provide controllable inductance steps. Incorporating Heikkinen's tapped winding topology into Visser's planar balun allows a single, shared on-chip structure to cover multiple frequency bands, eliminating redundant passive components and significantly reducing silicon die area.
Allowable Subject Matter
Claims 5 and 6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Chen (20130267185), Schmelzer (20140347154), Tiemeijer (20040240126), Wang (20230378808) teach transformer and balun.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WEN WU HUANG whose telephone number is (571)272-7852. The examiner can normally be reached Mon-Fri 10-6.
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/WEN W HUANG/Primary Examiner, Art Unit 2648