Prosecution Insights
Last updated: April 17, 2026
Application No. 18/983,312

Power-Over-Ethernet Computer System with Multiple Displays that Utilizes a Multi-Stream Transport Protocol to Provide Both Power and Data to the Displays

Non-Final OA §102§103§112
Filed
Dec 16, 2024
Examiner
ADAMS, CARL
Art Unit
2627
Tech Center
2600 — Communications
Assignee
unknown
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
88%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allow Rate
556 granted / 780 resolved
+9.3% vs TC avg
Strong +17% interview lift
Without
With
+17.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
26 currently pending
Career history
806
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
58.3%
+18.3% vs TC avg
§102
30.9%
-9.1% vs TC avg
§112
7.9%
-32.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 780 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 13 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Specifically, claim 13 recites the limitation "said computer" instead of “said computer unit”. There is insufficient antecedent basis for this limitation in the claim. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 5 and 7 – 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sipes, Jr. (US Pub. No. 2022/0052767 A1). As to claim 5, Sipes shows a computer system (workspace 2800 including monitors, for example, Figs. 1C and 28A paras. 46 and 231) for use in a Power-over-Ethernet application (Figs. 1C and 28A paras. 6, 46 and 233) that provides a mixed power/data signal to the computer system via a single PoE cable (inherently the case when PoE is in use, paras. 43 and 233), said computer system comprising: a plurality of display monitors (Fig. 28C and paras. 231 – 234); a computer unit (i.e. connection interface device 2802/media converter 2820) having a microprocessor (i.e. chip, also inherently the case in any electronic device, Figs. 10 and 28A and paras. 137 and 231) and a first splitter circuit (i.e. media converter 2820, Fig. 28C and para. 234), wherein said first splitter circuit receives said mixed power/data signal and separates a DC power signal and data signals from said mixed power/data signal (Fig. 28C and para. 234), wherein said microprocessor receives said data signals and generates display signals (i.e. display data, Fig. 28C and para. 232), wherein said computer unit forwards said DC power signal and said display signals to said plurality of display monitors to power and operate said plurality of display monitors (Fig. 28C and paras. 231 – 234). As to claim 7, Sipes shows that said display signals are addressed to different display monitors within said plurality of display monitors (Fig. 28C and paras. 231 – 234). As to claim 8, Sipes shows that said computer unit and said plurality of display monitors are all powered by said DC power signal (Fig. 28C). As to claim 9, Sipes shows that said computer unit and said plurality of display monitors are connected with only transfer cables that have USB-C terminations (para. 97). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 – 3, 6 and 11 – 18 are rejected under 35 U.S.C. 103 as being unpatentable over Sipes in view of Joo et al. (US Pub. No. 2020/0126476 A1). As to claim 1, Sipes shows a computer system (workspace 2800 including monitors, for example, Figs. 1C and 28A paras. 46 and 231) for use in a Power-over-Ethernet application (Figs. 1C and 28A paras. 6, 46 and 233) that provides a mixed power/data signal to the computer system via a PoE cable (inherently the case when PoE is in use, paras. 43 and 233), said computer system comprising: a computer unit (i.e. connection interface device 2802/media converter 2820) having a microprocessor (i.e. chip, also inherently the case in any electronic device, Figs. 10 and 28A and paras. 137 and 231), an input port (i.e. SFP/RJ45 of media converter 2820, Fig. 28C and para. 234), and an output port (i.e. Data/USB power/19V power, for example, Fig. 28C and paras. 232 – 234), wherein said input port receives said PoE cable and said mixed power/data signal (Fig. 28C), wherein said computer unit contains a splitter circuit (i.e. media converter 2820, Fig. 28C and para. 234) for separating said mixed power/data signal into a DC power signal and data signals (Fig. 28C and para. 234), wherein said microprocessor receives said data signals and generates display signals (i.e. display data, Fig. 28C and para. 232), wherein said computer unit directs said DC power signal with said display signals to said output port (Fig. 28C and paras. 231 – 234); a first display monitor having an input port that is linked to said output port of said computer unit with a first transfer cable (Fig. 28C and paras. 231 – 234); and a second transfer cable that connects to said second output port and directs said DC power signal unused by said first monitor and said display signals addressed to said subsequent display monitor to said subsequent display monitor (Fig. 28C and paras. 231 – 234). Sipes does not show that said first display monitor contains multi-stream transport circuitry that differentiates between display signals addressed to said first display monitor and display signals addressed to said subsequent display monitor, wherein said first display monitor directs said DC power signal unused by said first monitor and said display signals addressed to said subsequent display monitor to a second output port a second transfer cable that connects to said second output port and directs said DC power signal unused by said first monitor and said display signals addressed to said subsequent display monitor to said subsequent display monitor. Joo shows that a first display monitor contains multi-stream transport circuitry (i.e. processor 130, Fig. 1 and paras. 65 and 67) that differentiates between display signals addressed to said first display monitor and display signals addressed to said subsequent display monitor (i.e. varying brightness levels, for example, Fig. 1 and paras. 67 and 71), wherein said first display monitor directs a power signal unused by a first monitor and display signals addressed to said subsequent display monitor to a second output port a second transfer cable that connects to said second output port (Fig. 3 and paras. 67, 71, 88 and 89) and directs said DC power signal unused by said first monitor and said display signals addressed to said subsequent display monitor to said subsequent display monitor (Fig. 3 and paras. 67, 71, 88 and 89). It would have been obvious to one of ordinary skill in the art at the time of filing to modify the teachings of Sipes with those of Joo because designing the system in this way allows the device to display an image even if an error occurs due to loss of power (Fig. 8 and paras. 131 – 134). As to claim 2, Sipes shows that said first transfer cable and said second transfer cable have USB-C terminations (para. 97). As to clam 3, Sipes shows that said computer unit, said first display monitor and said subsequent display monitor are all powered by said DC power signal (Fig. 28C). As to claim 6, Sipes does not show that said display monitors are arranged in a daisy chain. Joo shows that a group of displays are arranged in a daisy chain (i.e. shared power configuration, Fig. 3 and paras. 67, 71, 88 and 89). It would have been obvious to one of ordinary skill in the art at the time of filing to modify the teachings of Sipes with those of Joo because designing the system in this way allows the device to display an image even if an error occurs due to loss of power (Fig. 8 and paras. 131 – 134). As to claims 11 and 12, Sipes does not show that the plurality of display monitors includes a first display monitor that contains circuitry that differentiates between display signals addressed to said first display monitor and display signals addressed to other of said plurality of display monitors, or that said first display monitor forwards said DC power signal unused by said first monitor and said display signals addressed to said other of said plurality of display monitors to said other of said plurality of display monitors. Joo shows that a first display monitor contains multi-stream transport circuitry (i.e. processor 130, Fig. 1 and paras. 65 and 67) that differentiates between display signals addressed to said first display monitor and display signals addressed to said subsequent display monitor (i.e. varying brightness levels, for example, Fig. 1 and paras. 67 and 71), wherein said first display monitor directs a power signal unused by a first monitor and display signals addressed to said subsequent display monitor to a second output port a second transfer cable that connects to said second output port (Fig. 3 and paras. 67, 71, 88 and 89) and directs said DC power signal unused by said first monitor and said display signals addressed to said subsequent display monitor to said subsequent display monitor (Fig. 3 and paras. 67, 71, 88 and 89). It would have been obvious to one of ordinary skill in the art at the time of filing to modify the teachings of Sipes with those of Joo because designing the system in this way allows the device to display an image even if an error occurs due to loss of power (Fig. 8 and paras. 131 – 134). As to claim 13, Sipes shows a computer system (workspace 2800 including monitors, for example, Figs. 1C and 28A paras. 46 and 231) for use in a Power-over-Ethernet application (Figs. 1C and 28A paras. 6, 46 and 233) that provides a first mixed power/data signal to the computer system via a PoE cable (inherently the case when PoE is in use, paras. 43 and 233), said computer system comprising: a plurality of interconnected display monitors (Fig. 28C and paras. 231 – 234); a computer unit (i.e. connection interface device 2802/media converter 2820) that separates said mixed power/data signal into a DC power signal and data signals from said mixed power/data signal (Fig. 28C and para. 234), wherein said computer unit generates display signals in a multi-stream transport format and forwards said display signals with said DC power signal to said plurality of display monitors (Fig. 28C and paras. 231 – 234). Sipes does not show that the display monitors are interconnected in a daisy chain arrangement. Joo shows that a group of displays are arranged in a daisy chain (i.e. shared power configuration, Fig. 3 and paras. 67, 71, 88 and 89). It would have been obvious to one of ordinary skill in the art at the time of filing to modify the teachings of Sipes with those of Joo because designing the system in this way allows the device to display an image even if an error occurs due to loss of power (Fig. 8 and paras. 131 – 134). As to claim 14, Sipes shows that said plurality of display monitors are powered by said DC power signal (Fig. 28C). As to claim 15, Sipes shows that said display signals are addressed to different display monitors within said plurality of display monitors (Fig. 28C and paras. 231 – 234). As to claim 16, Sipes shows that said DC power signal and said display signals are transmitted through a transfer cable with USB-C terminations from said computer unit to said plurality of display monitors (para. 97). As to claims 17 and 18, Sipes does not show that said plurality of display monitors includes a first display monitor with circuitry that differentiates between display signals addressed to said first display monitor and display signals addressed to other of said plurality of display monitors, or that said first display monitor forwards said DC power signal unused by said first monitor and said display signals addressed to said other of said plurality of display monitors. Joo shows that a first display monitor contains multi-stream transport circuitry (i.e. processor 130, Fig. 1 and paras. 65 and 67) that differentiates between display signals addressed to said first display monitor and display signals addressed to said subsequent display monitor (i.e. varying brightness levels, for example, Fig. 1 and paras. 67 and 71), wherein said first display monitor directs a power signal unused by a first monitor and display signals addressed to said subsequent display monitor to a second output port a second transfer cable that connects to said second output port (Fig. 3 and paras. 67, 71, 88 and 89) and directs said DC power signal unused by said first monitor and said display signals addressed to said subsequent display monitor to said subsequent display monitor (Fig. 3 and paras. 67, 71, 88 and 89). It would have been obvious to one of ordinary skill in the art at the time of filing to modify the teachings of Sipes with those of Joo because designing the system in this way allows the device to display an image even if an error occurs due to loss of power (Fig. 8 and paras. 131 – 134). Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Sipes and Joo in view of Frederick et al. (US Pub. No. 2021/0241705 A1). As to claim 10, Sipes as modified above does no show that said display signals are in a multi-stream transport protocol. Frederick shows that display signals are in a multi-stream transport protocol (para. 16). It would have been obvious to one of ordinary skill in the art at the time of filing to modify the teachings of Sipes as modified above further still with those of Frederick because designing the system in this way allows the device to produce a plurality of video streams (para. 16). Allowable Subject Matter Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Specifically, claim 4 recites that said computer unit, said first display monitor and said subsequent display monitor follows a staggered start procedure wherein said computer unit, said first display monitor, and said subsequent display monitor power up at different times. The prior art does not show this configuration; therefore, this claim contains allowable subject matter. CONCLUSION Any inquiry concerning this communication or earlier communications from the examiner should be directed to CARL ADAMS whose telephone number is (571)270-7448. The examiner can normally be reached Monday - Friday, 9AM - 5PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571-272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CARL ADAMS/Examiner, Art Unit 2627
Read full office action

Prosecution Timeline

Dec 16, 2024
Application Filed
Feb 07, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
88%
With Interview (+17.1%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 780 resolved cases by this examiner. Grant probability derived from career allow rate.

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