DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Introduction
This is a response to the applicant’s filing filed on 12/17/2024. In virtue of this filing, claims 1-20 are currently presented in the instant application.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/17/2024 and 01/31/2025 has been considered by Examiner and made of record in the application file.
Drawings
The drawing submitted on 12/17/2024 has been considered by Examiner and made of record in the application file.
Specification
The specification submitted on 12/17/2024 has been considered by Examiner and made of record in the application file.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2 and 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin et al. (US Pub. No.: 2016/0373064, hereinafter, “Lin”).
Regarding claim 1, Lin teaches a radio frequency circuit configured to support a first power class and a second power class whose maximum output power is lower than a maximum output power of the first power class, the radio frequency circuit comprising (see figures 4A and 8, [0010, 0061, 0075, 0077, 0100-0102], high power class 1.5 BT and low power class 2 BT):
a first power amplifier (see figure 4A, BT PA 310); and
a variable load matching circuit connected to an output end of the first power amplifier (see figure 4A, tunable load impedance 440, [0075]),
wherein under a condition that the first power class is applied, a first power supply voltage is supplied to the first power amplifier, and a load impedance viewed from the first power amplifier is adjusted to a first impedance by the variable load matching circuit (see figures 4A and 8, [0010, 0061, 0075, 0077, 0100-0102], high power class 1.5, 3.3V power supply, 50 ohm impedance),
under a condition that the second power class is applied, a second power supply voltage is supplied to the first power amplifier, and the load impedance viewed from the first power amplifier is adjusted to a second impedance by the variable load matching circuit (see figures 4A and 8, [0010, 0061, 0075, 0077, 0100-0102], low power class 2, 1.3V power supply, 80 ohm impedance),
the first power supply voltage is higher than the second power supply voltage (see figures 4A and 8, [0010, 0061, 0075, 0077, 0100-0102], high power class 1.5, 3.3V power supply, low power class 2, 1.3V power supply), and
the first impedance is lower than the second impedance (see [0010, 0061, 0075, 0077, 0100-0102], 50 ohm, 80 ohm).
Regarding claim 2, Lin further teaches the first power amplifier is further configured to support a third power class whose maximum output power is lower than the maximum output power of the first power class and is higher than the maximum output power of the second power class, and under a condition that the third power class is applied, the second power supply voltage is supplied to the first power amplifier, and the load impedance viewed from the first power amplifier is adjusted to the first impedance by the variable load matching circuit (see figures 4A and 8, [0010, 0061, 0075, 0077, 0100-0102], 2.2V, 1.3V, 3.3V).
Regarding claim 17, Lin further teaches the first power amplifier is further configured to support a third power class whose maximum output power is lower than the maximum output power of the first power class and is higher than the maximum output power of the second power class (see figures 4A and 8, [0010, 0061, 0075, 0077, 0100-0102], 2.2V, 1.3V, 3.3V).
Allowable Subject Matter
Claims 11-16 and 19-20 are allowed.
Claims 3-10 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 11, the prior art made of record fails to clearly teach or fairly suggest the feature wherein under a condition that the first power class is applied, a first power supply voltage is supplied to the first power amplifier, and the first filter is connected to the first power amplifier by the switch circuit, under a condition that the second power class is applied, a second power supply voltage is supplied to the first power amplifier, and the second filter is connected to the first power amplifier by the switch circuit, and an input impedance of the first filter is lower than an input impedance of the second filter, as specified in the claim 11, and further limitations of their respective dependent claims 12-16 and 19-20.
Regarding claim 3, the prior art made of record fails to clearly teach or fairly suggest the feature of the variable load matching circuit includes: a first capacitor and a first switch connected in series between the first power amplifier and an antenna connection terminal; and a second capacitor and a second switch connected in parallel to the first capacitor and the first switch, between the first power amplifier and the antenna connection terminal, the second capacitor and the second switch being connected in series, a capacitance of the first capacitor is greater than a capacitance of the second capacitor, under the condition that the first power class is applied, the first switch is closed, and the second switch is open, and under the condition that the second power class is applied, the first switch is open, and the second switch is closed.
Regarding claim 4, the prior art made of record fails to clearly teach or fairly suggest the feature of the variable load matching circuit includes: a first inductor connected between the first power amplifier and an antenna connection terminal; a second inductor and a first switch connected in parallel to the first inductor, between the first power amplifier and the antenna connection terminal, the second inductor and the first switch being connected in series; a first capacitor connected between ground and a path between the first power amplifier and the antenna connection terminal; and a second capacitor and a second switch connected in parallel to the first capacitor, between the ground and the path between the first power amplifier and the antenna connection terminal, the second capacitor and the second switch being connected in series, under the condition that the first power class is applied, the first switch is open, and the second switch is closed, and under the condition that the second power class is applied, the first switch is closed, and the second switch is open.
Regarding claim 5, the prior art made of record fails to clearly teach or fairly suggest the feature of a second power amplifier; and a transformer that includes a primary coil and a secondary coil, the primary coil including two ends one of which is connected to the output end of the first power amplifier and a remaining one of which is connected to an output end of the second power amplifier, the secondary coil including an end connected to the variable load matching circuit, wherein under the condition that the first power class is applied, the first power supply voltage is supplied to the first power amplifier and the second power amplifier, and a load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance by the variable load matching circuit, and under the condition that the second power class is applied, the second power supply voltage is supplied to the first power amplifier and the second power amplifier, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the second impedance by the variable load matching circuit.
Regarding claim 6, the prior art made of record fails to clearly teach or fairly suggest the feature of a second power amplifier; and a transformer that includes a primary coil and a secondary coil, the primary coil including two ends one of which is connected to the output end of the first power amplifier and a remaining one of which is connected to an output end of the second power amplifier, the secondary coil including an end connected to the variable load matching circuit, wherein under the condition that the first power class is applied, the first power supply voltage is supplied to the first power amplifier and the second power amplifier, and a load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance by the variable load matching circuit, and under the condition that the second power class is applied, the second power supply voltage is supplied to the first power amplifier, the load impedance viewed from the first power amplifier is adjusted to the second impedance by the variable load matching circuit, and operation of the second power amplifier is halted.
Regarding claim 8, the prior art made of record fails to clearly teach or fairly suggest the feature of a second power amplifier; a first transfer line connected between the output end of the first power amplifier and the variable load matching circuit; a second transfer line connected between an output end of the second power amplifier and the variable load matching circuit; and a resistor connected in parallel to the first transfer line and the second transfer line, between the output end of the first power amplifier and the output end of the second power amplifier, wherein under the condition that the first power class is applied, the first power supply voltage is supplied to the first power amplifier and the second power amplifier, and a load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance by the variable load matching circuit, and under the condition that the second power class is applied, the second power supply voltage is supplied to the first power amplifier and the second power amplifier, and the load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the second impedance by the variable load matching circuit.
Regarding claim 9, the prior art made of record fails to clearly teach or fairly suggest the feature of a second power amplifier; a first transfer line connected between the output end of the first power amplifier and the variable load matching circuit; a second transfer line connected between an output end of the second power amplifier and the variable load matching circuit; and a resistor connected in parallel to the first transfer line and the second transfer line, between the output end of the first power amplifier and the output end of the second power amplifier, wherein under the condition that the first power class is applied, the first power supply voltage is supplied to the first power amplifier and the second power amplifier, and a load impedance viewed from the first power amplifier and the second power amplifier is adjusted to the first impedance by the variable load matching circuit, and under the condition that the second power class is applied, the second power supply voltage is supplied to the first power amplifier, the load impedance viewed from the first power amplifier is adjusted to the second impedance by the variable load matching circuit, and operation of the second power amplifier is halted.
Regarding claim 18, the prior art made of record fails to clearly teach or fairly suggest the feature of the variable load matching circuit includes: a first inductor connected between the first power amplifier and an antenna connection terminal; a second inductor and a first switch connected in parallel to the first inductor, between the first power amplifier and the antenna connection terminal, the second inductor and the first switch being connected in series; a first capacitor connected between ground and a path between the first power amplifier and the antenna connection terminal; and a second capacitor and a second switch connected in parallel to the first capacitor, between the ground and the path between the first power amplifier and the antenna connection terminal, the second capacitor and the second switch being connected in series.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tuan A. Pham whose telephone number is (571) 272-8097, the fax number is (571) 273-8097 and the email is tuan.pham01@uspto.gov. The examiner can normally be reached on Monday through Friday, 8:30 AM-5:30 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Yuwen (Kevin) Pan can be reached on (571) 272-7855. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TUAN PHAM/ Primary Examiner, Art Unit 2649
