DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 2 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 3 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 4 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 3 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 5 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 6 of U.S. Patent No. 11,663,141 in view of Seiler [US 2017/0084000 A1].
Seiler teaches “generating an address transaction based on the address translation request; and based on the virtual address specified by the address translation request hitting the TLB, providing the address transaction to a memory for processing without walking the page table to determine a physical address for the virtual address specified by the address translation request.” as “translation tables in virtual memory may perform well provided that the translation look aside buffers (TLBs) convert most page addresses without performing the page walk.” [¶0048]
Claim 6 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 3 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 8 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 8 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 9 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 9 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 10 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 10 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 11 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 12 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 13 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 14 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 3 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 15 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 6 of U.S. Patent No. 11,663,141 in view of Seiler [US 2017/0084000 A1].
Seiler teaches “generating an address transaction based on the address translation request; and based on the virtual address specified by the address translation request hitting the TLB, providing the address transaction to a memory for processing without walking the page table to determine a physical address for the virtual address specified by the address translation request.” as “translation tables in virtual memory may perform well provided that the translation look aside buffers (TLBs) convert most page addresses without performing the page walk.” [¶0048]
Claim 16 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 3 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 18 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 8 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 19 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 9 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Claim 20 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 10 of U.S. Patent No. 12,210,459. Although the claims at issue are not identical, they are not patentably distinct from each other because all limitations of instant application are taught by the parent patent.
Allowable Subject Matter
The following is a statement of reasons for the indication of allowable subject matter:
Independent claim 1 recites the following allowable subject matter: “based on a virtual address specified by the address invalidation request hitting a translation lookaside buffer (TLB) of the MMU, generating an invalidation match transaction;”
Closest prior art Chatterjee et al. [US 2020/0371951] appears to teach a MMU for processing core and managing memory, a TLB cache for mapping virtual addresses to real address, address invalidation request receiving and processing.
Venkatachar et al. [US 10,635,591] appears to teach comparing invalidation tag matching.
However, the prior arts on record do not appear to teach or fairly suggest the recited allowable subject matter. Based on this rationale, claim 1 and its dependent claims 2-10 are considered allowable upon overcoming the double patenting rejection.
Independent claim 11 recites the following allowable subject matter: “generate an invalidation match transaction based on a virtual address specified by the address invalidation request hitting the TLB;”
Closest prior art Chatterjee et al. [US 2020/0371951] appears to teach a MMU for processing core and managing memory, a TLB cache for mapping virtual addresses to real address, address invalidation request receiving and processing.
Venkatachar et al. [US 10,635, 591] appears to teach comparing invalidation tag matching.
However, the prior arts on record do not appear to teach or fairly suggest the recited allowable subject matter. Based on this rationale, claim 11 and its dependent claims 12-20 are considered allowable upon overcoming the double patenting rejection.
Claims 7 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MASUD K KHAN whose telephone number is (571)270-0606. The examiner can normally be reached Monday-Friday (8am-5pm).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hosain Alam can be reached on (571) 272-3978. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MASUD K KHAN/Primary Examiner, Art Unit 2132
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