Prosecution Insights
Last updated: October 01, 2026
Application No. 18/985,017

CONTROL SYSTEM OF INPUTS/OUTPUTS OF AT LEAST ONE AVIONIC APPLICATION AND OPERATION VERIFICATION METHOD OF SUCH A SYSTEM

Final Rejection §103
Filed
Dec 18, 2024
Priority
Dec 22, 2023 — FR 2315096
Examiner
NARRAMORE, BLAKE I
Art Unit
2438
Tech Center
2400 — Computer Networks
Assignee
Thales Group
OA Round
2 (Final)
78%
Grant Probability
Favorable
3-4
OA Rounds
1y 0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
140 granted / 179 resolved
+20.2% vs TC avg
Strong +23% interview lift
Without
With
+22.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
22 currently pending
Career history
207
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
61.0%
+21.0% vs TC avg
§102
11.2%
-28.8% vs TC avg
§112
20.0%
-20.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 179 resolved cases

Office Action

§103
Detailed Action This is a Final Office action in response to communications received on 6/27/2026. Claims 1-12 are pending and are examined. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments, filed 6/27/2026, regarding the rejection of the claims under 112, second paragraph, are found persuasive and are sufficient to overcome the rejection to the aforementioned claim(s). Accordingly, the rejection of claim(s) 1-12 under 112, second paragraph, as filed in (8)-(9) of the Non-Final Office action filed 5/8/2026 is withdrawn. Applicant’s arguments regarding the rejection under 35 U.S.C. 103 of the claims under Entelis and Falzone have been considered, and are found unpersuasive. Applicant argues on page(s) 8-11 of the Remarks, filed 6/27/2026, the cited prior art fail to teach or suggest features of the independent claim. However, Examiner respectfully disagrees. Entelis discloses ECUs forming control modules (0044) which can be used to either control or monitor the vehicle system (0030). Therefore the ECUs may perform either the control or monitoring functions, or both. Examiner notes that “two parallel avionics processing chains” is not recited in claim one as presented. Further, the signal acquisition described in Entelis, although not explicitly defined as a distinct stage in the process, nonetheless occurs. Analogue signals are acquired and are converted into digital signals (0046). This data is then formed into a data packet (i.e. encapsulated) (0220) and then made available to the logic circuits which do the actual controlling (i.e. make the digital data available to the avionics application). If Applicant intends for these stages to be regarded as distinct from generic performance of the same operations, the claims must be amended to reflect this distinction beyond merely labeling the step as a stage. Regarding the combination of Falzone and Entelis, the references are reasonably related in the field of endeavor of vehicle network communication. Accordingly, Falzone’s teaching of avionics application of vehicle control would be obvious to one of ordinary skill in the art and Falzone need not teach the limitations already supplied by Entelis. The remaining arguments fail to comply with 37 C.F.R. 1.111(b) because they amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are: “primary stage ” in claim 1. “intermediate stage ” in claim 1. “final stage ” in claim 1. “verification application ” in claim 1. “hardware monitoring module ” in claim 7. “software monitoring module ” in claim 7. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. The corresponding structures interpreted from the specification for the above limitations are as follows: “primary stage” (0046) “intermediate stage” (0051) “final stage” (0059) “hardware monitoring module” (0064) “software monitoring module” (0070) If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-6 and 8-12 are rejected under 35 U.S.C. 103 as being unpatentable over Entelis (US 20220046114 A1), in view of Falzone (US 20250138559 A1). Regarding claim 1, Entelis teaches the limitations of claim 1 substantially as follows: the control system comprising at least two computing platforms implemented using similar hardware and software resources, one of the computing platforms forming a control chain and another forming a monitoring chain, each computing platform comprising: (Entelis; [0044], [0046], [0056]: Automotive electronics commonly involves multiple modular ECUs (Electronic Control Unit) connected over a network such as Engine Control Modules (ECM) or Transmission Control Modules (TCM); (i.e., control chain) An engine ECU typically connects to, or includes, sensors that actively monitor in real-time engine parameters; (i.e., monitoring chain) Basic Software—standardized software modules (mostly) without any functional job itself that offers services necessary to run the functional part of the upper software layer; Runtime environment—Middleware which abstracts from the network topology for the inter- and intra-ECU information exchange between the application software components and between the Basic Software and the applications (i.e. chain)) a primary stage configured to acquire analogue signals and convert them into digital signals; (Entelis; [0046]: sensors that actively monitor in real-time engine parameters such as pressure, temperature, flow, engine speed, oxygen level and NOx level, plus other parameters at different points within the engine (i.e., acquire analogue signals and convert them into digital signals). All these sensor signals are analyzed by the ECU, which has the logic circuits to do the actual controlling. The ECU output is commonly connected to different actuators) an intermediate stage configured to digitally process the digital signals to form digital data and to encapsulate each processed digital data item; (Entelis; [0220]: A data packet is generated from the data, the data packet including control information set based on the packet type and size information set based on a storage space containing the control information (i.e., encapsulate each processed digital data item)) a final stage configured to make the digital data available to the avionics application; and (Entelis; [0046]: sensors that actively monitor in real-time engine parameters such as pressure, temperature, flow, engine speed, oxygen level and NOx level, plus other parameters at different points within the engine (i.e., acquire analogue signals and convert them into digital signals). All these sensor signals are analyzed by the ECU, which has the logic circuits to do the actual controlling. (i.e., make the digital data available to the avionics application) The ECU output is commonly connected to different actuators) a verification application configured to verify encapsulation of each data item received. (Entelis; [0334]: an authentication scheme may be used, and the code field 100a is used to carry information for supporting the authenticity of the frame 60b (or of the frame 10). For example, the authentication scheme may use, or be based on, Message Authentication Code (MAC) (i.e., verify encapsulation of each data item received)) Entelis does not teach the limitations of claim 1 as follows: An input/output control system for at least one avionics application that generates at least one integrated setpoint, However, in the same field of endeavor, Falzone discloses the limitations of claim 1 as follows: An input/output control system for at least one avionics application that generates at least one integrated setpoint, (Falzone; Abstract: System, methods, and machine-readable media may facilitate control of an aircraft (i.e., Avionics application). An actuator may be controlled based on the following. A first control signal may be output (i.e., integrated setpoint), with a first command module, to control the actuator) Falzone is combinable with Entelis because all are from the same field of endeavor of communication in vehicle networks. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system of Entelis to incorporate avionic application of vehicle communication components as in Falzone for the predictable result of vehicle communication in air vehicles. Regarding claim 2, Entelis and Falzone teach the limitations of claim 1. Entelis and Falzone teach the limitations of claim 2 as follows: The system as claimed in claim 1, wherein encapsulating each digital datum comprises forming an aggregate comprising that datum and at least one of the following: an authentication module for authenticating the source of this data; and a dating module for dating the data and/or measuring its freshness. (Entelis; [0334]: an authentication scheme may be used, and the code field 100a is used to carry information for supporting the authenticity of the frame 60b (or of the frame 10). For example, the authentication scheme may use, or be based on, Message Authentication Code (MAC) (i.e., an authentication module for authenticating the source of this data)) Regarding claim 3, Entelis and Falzone teach the limitations of claim 2. Entelis and Falzone teach the limitations of claim 3 as follows: The system of claim 2, wherein encapsulation of each digital datum further comprises formation of a digital signature of all or part of the corresponding aggregate. (Entelis; [0334]: an authentication scheme may be used, and the code field 100a is used to carry information for supporting the authenticity of the frame 60b (or of the frame 10). For example, the authentication scheme may use, or be based on, Message Authentication Code (MAC), Authenticated Encryption (AE), or digital signatures (i.e., formation of a digital signature of all or part of the corresponding aggregate)) Regarding claim 4, Entelis and Falzone teach the limitations of claim 3. Entelis and Falzone teach the limitations of claim 4 as follows: The system of claim 3, wherein the digital signature comprises a CRC verification code. (Entelis; [0334]: an authentication scheme may be used, and the code field 100a is used to carry information for supporting the authenticity of the frame 60b (or of the frame 10). For example, the authentication scheme may use, or be based on, Message Authentication Code (MAC), Authenticated Encryption (AE), or digital signatures (i.e., the digital signature comprises a CRC verification code)) Regarding claim 5, Entelis and Falzone teach the limitations of claim 1. Entelis and Falzone teach the limitations of claim 5 as follows: The system of claim 1, wherein said verification application is configured to verify at least one of the following elements of each received data: the source of this data; the integrity of this data; and the dating of this data. (Entelis; [0334]: an authentication scheme may be used, and the code field 100a is used to carry information for supporting the authenticity of the frame 60b (or of the frame 10). For example, the authentication scheme may use, or be based on, Message Authentication Code (MAC) (i.e., integrity of this data)) Regarding claim 6, Entelis and Falzone teach the limitations of claim 1. Entelis and Falzone teach the limitations of claim 6 as follows: The system of claim 1, wherein said verification application is integrated in said final stage or in the avionics application. (Entelis; [0334]: an authentication scheme may be used, and the code field 100a is used to carry information for supporting the authenticity of the frame 60b (or of the frame 10). For example, the authentication scheme may use, or be based on, Message Authentication Code (MAC) (i.e., verification application is integrated in said final stage or in the avionics application)) Regarding claim 8, Entelis and Falzone teach the limitations of claim 1. Entelis and Falzone teach the limitations of claim 8 as follows: The system of claim 1, wherein said primary stages of the different computing platforms are used asymmetrically. (Entelis; [0044], [0046], [0056]: Automotive electronics commonly involves multiple modular ECUs (Electronic Control Unit) connected over a network such as Engine Control Modules (ECM) or Transmission Control Modules (TCM); An engine ECU typically connects to, or includes, sensors that actively monitor in real-time engine parameters; Basic Software—standardized software modules (mostly) without any functional job itself that offers services necessary to run the functional part of the upper software layer; Runtime environment—Middleware which abstracts from the network topology for the inter- and intra-ECU information exchange between the application software components and between the Basic Software and the applications (i.e. asymmetrical between ECUs)) Regarding claim 9, Entelis and Falzone teach the limitations of claim 8. Entelis and Falzone teach the limitations of claim 9 as follows: The system according to claim 8, wherein said primary stage of each computing platform comprises: a connector; an analogue filter module; and an input signal conversion module; and (Entelis; [0131]; Fig. 5: a vehicle bus, such as a CAN bus, is shown in an arrangement 50 in FIG. 5.) wherein using said primary stages of the different computing platforms asymmetrically comprises at least one of the following elements: allocation of different connection points between the different connectors; allocation of different routing paths and/or analogue filters between the different analogue filter modules; and asymmetrical use of the different input signal conversion modules. (Entelis; [0044], [0046], [0056]: Automotive electronics commonly involves multiple modular ECUs (Electronic Control Unit) connected over a network such as Engine Control Modules (ECM) or Transmission Control Modules (TCM); An engine ECU typically connects to, or includes, sensors that actively monitor in real-time engine parameters; Basic Software—standardized software modules (mostly) without any functional job itself that offers services necessary to run the functional part of the upper software layer; Runtime environment—Middleware which abstracts from the network topology for the inter- and intra-ECU information exchange between the application software components and between the Basic Software and the applications (i.e. asymmetrical between ECUs)) Regarding claim 10, Entelis and Falzone teach the limitations of claim 1. Entelis and Falzone teach the limitations of claim 10 as follows: The system of claim 1, wherein said intermediate stage of each computing platform comprises a digital acquisition module, the digital acquisition modules of the different computing platforms being configured to be used asymmetrically. (Entelis; [0220]: A data packet is generated from the data, the data packet including control information set based on the packet type and size information set based on a storage space containing the control information (i.e., digital data acquisition)) Regarding claim 11, Entelis and Falzone teach the limitations of claim 1. Entelis and Falzone teach the limitations of claim 11 as follows: The system of claim 1, wherein said verification application of each calculation platform is configured to verify encapsulation of each data item received and encapsulated by said intermediate stage of this same computing platform. (Entelis; [0334]: an authentication scheme may be used, and the code field 100a is used to carry information for supporting the authenticity of the frame 60b (or of the frame 10). For example, the authentication scheme may use, or be based on, Message Authentication Code (MAC) (i.e., verify encapsulation of each data item received)) Regarding claim 12, Entelis and Falzone teach the limitations of claim 1. Entelis and Falzone teach the limitations of claim 12 as follows: A method of verifying the operation of a control system according to claim 1, the method comprising: encapsulating each digital data item processed by the intermediate stage; and verifying encapsulation of each data item received by the verification application. (Entelis; [0334]: an authentication scheme may be used, and the code field 100a is used to carry information for supporting the authenticity of the frame 60b (or of the frame 10). For example, the authentication scheme may use, or be based on, Message Authentication Code (MAC) (i.e., verify encapsulation of each data item received)) Claims 7 are rejected under 35 U.S.C. 103 as being unpatentable over Entelis (US 20220046114 A1), in view of Falzone (US 20250138559 A1), as applied to independent claims, further in view of Shat (US 20200073786 A1). Regarding claim 7, Entelis and Falzone teach the limitations of claim 1. Entelis and Falzone do not teach the limitations of claim 7 as follows: The system of claim 1, wherein each computing platform further comprises: a hardware monitoring module configured to implement an operating test of said primary, intermediate and final stages, by injecting predetermined test signals into said primary stage; and a software monitoring module configured to acquire, from said final stage, digital data corresponding to the test signals injected by said hardware monitoring module into said primary stage, and to verify their correspondence with predetermined values. However, in the same field of endeavor, 7 discloses the limitations of claim 7 as follows: The system of claim 1, wherein each computing platform further comprises: a hardware monitoring module configured to implement an operating test of said primary, intermediate and final stages, by injecting predetermined test signals into said primary stage; and (Schat; [0011]: the at least one user register receives digital control signals from the fault management component, the analog test bus component includes an analog test bus, at least one of a digital-to-analog converter (DAC) to convert digital signals from the fault management component to analog signals for injection into the circuit (i.e., injecting predetermined test signals into said primary stage), and an analog-to-digital converter (ADC) to convert analog signals from the circuit to digital signal for the fault management component, the built-in self-test component is configured to test a safety-critical circuit for parametric deviations) a software monitoring module configured to acquire, from said final stage, digital data corresponding to the test signals injected by said hardware monitoring module into said primary stage, and to verify their correspondence with predetermined values. (Schat; [0011]: the at least one user register receives digital control signals from the fault management component, the analog test bus component includes an analog test bus, at least one of a digital-to-analog converter (DAC) to convert digital signals from the fault management component to analog signals for injection into the circuit, and an analog-to-digital converter (ADC) to convert analog signals from the circuit to digital signal for the fault management component, the built-in self-test component is configured to test a safety-critical circuit for parametric deviations (i.e., verify their correspondence with predetermined values)) Shat is combinable with Entelis and Falzone because all are from the same field of endeavor of communication in vehicle networks. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified system of Entelis and Falzone to incorporate fault injection as in Shat in order to improve the reliability of the system by providing a means by which controlled tests may be performed in order to determine accuracy of results. Prior Art Considered But Not Relied Upon Hall (US 9714081 B1) which teaches managing communication between a personal device and an avionics system. Block (US 20170139869 A1) which teaches software and hardware testing in an avionics system. Conclusion For the above-stated reasons, claims 1-12 are rejected. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BLAKE ISAAC NARRAMORE whose telephone number is (303)297-4357. The examiner can normally be reached on Monday - Friday 0700-1700 MT. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taghi T Arani can be reached on (571) 272-3787. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BLAKE I NARRAMORE/Examiner, Art Unit 2438
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Prosecution Timeline

Dec 18, 2024
Application Filed
May 08, 2026
Non-Final Rejection mailed — §103
Jun 27, 2026
Response Filed
Sep 10, 2026
Final Rejection mailed — §103 (current)

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