Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 7, and 8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Trivedi (US 6,745,337).
Regarding claim 1, fig. 4 and 5 of Trivedi discloses a circuit comprising: a flip-flop [508] receiving an input clock signal [CLK]; and one or more delay elements [514]; wherein the circuit is configured to adjust a pulse width (via 516, which is a NOR gate receiving ISCS and a delayed ISCS-DISCS#) of an output clock signal [RST_PULSE] independent of a clock period of the input clock signal; and wherein the circuit is configured to adjust the pulse width by changing a time at which the output clock signal transitions from a digital-low state to a digital-high state within the clock period (pulse width is adjusted based on the delay of 514 since it is input to NOR gate 516), thereby adjusting a propagation window extending from the transition to a first rising edge of the input clock signal following the transition (duration of time from RST_PULSE transition to next rising transition of CLK).
Regarding claim 2, fig. 4 and 5 of Trivedi discloses wherein the pulse width corresponds to a duration of the output clock signal.
Regarding claim 3, fig. 4 and 5 of Trivedi discloses wherein: the adjustment of the pulse width comprises one of increasing or decreasing the duration of the output clock signal set at the digital low state within the clock period; and the clock period corresponds to a duration from a first rising edge to a second rising edge of the input clock signal (based on delay of 514 input to NOR 516).
Regarding claim 7, fig. 4 and 5 of Trivedi discloses wherein: the one or more delay elements is a buffer (e.g. two inverters of 514 comprise a buffer); the buffer comprises first and second inverters; and the output of the first inverter corresponds to the output clock signal.
Regarding claim 8, fig. 4 and 5 of Trivedi discloses wherein: the circuit is configured to adjust the pulse width of the output clock signal by modifying a duration of a flip-flop output at a digital high state, and the flip-flop output corresponds to an input of the one or more delay elements (output of 508 propagates to input of 514).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Trivedi.
Regarding claim 18, Trivedi discloses the claimed invention except for adjusting the clock for the duration claimed. It would have been an obvious matter of design choice to the ordinary artisan before the effective filing date of the claimed invention to implement clock delay, since it was well known in the art that the delay may be adjusted based on operator specifications.
Allowable Subject Matter
Claims 19-23 are allowed.
Claims 4-6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SIBIN CHEN whose telephone number is (571)270-5768. The examiner can normally be reached 9:00am - 5:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached at (571) 270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SIBIN CHEN/Primary Examiner, Art Unit 2836
Prosecution Insights