Prosecution Insights
Last updated: October 02, 2026
Application No. 18/985,954

INSPECTION SYSTEM AND INSPECTION DEVICE

Non-Final OA §103§112
Filed
Dec 18, 2024
Priority
Nov 18, 2016 — JP 2016-225540 +4 more
Examiner
HYLINSKI, STEVEN J
Art Unit
2482
Tech Center
2400 — Computer Networks
Assignee
Angel Group Co., Ltd.
OA Round
1 (Non-Final)
75%
Grant Probability
Favorable
1-2
OA Rounds
12m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
704 granted / 935 resolved
+17.3% vs TC avg
Strong +17% interview lift
Without
With
+17.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
24 currently pending
Career history
960
Total Applications
across all art units

Statute-Specific Performance

§101
10.4%
-29.6% vs TC avg
§103
42.7%
+2.7% vs TC avg
§102
28.6%
-11.4% vs TC avg
§112
10.2%
-29.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 935 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-33 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In claim 1, the limitation, “determining, using the first chip information … whether or not the gaming chip corresponding to the acquired second chip information does not exist” renders claim 1 and its dependents indefinite. There is missing context needed to qualify the negative limitation that some gaming chip “does not exist”. Claim 1 fails to define by what evaluation process step(s) or based on what defined criteria a chip can be determined not to exist. The claim scope appears to include determining that a gaming chip physically does not exist, which is a logical impossibility for a gaming chip that is positively claimed as being read by an optical scanner and thus must exist. It appears the scope of the claim is intended to cover cross-checking one or more casino databases for data entries describing certain gaming chips that are suspected to be fraudulent. If this is the case, the claim should be amended to clarify such functionality. A contemplated amendment to claim 1 would be “a determination unit… determining, using the first chip information acquired by the first reader … whether or not data describing the gaming chip corresponding to the acquired second chip information does not exist in one or more databases comprising data entries listing suspected fraudulent gaming chips.” Other similar language that makes clear how a determination of “does not exist” is made may be suitable. Appropriate correction is required. Claim 2 recites the limitation "the number of the first chip information". There is insufficient antecedent basis for this limitation in the claim. Claim 3 recites the limitation "the number of the first chip information". There is insufficient antecedent basis for this limitation in the claim. Claim 4 recites the limitation "the notational information" and “the camera”. There is insufficient antecedent basis for either of these limitations in the claim. Claim 5 recites the limitation "the notational information". There is insufficient antecedent basis for this limitation in the claim. Claim 21 recites the limitation "the number of pieces per value". There is insufficient antecedent basis for this limitation in the claim. Claim 23 recites the limitation "the determination results". There is insufficient antecedent basis for this limitation in the claim. Claim 26 recites the limitation "the group to which the gaming chip belongs”. There is insufficient antecedent basis for this limitation in the claim. Claim 28 recites the limitation "the designated colors". There is insufficient antecedent basis for this limitation in the claim. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-6, 8-10, 17-20, 25-29 and 33 are rejected under 35 U.S.C. 103 as being unpatentable over US 2009/0075725 to Koyama in view of WO 2005/104049 A1 to Soltys and US 2012/0080845 to Emori et al. Re claim 1, Koyama teaches: An inspection system (Fig. 8). for inspecting gaming chips having at least first (chip 30 has tag 34 read by reader 38, see [0057]) and second chip information, wherein the second chip information is provided on a side surface of the gaming chip in a form that can be optically read, (bar code reader 1012 reads periphery of each chip, see [0019]) the inspection system comprising: an area configured to store a plurality of gaming chips stack on top of each other; (See Figs. 1,8) and an inspection device configured to inspect the gaming chips stored in the housing, wherein the inspection device comprises: a first reader configured to acquire the first chip information of the gaming chips stored in the housing; (refer to the description of tag reader 38) a second reader configured to optically read the side surface of the gaming chip stored in the housing to acquire the second chip information; (refer to the description of bar code reader 102) and a determination unit configured to determine whether or not the plurality of gaming chips stored in the housing are acceptable, using the first chip information acquired by the first reader and the second chip information acquired by the second reader A processor 110 that is connected to all readers is configured to determine, for each of a plurality of gaming chips placed in a chip storage area, whether there is a discrepancy between each first gaming chip information acquired by the first readers and each respective second gaming chip information acquired by the second reader, to determine whether each gaming chip placed in a chip storage area fails to match other information, see [0027], [0068], or is counterfeit, see [0072]. Although Koyama teaches the same inventive concept substantially as claimed, using imagine and chip edge-reading technology in conjunction to look for counterfeit chips, Koyama is silent as to whether a) the stackable area where chips can be read includes a housing or b) a determination whether or not chip information of certain chips is acceptable includes using first and second chip information to determine whether a gaming chip does not exist. Soltys is an analogous casino chip reading reference that teaches it was known in the art that player tracking chip readers could be configured to read chips in chip trays, in addition to being located/configured for reading chips placed on the table – see the Abstract, “The optical scanners may be located in a chip tray near the dealer, in the gaming table, or in a dealer's podium adjacent to a gaming table”. The System Overview describes that “A play tracking subsystem 56 visually monitors activity on the playing surface 20 of the gaming table 10. The play tracking subsystem 56 can be located in the chip tray 32 … A chip tray monitoring subsystem 58 reads the machine-readable indicia 37 on the edge 35 of the chips 36 located in the chip tray 32. The chip tray monitoring subsystem 50 can be assembled with the chip tray 32 or assembled with the table 10 and thus attachable to the chip tray 32. … the chip tray monitoring subsystem 58 is configured to communicate with the play tracking subsystem 56.” Emori is an additional computerized casino chip counterfeit detection system. Emori teaches querying a server to learn whether data matching chips scanned at a gaming table exists in a database of known locked (invalidated) status chips – if so, these chips are prevented from being used. Chips not existing in a locked status list at a time of querying teach the claim limitation of “does not exist”. See in Emori [0270], which describes that when chips are placed on a gaming table, control device 200 inquires gaming sever 410 about whether the chips are validated or invalidated status. And in [0422]-[0423], [0505], chips placed in invalidated status are locked and will have lock information stored in server 410. This lock information will prevent these chips from being fraudulently used. It would have been obvious to one having ordinary skill in the art before the effective filing date of the instant invention that Koyama’s counterfeit chip detection reference could have additionally scanned chips located in chip trays and consulted a list of chips known to be locked/invalidated to provide enhanced counterfeit detection without causing any unexpected results. Re claim 33, Soltys is relied on to teach that casino chip scanning can be performed on chips located in a chip tray 32, refer to the discussion of Soltys in the rejection of claim 1. Re claims 2-3, 7, Koyama discloses, see [0027], [0042], [0077], a detection of a counterfeit state occurs when certain data does not match, wherein, see [0070], [0071], data read from chips can include bar code, denomination, color and weight. Koyama also discloses, see [0068], [00752, that a counterfeit determination is made when first gaming chip information acquired by a first chip reader does not match ID information of second chip information acquired by a second chip reader. Re claims 4-5, 29, Koyama discloses a bar code which is invisible to the naked eye but readable with a reader ([0019, 0048]) and a camera to analyze and identify the chips ([0019, 0048, 0050). The camera is preferably an infrared camera emitting fluorescent material to show information ([0048, 0074]) or a UV camera ([0050]). Re claim 6, Koyama discloses a display configured to display a result of the determination that distinguishes between those of the gaming chips that are in the pass state and those of the gaming chips that are in the fail state (display 202 [0021]), so that a respective one of the gaming chips that is in the fail state can be identified when a value of the respective gaming chip indicated by the color information in the second gaming chip information of the respective gaming chip does not coincide with the value information of the second gaming chip information, the value information of the first gaming chip information of the respective gaming chip, or a combination thereof (counterfeit chips identified when chip information doesn’t match, see [0027],[0068].) Re claims 8-9, Koyama teaches that first and/or second chip information includes common as well as individual information that individually identifies each gaming chip, see [0070]-[0071]. And Emori, see [0270], [0422]-[0423], [0505], describes that a server maintains status info related to chips including whether certain chips have been locked/invalidated, so that they cannot be fraudulently reused. Re claim 10, Koyama discloses color indicative of gaming chip values, see [0027]. Re claim 17, Koyama discloses a programmed processor further comprising a display (202, see [0021]) configured to determine that the plurality of gaming chips placed in the area are in a rejected state (counterfeit, see [0042]) when a plurality of pieces of identification information of the first gaming chip acquired by the first reader and a plurality of pieces of identification information of the second gaming chip acquired by the second reader do not match (See Koyama [0027]). Re claim 18, Koyama discloses wherein processor 110 determines chips placed in area 301 (Fig. 8) wherein the processor is configured to determine that a plurality of the gaming chips placed in the area are rejected when a number of the first gaming chip information acquired by the first reader or a number of the second gaming chip information acquired by the second reader is not a predetermined number (Koyama detects random number of chips displayed. A random number, by definition, is not a predetermined number). Re claims 19-20, Koyama discloses chip color information indicating respective values of the gaming chips as the second gaming chip information (part of ID tag 34 information [0027]), and include respective value information identifying respective values of the gaming chips as the first gaming chip information ([0048, 0055]); and the processor is configured to determine that a plurality of the gaming chips placed in the area are rejected when the color information does not coincide with the value information of the first gaming chip information ([0027, 0068]). Re claim 25, refer to the rejection of claim 1 which discusses the first chip information is detected via RFID technology. Re claim 26, Koyama discloses first and second gaming chip information ([0019], [0048], [0050], [0026], [0027], [0055], [0068]), and chip information includes group information indicating respective groups to which respective ones of the gaming chips belong, and the groups are classified in accordance with respective values (denomination [0038]). Re claim 27, Koyama discloses wherein the second gaming chip information includes respective designated colors indicating ([0027]) and respective values of the gaming chips on respective side surfaces of the gaming chips ([0027], [0030], periphery [0019]), the second reader comprises: a camera configured to capture an image of the side surfaces of the gaming chips placed in the area (bar code reader 102); and an identification configured to: analyze the image captured by the camera; identify and output the respective designated colors of each of the plurality of gaming chips based on the analysis; and identify and output the respective values of the plurality of gaming chips in accordance with the identified designated colors (processor (in one embodiment processor 110 is connected to all reader [0053]) Re claim 28, Koyama discloses that various colors are sandwiched in the thickness of chips ([0027]). Re claim 29, Koyama discloses a bar code which is invisible to the naked eye but readable with a reader [0019], [0048]) and a camera to analyze and identify the chips ([0019], [0048], [0050]). Specifically, an infrared camera emitting fluorescent material and shows information ([0048], [0074]) or ultra violet rays ([0050]). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN J HYLINSKI whose telephone number is (571)270-1995. The examiner can normally be reached Mon-Fri 10-530. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dmitry Suhol can be reached at (571) 272-4430. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STEVEN J HYLINSKI/ Primary Examiner, Art Unit 3715
Read full office action

Prosecution Timeline

Dec 18, 2024
Application Filed
Aug 26, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
75%
Grant Probability
93%
With Interview (+17.4%)
2y 9m (~12m remaining)
Median Time to Grant
Low
PTA Risk
Based on 935 resolved cases by this examiner. Grant probability derived from career allowance rate.

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