DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to because in Figures 10-13, “DUT1”, “DUT2”, “DUT3”, and “DUT4” (left side) should be replaced with --DPS1--, --DPS2--, --DPS3--, and --DPS4--, respectively. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities:
In paragraph [0063], line 9, “322” should be replaced with --324--.
In paragraph [0090], line 1, “400” should be replaced with --4000--.
In paragraph [0100], line 5, “43000” should be replaced with --4300--.
Appropriate correction is required.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claim 7 is objected to because of the following informalities:
In claim 7, line 2, “comprises,” should be replaced with --comprises--.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Tilbor et al. (US 7,737,715) in view of Fukushima et al. (US 7,098,680).
Regarding claims 1 and 19, Tilbor et al. discloses a test system (see Fig. 1), comprising: a device power supply (element 215, Fig. 2) configured to supply power to a device under test (element 140, Fig. 2), which is a test target; and a socket type test arrangement (see Fig. 2) which configured to contact with the device under test and apply a test signal to the device under test, wherein the test arrangement comprises a power transmission line (element 163, Fig. 2) electrically connected to the device power supply and a first terminal (element 261, Fig. 2) of the device under test and configured to transmit power supplied from the device power supply to the device under test, and a voltage sensing circuit (see Fig. 2) electrically connected to the device power supply and the first terminal and a second terminal (element 262, Fig. 2) of the device under test, configured to sense a voltage associated with the device under test and transmit the voltage to the device power supply, and including a subtractor (i.e., comparator unit 212, Fig. 2) configured to output a difference between a voltage of the first terminal and a voltage of the second terminal of the device under test (see Fig. 2).
Although Tilbor et al. does not appear to disclose a probe card type test arrangement for performing the testing, Fukushima et al. shows that a probe card type test arrangement (element 400, Fig. 9) and a socket type test arrangement (element 400, Fig. 9) are art-recognized equivalents (see col. 13, lines 19-36). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to substitute art-recognized equivalents known for the same purpose simply as a matter of design choice which a person with ordinary skill in the art would have found obvious in accordance with the desired purpose/application (see col. 13, lines 19-36).
Regarding claim 2, Tilbor et al. discloses a test system, wherein the subtractor comprises a first input terminal (see annotated Fig. 2 below) electrically connected to the first terminal, a second input terminal (see annotated Fig. 2 below) electrically connected to the second terminal, and an output terminal (see annotated Fig. 2 below) electrically connected to the device power supply, and the voltage sensing circuit is configured to transmit the difference between the voltage of the first terminal and the voltage of the second terminal outputted from the subtractor to the device power supply (see col. 5, line 62 through col. 6, line 6).
Regarding claim 3, Tilbor et al. discloses a test system, wherein the first terminal comprises an operating voltage (i.e., Vdd) pad (see Fig. 2), and the second terminal comprises a ground (i.e., Vss) pad (see Fig. 2).
Regarding claim 20, Tilbor et al. discloses a test system (see Fig. 1), comprising: a device power supply (element 215, Fig. 2) configured to supply power to a device under test (element 140, Fig. 2), which is a test target; and a socket type test arrangement (element 130, Fig. 2) configured to electrically connect the device power supply and the device under test, the test arrangement configured to contact with the device under test and apply a test signal to the device under test, wherein the socket comprises a power transmission line (element 163, Fig. 2) electrically connected to the device power supply and a first terminal (element 261, Fig. 2) of the device under test, the power transmission line configured to transmit power supplied from the device power supply to the device under test, and a voltage sensing circuit (see Fig. 2) comprising a subtractor (.e., comparator unit 212, Fig. 2) configured to output a difference between a voltage of the first terminal and a voltage of a second terminal (element 262, Fig. 2) of the device under test, the voltage sensing circuit configured to transmit the difference between the voltage of the first terminal and the voltage of the second terminal outputted from the subtractor to the device power supply (see Fig. 2), and the device power supply is configured to adjust power to be provided to the device under test based on the difference between the voltage of the first terminal and the voltage of the second terminal (see col. 6, lines 7-20).
Although Tilbor et al. does not appear to disclose a probe card type test arrangement for performing the testing, Fukushima et al. shows that a probe card type test arrangement (element 400, Fig. 9) and a socket type test arrangement (element 400, Fig. 9) are art-recognized equivalents (see col. 13, lines 19-36). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to substitute art-recognized equivalents known for the same purpose simply as a matter of design choice which a person with ordinary skill in the art would have found obvious in accordance with the desired purpose/application (see col. 13, lines 19-36).
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Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Tilbor et al. (US 7,737,715) in view of Fukushima et al. (US 7,098,680) as applied to claims 1-3, 19, and 20 above, and further in view of Ryu et al. (US 2014/0145745).
Regarding claim 16, although Tilbor et al. does not appear to disclose the device under test comprising an image sensor, Ryu et al. shows that this feature is well known in the art (see par. [0049]). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to apply a known technique to a known device ready for improvement to yield predictable results, such as accurately testing an image sensor device.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Tilbor et al. (US 7,737,715) in view of Fukushima et al. (US 7,098,680) as applied to claims 1-3, 19, and 20 above, and further in view of Miller (US 7,557,592).
Regarding claim 17, although Tilbor et al. does not appear to disclose a second device power supply configured to supply power to a second device under test, Miller shows that this feature is well known in the art. Miller discloses a test system, wherein the device under test comprises a first device under test (element 120, Fig. 3) and a second device under test (element 120, Fig. 3), and the device power supply comprises a first device power supply (element 210, Fig. 3) configured to supply power to the first device under test, and a second device power supply (element 210, Fig. 3) configured to supply power to the second device under test. Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to apply a known technique to a known device ready for improvement to yield predictable results, such as allowing multiple devices to be tested in parallel to increase productivity.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Henson et al. (US 7,649,366) discloses a method and apparatus for switching tester resources. Miller (US 7,595,629) discloses a method and apparatus for calibrating communications channels. Ezoe (US 7,372,287) discloses a semiconductor device testing apparatus and device interface board.
Allowable Subject Matter
No art has been found for a prior art rejection of claims 4-15 and 18 at this time.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MILTON GONZALEZ whose telephone number is (571)270-7914. The examiner can normally be reached 8:00 AM - 5:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, WALTER LINDSAY can be reached at (571) 272-1674. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WALTER L LINDSAY JR/Supervisory Patent Examiner, Art Unit 2852
/M.G/Examiner, Art Unit 2852
6/26/2026
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