DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Status
Claims 1, 10-11 and 16 have been amended. No new claims have been added or cancelled. Claims 1-20 remain pending and are ready for examination.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3, 5-6, 9-11, and 13-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shen (US Publication No. 2016/0103630 -- "Shen") in view of Kim et al. (US Publication No. 2022/0187996 – “Kim”) in further view of Park et al. (US publication No. 2022/0057938 – “Park”).
Regarding claim 1, Shen teaches A method, comprising: determining a gap between: a difference in a first health characteristic value and a second health characteristic value of blocks of memory cells; and a health threshold associated with the blocks of memory cells; (Shen paragraph [0014], Referring to FIG. 1, a particular illustrative embodiment of a system is depicted and generally designated 100. The system 100 includes a data storage device 102 and a host device 150. The data storage device 102 includes a controller 120 and a memory 104, such as a non-volatile memory, that is coupled to the controller 120. The controller 120 may be configured to determine one or more health indicators (e.g., health statuses) associated with the memory 104. As used herein, “health” is used to indicate an amount and/or a type of use or wear of a system or a device, such as a memory and/or components thereof. The health of a system or a device may provide an indication and/or a prediction of an endurance of the system or the device and may be representative of an amount of wear or a decrease in (e.g., a degradation of) a storage capability of the system or the device. A health indicator may include or correspond to a value that is representative of a health of a region of the memory 104 (e.g., a health of a storage element, a page, a wordline, a block, a die, or a meta block) or a health of the memory 104 as a whole. For example, the value of the health indicator may be a numerical value (e.g., a scaled value or a relative value) or a descriptive value (e.g., very healthy, healthy, slightly unhealthy, unhealthy), as illustrative, non-limiting examples. To illustrate, a first region (e.g., a first block) of the memory 104 may correspond to a first health indicator (e.g., “healthy”) and a second region (e.g., a second block) of the memory may correspond to a second health indicator (e.g., “unhealthy”), where the first region may be determined to be healthier than the second region based on a comparison of the first health indicator to the second health indicator. Multiple health characteristics or indicators can be obtained and utilized with respect to the memory blocks, and may be compared to each other to obtain a relative or differential value, as well as values corresponding to certain thresholds) determining the gap is greater than or equal to a gap threshold from the health threshold; (Shen paragraph [0033], The health meter 184 may apply the health scheme 185 (e.g., the first health scheme 180) using a first set of one or metrics (maintained by the metric tracker 170) to generate health indicators for each of the blocks 142-146. The one or more metrics applied for a particular block may correspond to the particular block (e.g., a P/E count of the block 142 may be used to determine a health indictor of the block 142 and a P/E count of the block 144 may be used to determine a health indicator of the block 144). As another example, based on the P/E count 172 being greater than or equal to the threshold value, the health meter 184 may determine that the memory 104 is in the second life stage of the multiple life stages. Based on the memory 104 being in the second life stage, the health meter 184 may select the second health scheme 182 to be used as the health scheme 185. The health meter 184 may apply the health scheme 185 (e.g., the second health scheme 182) to a second set of one or metrics to generate health indicators of each of the blocks 142-146. The first set of one or more metrics may be the same as or different than the second set of one or more metrics. When the first set of one or more metrics is the same as the second set of one or more metrics, different weight value may be applied to the first set of one or more metrics and to the second set of one or more metrics. The health meter 184 may provide an output 186 that includes the health indicators (e.g., health status information) associated with the memory 104, such as the health indicators of one or more storage elements, one or more pages, one or more wordlines, one or more blocks, one or more dies, one or more meta blocks, or an entirety of the memory 104. The gap may be determined to exceed the threshold value obtained from the health indicators) performing a pseudo media management operation on the blocks of memory cells responsive to an occurrence of an erase operation associated with the block of memory cells; (Shen paragraph [0015], The controller 120 may be configured to determine one or more health indicators associated with a memory system (e.g., a health indicator of a storage element of the memory 104, a health indicator of a page of the memory 104, a health indicator of a wordline of the memory 104, a health indicator of a block of the memory 104, a health indicator of a die of the memory 104, a health indicator of a meta block of the memory 104, or a health indicator of the memory 104 as a system) based on a “life” stage of the memory 104. As used herein, “life” of the memory 104 corresponds to a duration of use of the memory 104 from a first data storage operation until an end-of-life condition is met, such as when an amount of wear on the memory 104 causes the data storage device 102 to be unable to reliably store and retrieve data for the host device 150. For example, an endurance of the memory 104 (e.g., a life of the memory 104 in terms of a capability of the memory 104 to reliably store and maintain data) may be divided into multiple life stages, such as a beginning-of-life stage and an end-of-life stage, as illustrative, non-limiting examples. The controller 120 may be configured to determine which stage of the multiple life stages is associated with the memory 104 based on at least one metric, such as a program/erase count metric, a data received metric, a data written metric, or a combination thereof, as illustrative, non-limiting examples. Shen teaches memory management operations that can be performed without determining a specific value or minimum health threshold, but instead based on more generic considerations) subsequent to performing the pseudo media management operation, determining an updated first health characteristic value of the blocks of memory cells; (Shen paragraph [0040], As an illustrative example, the controller 120 may be configured to track one or more metrics associated with the memory 104. For example, the metric tracker 170 may track the one or more metrics. The controller 120 may further be configured to determine, based on the one or more metrics, a transition from a first life stage of the memory 104 to a second life stage of the memory 104. Based on the transition to the second life stage, the controller 120 may modify weight values associated with the health scheme 185. The controller 120 (e.g., the health meter 184) may use the modified weight values to determine a health indicator of multiple regions (e.g., multiple blocks 142-146) included in the memory 104. The controller 120 may be configured to select one or more regions (e.g., one or more blocks of the multiple blocks 142-146) during the second life stage based on the health indicators. The health characteristic values may be tracked and constantly updated based on events such as memory operations being performed) and determining an updated health threshold based on the health threshold, a value of an incremented erase counter, and a total count of the memory cell blocks (Shen paragraph [0033], As an illustrative example, the health meter 184 may determine that the memory 104 is associated with a first life stage of the multiple life stages. For example, the health meter 184 may compare the P/E count 172 of the memory 104 to a threshold value (e.g., a threshold number of P/E cycles) and, based on the P/E count 172 being less than the threshold value, the health meter 184 may determine that the memory 104 is in the first life stage. Based on the memory 104 being in the first life stage, the health meter 184 may select the first health scheme 180 to be used as the health scheme 185. The health meter 184 may apply the health scheme 185 (e.g., the first health scheme 180) using a first set of one or metrics (maintained by the metric tracker 170) to generate health indicators for each of the blocks 142-146. The one or more metrics applied for a particular block may correspond to the particular block (e.g., a P/E count of the block 142 may be used to determine a health indictor of the block 142 and a P/E count of the block 144 may be used to determine a health indicator of the block 144). Also see Shen paragraph (Shen paragraph [0042], Based on a determination by the health meter 184 that the memory 104 is associated with the first life stage, the health meter 184 may use a first set of weight values that includes weight values (a, b)=(0.2, 0.8). Accordingly, the BHM for the first life stage is BHM.sub.First.sub._.sub.Stage=0.2*FBC+0.8*PEC. The BHM for the first life stage may include or correspond to the health scheme 185 applied during the first life stage of the memory 104, such as the first health scheme 180. Since the program/erase count metric has more weight than the FBC metric, the data storage device 102 may favor uses of blocks having a lower PEC, thus promoting regular use of each of the blocks. The updated health threshold may utilize the previous health threshold as the block health meter, as well as erase counter (i.e., PEC), as well as the total cell block count of the memory region selected (i.e., see Shen paragraph [0040]).
Shen does not teach determining a gap threshold equal to at least one of the first and second health characteristic values; selectively performing a static wear leveling operation on a particular block of the block of memory cells, wherein the particular block has a highest health characteristic value of the block of memory cells.
However, Kim teaches selectively performing a static wear leveling operation on a particular block of the block of memory cells, wherein the particular block has a highest health characteristic value of the block of memory cells (Kim paragraph [0048], A background operation may be at least one of wear leveling, read reclaim and garbage collection. Wear leveling may refer to, for example, static wear leveling, dynamic wear leveling, or the like. Static wear leveling may refer to storing erase counts of memory blocks and moving cold data with which an erase operation or a write operation is seldom performed (e.g., less than a predetermined number of times) to a memory block with the highest erase count. A static wear leveling operation may be performed on a block having a highest erase count, which is interpreted as referring to a highest health characteristic value).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen with those of Kim. Kim teaches a static wear leveling operation which targets a block with a highest health characteristic, which optimizes garbage collection targeting to ensure the highest risk blocks are addressed first, resulting in improved reliability (i.e., see Kim paragraphs [0164-0165], In accordance with one embodiment, an apparatus includes a storage configured to store instructions and logic configured to execute the instructions to perform any of the embodiments described herein. For example, the logic may be configured to detect a defect occurring in at least one of a memory controller or a buffer memory, check whether or not the defect is reparable based on information in a defect information table, and perform a recovery operation based on a type of the defect when the defect is reparable. The logic may correspond, for example, to the memory controller as described herein. According to one or more of the aforementioned embodiments, a memory controller having improved reliability and a storage device including such a memory controller are provided).
Shen in view of Kim does not teach determining a gap threshold equal to at least one of the first and second health characteristic values.
However, Park teaches determining a gap threshold equal to at least one of the first and second health characteristic values (Park paragraph [0094], Also, in an embodiment, the wear level manager 212 may determine whether the wear levels of the plurality of cores 221, 222, 223, and 224 are equal to each other based on a result obtained by comparing, with a threshold difference value, the difference values of erase count values of the plurality of memory block groups respectively corresponding to the plurality of zones controlled by each of the plurality of cores 221, 222, 223, and 224. For example, when a difference value of a highest erase count value and a lowest erase count value from among the erase count values corresponding to the plurality of cores 221, 222, 223, and 224 exceeds the threshold difference value. The gap threshold may be equal to a highest or lowest erase count of the memory block, wherein the erase counts may correspond to health characteristic values).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen and Kim with those of Park. Park teaches determining a gap threshold value, which may be utilized to access health values for a given set of blocks and determine when a wear leveling operation is necessary (i.e., see Park paragraphs [0173-0174], Alternatively, when the difference value of the highest reset count sum value and the lowest reset count sum value is the threshold difference value or less, based on a determination result in the step S1305, in step S1309, the memory controller 200 may generate erase count values of a plurality of memory block groups respectively corresponding to the plurality of zones. In step S1311, the memory controller 200 may determine whether a difference value between a highest erase count value and a lowest erase count value from among the erase count values of the plurality of memory block groups exceeds a threshold difference value).
Regarding claim 2, Shen in view of Kim in further view of Park teaches The method of claim 1, further comprising determining the gap between the updated first health characteristic value and an updated second health characteristic value is less a gap threshold from the health threshold (Shen paragraph [0028], The controller 120 may include a metric tracker 170, health schemes 178, a health meter 184, and a selector 188. The metric tracker 170 may be configured to track one or more metrics associated with the memory 104. The metric tracker 170 may be configured to track the one or more metrics for the memory 104 as a whole and/or on a storage element-by-storage element basis, on a page-by-page basis, on a wordline-by-wordline basis, on a block-by-block basis, on a die-by-die basis, and/or on a meta block-by-meta block basis. The one or more metrics tracked by the metric tracker 170 may include a program/erase (P/E) count (PEC) 172, a failed bit count (FBC) 174, and a trim value 176 (e.g., a trim index value), as illustrative, non-limiting examples. Alternatively, or in addition, the one or more metrics tracked by metric tracker 170 include a bit error rate (BER), a programming time, an erase time, a number of voltage pulses to program a storage element, a number of voltage pulses to erase a storage element, one or more other metrics corresponding to the memory 104, or a combination thereof, as illustrative, non-limiting examples. The health characteristic values may be tracked and updated throughout the processes of the memory system).
Regarding claim 3, Shen in view of Kim in further view of Park teaches The method of claim 2, wherein responsive to a determination that the gap is less the gap threshold from the health threshold, performing a wear-leveling operation (Shen paragraph [0033], As an illustrative example, the health meter 184 may determine that the memory 104 is associated with a first life stage of the multiple life stages. For example, the health meter 184 may compare the P/E count 172 of the memory 104 to a threshold value (e.g., a threshold number of P/E cycles) and, based on the P/E count 172 being less than the threshold value, the health meter 184 may determine that the memory 104 is in the first life stage. Based on the memory 104 being in the first life stage, the health meter 184 may select the first health scheme 180 to be used as the health scheme 185. The health meter 184 may apply the health scheme 185 (e.g., the first health scheme 180) using a first set of one or metrics (maintained by the metric tracker 170) to generate health indicators for each of the blocks 142-146. The one or more metrics applied for a particular block may correspond to the particular block (e.g., a P/E count of the block 142 may be used to determine a health indictor of the block 142 and a P/E count of the block 144 may be used to determine a health indicator of the block 144). Certain operations may be performed in the event that the gap is less than a particular threshold value, such as a wear leveling operation, see Shen paragraph [0016], As another example, the controller 120 may select a particular health scheme of multiple health schemes based on a particular stage of the multiple life stages and may apply the particular health scheme to determine the one or more health indicators. The one or more health indicators may be used by the controller 120 to select a region of the memory 104, such as one or more storage elements, one or more pages, one or more wordlines, one or more blocks, one or more dies, and/or one or more meta blocks, to be used for a memory operation, such as a write operation, a wear leveling operation, a garbage collection operation, and/or a background scan operation, as illustrative, non-limiting examples. Multiple memory operations may be performed based on the health indicator values, including wear leveling operations).
Regarding claim 5, Shen in view of Kim in further view of Park teaches The method of claim 2, wherein responsive to a determination that the gap is less the gap threshold from the health threshold, determining an actual or global health characteristic value (Shen paragraph [0033], As an illustrative example, the health meter 184 may determine that the memory 104 is associated with a first life stage of the multiple life stages. For example, the health meter 184 may compare the P/E count 172 of the memory 104 to a threshold value (e.g., a threshold number of P/E cycles) and, based on the P/E count 172 being less than the threshold value, the health meter 184 may determine that the memory 104 is in the first life stage. Based on the memory 104 being in the first life stage, the health meter 184 may select the first health scheme 180 to be used as the health scheme 185. The health meter 184 may apply the health scheme 185 (e.g., the first health scheme 180) using a first set of one or metrics (maintained by the metric tracker 170) to generate health indicators for each of the blocks 142-146. The one or more metrics applied for a particular block may correspond to the particular block (e.g., a P/E count of the block 142 may be used to determine a health indictor of the block 142 and a P/E count of the block 144 may be used to determine a health indicator of the block 144). Certain operations may be performed in the event that the gap is less than a particular threshold value).
Regarding claim 6, Shen in view of Kim in further view of Park teaches The method of claim 2, further comprising: determining the gap between the updated first health characteristic value and an updated second health characteristic value is greater than or equal to the gap threshold from the health threshold; (Shen paragraph [0028], The controller 120 may include a metric tracker 170, health schemes 178, a health meter 184, and a selector 188. The metric tracker 170 may be configured to track one or more metrics associated with the memory 104. The metric tracker 170 may be configured to track the one or more metrics for the memory 104 as a whole and/or on a storage element-by-storage element basis, on a page-by-page basis, on a wordline-by-wordline basis, on a block-by-block basis, on a die-by-die basis, and/or on a meta block-by-meta block basis. The one or more metrics tracked by the metric tracker 170 may include a program/erase (P/E) count (PEC) 172, a failed bit count (FBC) 174, and a trim value 176 (e.g., a trim index value), as illustrative, non-limiting examples. Alternatively, or in addition, the one or more metrics tracked by metric tracker 170 include a bit error rate (BER), a programming time, an erase time, a number of voltage pulses to program a storage element, a number of voltage pulses to erase a storage element, one or more other metrics corresponding to the memory 104, or a combination thereof, as illustrative, non-limiting examples. As previously mentioned, the health characteristic values are updated and tracked through various periods of time) and responsive to the determination that gap is greater than or equal to the gap threshold from the health threshold, refraining from performing a media management operation (Shen paragraph [0033], Based on the memory 104 being in the first life stage, the health meter 184 may select the first health scheme 180 to be used as the health scheme 185. The health meter 184 may apply the health scheme 185 (e.g., the first health scheme 180) using a first set of one or metrics (maintained by the metric tracker 170) to generate health indicators for each of the blocks 142-146. The one or more metrics applied for a particular block may correspond to the particular block (e.g., a P/E count of the block 142 may be used to determine a health indictor of the block 142 and a P/E count of the block 144 may be used to determine a health indicator of the block 144). As another example, based on the P/E count 172 being greater than or equal to the threshold value, the health meter 184 may determine that the memory 104 is in the second life stage of the multiple life stages. Based on the memory 104 being in the second life stage, the health meter 184 may select the second health scheme 182 to be used as the health scheme 185. The health meter 184 may apply the health scheme 185 (e.g., the second health scheme 182) to a second set of one or metrics to generate health indicators of each of the blocks 142-146. The first set of one or more metrics may be the same as or different than the second set of one or more metrics. When the first set of one or more metrics is the same as the second set of one or more metrics, different weight value may be applied to the first set of one or more metrics and to the second set of one or more metrics. If the gap is greater than a threshold value, the "life stage" of the health values may proceed to not perform any memory operations).
Regarding claim 9, Shen in view of Kim in further view of Park teaches The method of claim 1, further comprising: incrementing the second health characteristic value to an incremented second health characteristic value responsive to the occurrence of the erase operation; determining an updated difference between the first health characteristic value and the incremented second health characteristic value; determining an updated gap between the updated difference and the health threshold is less than the gap threshold from the health threshold; (Shen paragraph [0028], The controller 120 may include a metric tracker 170, health schemes 178, a health meter 184, and a selector 188. The metric tracker 170 may be configured to track one or more metrics associated with the memory 104. The metric tracker 170 may be configured to track the one or more metrics for the memory 104 as a whole and/or on a storage element-by-storage element basis, on a page-by-page basis, on a wordline-by-wordline basis, on a block-by-block basis, on a die-by-die basis, and/or on a meta block-by-meta block basis. The one or more metrics tracked by the metric tracker 170 may include a program/erase (P/E) count (PEC) 172, a failed bit count (FBC) 174, and a trim value 176 (e.g., a trim index value), as illustrative, non-limiting examples. Alternatively, or in addition, the one or more metrics tracked by metric tracker 170 include a bit error rate (BER), a programming time, an erase time, a number of voltage pulses to program a storage element, a number of voltage pulses to erase a storage element, one or more other metrics corresponding to the memory 104, or a combination thereof, as illustrative, non-limiting examples. As previously mentioned, the health characteristic values are updated and tracked through various periods of time) and responsive to determining the updated gap is less than the gap threshold from the health threshold, performing a wear-leveling operation on the blocks of memory cells (Shen paragraph [0028], The controller 120 may include a metric tracker 170, health schemes 178, a health meter 184, and a selector 188. The metric tracker 170 may be configured to track one or more metrics associated with the memory 104. The metric tracker 170 may be configured to track the one or more metrics for the memory 104 as a whole and/or on a storage element-by-storage element basis, on a page-by-page basis, on a wordline-by-wordline basis, on a block-by-block basis, on a die-by-die basis, and/or on a meta block-by-meta block basis. The one or more metrics tracked by the metric tracker 170 may include a program/erase (P/E) count (PEC) 172, a failed bit count (FBC) 174, and a trim value 176 (e.g., a trim index value), as illustrative, non-limiting examples. Alternatively, or in addition, the one or more metrics tracked by metric tracker 170 include a bit error rate (BER), a programming time, an erase time, a number of voltage pulses to program a storage element, a number of voltage pulses to erase a storage element, one or more other metrics corresponding to the memory 104, or a combination thereof, as illustrative, non-limiting examples. The health characteristic values may be tracked and updated throughout the processes of the memory system, and can implement a wear leveling operation, see Shen paragraph [0035], The selector 188 may be configured to select a location (e.g., a storage element, a page, a wordline, a block, a die, and/or meta block) of the memory 104 to be subject to a memory operation, such as a write operation, a wear leveling operation, a garbage collection operation, a background scanning operation, etc., as illustrative, non-limiting examples. For example, the selector 188 may select the location based on the health status information generated by the health meter 184. To illustrate, in response to a request to perform a memory operation, the selector may identify one or more regions of the memory 104 available for a write operation (e.g., one or more regions available to have data written thereto). For example, the controller 120 may maintain a list of free blocks of the memory 104 that may be used to perform the memory operation. The selector 188 may identify one or more health indicators, where each of the one or more health indicators corresponds to an available region of the one or more regions. The selector 188 may identify a particular health indicator of the one or more health indicators that is greater than a threshold value or the selector 188 may identify a particular health indicator of the one or more health indicators that indicates a healthiest region).
Regarding claim 10, Shen teaches An apparatus, comprising: blocks of non-volatile memory cells; and a memory sub-system media management component coupled to the blocks of non-volatile memory cells, wherein the memory sub-system media management component is configured to: (Shen paragraph [0024], The memory 104 of the data storage device 102 may include a non-volatile memory. The memory 104 may have a three-dimensional (3D) memory configuration. Alternatively, the memory 104 may have another configuration, such as a two-dimensional (2D) memory configuration. The memory 104 may include one or more memory dies 103. Each of the one or more memory dies 103 may include one or more blocks (e.g., one or more erase blocks). For example, a particular memory die of the one or more memory dies 103 may include the blocks 142-146. Although three blocks are illustrated in FIG. 1, the particular memory die may include more than three blocks or less than three blocks. Each of the blocks 142-146 may include one or more groups of storage elements, such as a representative group of storage elements 107 included in the block 142. The group of storage elements 107 may be configured as a page or a word line. The group of storage elements 107 may include multiple storage elements (e.g., memory cells), such as a representative storage element 109) determine a gap between the difference between a first health characteristic value and a second health characteristic value of the blocks of non-volatile memory cells and a health threshold; (Shen paragraph [0014], Referring to FIG. 1, a particular illustrative embodiment of a system is depicted and generally designated 100. The system 100 includes a data storage device 102 and a host device 150. The data storage device 102 includes a controller 120 and a memory 104, such as a non-volatile memory, that is coupled to the controller 120. The controller 120 may be configured to determine one or more health indicators (e.g., health statuses) associated with the memory 104. As used herein, “health” is used to indicate an amount and/or a type of use or wear of a system or a device, such as a memory and/or components thereof. The health of a system or a device may provide an indication and/or a prediction of an endurance of the system or the device and may be representative of an amount of wear or a decrease in (e.g., a degradation of) a storage capability of the system or the device. A health indicator may include or correspond to a value that is representative of a health of a region of the memory 104 (e.g., a health of a storage element, a page, a wordline, a block, a die, or a meta block) or a health of the memory 104 as a whole. For example, the value of the health indicator may be a numerical value (e.g., a scaled value or a relative value) or a descriptive value (e.g., very healthy, healthy, slightly unhealthy, unhealthy), as illustrative, non-limiting examples. To illustrate, a first region (e.g., a first block) of the memory 104 may correspond to a first health indicator (e.g., “healthy”) and a second region (e.g., a second block) of the memory may correspond to a second health indicator (e.g., “unhealthy”), where the first region may be determined to be healthier than the second region based on a comparison of the first health indicator to the second health indicator. Multiple health characteristics or indicators can be obtained and utilized with respect to the memory blocks, and may be compared to each other to obtain a relative or differential value, as well as values corresponding to certain thresholds) perform a quantity of pseudo media management operations responsive to an occurrence of an erase operation associated with the blocks of non-volatile memory cells; subsequent to performing the quantity of pseudo media management operations … (Shen paragraph [0015], The controller 120 may be configured to determine one or more health indicators associated with a memory system (e.g., a health indicator of a storage element of the memory 104, a health indicator of a page of the memory 104, a health indicator of a wordline of the memory 104, a health indicator of a block of the memory 104, a health indicator of a die of the memory 104, a health indicator of a meta block of the memory 104, or a health indicator of the memory 104 as a system) based on a “life” stage of the memory 104. As used herein, “life” of the memory 104 corresponds to a duration of use of the memory 104 from a first data storage operation until an end-of-life condition is met, such as when an amount of wear on the memory 104 causes the data storage device 102 to be unable to reliably store and retrieve data for the host device 150. For example, an endurance of the memory 104 (e.g., a life of the memory 104 in terms of a capability of the memory 104 to reliably store and maintain data) may be divided into multiple life stages, such as a beginning-of-life stage and an end-of-life stage, as illustrative, non-limiting examples. The controller 120 may be configured to determine which stage of the multiple life stages is associated with the memory 104 based on at least one metric, such as a program/erase count metric, a data received metric, a data written metric, or a combination thereof, as illustrative, non-limiting examples. Shen teaches memory management operations that can be performed without determining a specific value or minimum health threshold, but instead based on more generic considerations) increment the second health characteristic value by an amount equal to the quantity of pseudo media management operations to an incremented second health characteristic value; determine an updated difference between the first health characteristic value and the incremented second health characteristic value; (Shen paragraph [0040], As an illustrative example, the controller 120 may be configured to track one or more metrics associated with the memory 104. For example, the metric tracker 170 may track the one or more metrics. The controller 120 may further be configured to determine, based on the one or more metrics, a transition from a first life stage of the memory 104 to a second life stage of the memory 104. Based on the transition to the second life stage, the controller 120 may modify weight values associated with the health scheme 185. The controller 120 (e.g., the health meter 184) may use the modified weight values to determine a health indicator of multiple regions (e.g., multiple blocks 142-146) included in the memory 104. The controller 120 may be configured to select one or more regions (e.g., one or more blocks of the multiple blocks 142-146) during the second life stage based on the health indicators. The health characteristic values may be tracked and constantly updated based on events such as memory operations being performed, also see Shen paragraph [0087], In some implementations, after the first health indicator is generated, the first health indicator may be stored at a table. The table may be configured to track a corresponding health indicator for each region of a plurality of regions of the memory. The plurality of regions of the memory may include or correspond to multiple storage elements, multiple pages, multiple wordlines, multiple blocks, multiple dies, multiple meta blocks, or a combination thereof, of the memory. Additionally, before or after storing the first health indicator at the table, the first health indicator may be sent to a host device, such as the host device 150 of FIG. 1, that is communicatively coupled to the data storage device and Shen paragraph [0004], A system is configured to use a dynamic health assessment method to evaluate a health status (e.g., generate a health indicator) associated with a memory of a data storage device. An endurance (e.g., a data storage life) of the memory, such as an endurance of a block and/or a die of the memory, may be divided into multiple “life” stages. Each life stage may be associated with different priorities related to use of the memory during the life stage. The system may identify a particular life stage associated with the memory and may evaluate a health status of the memory based on the particular life stage. For example, based on the memory being in a first life stage associated with a beginning-of-life condition of the memory, a first health scheme may be applied that emphasizes a program/erase count to determine a health status associated with the memory. As another example, based on the memory being in a second life stage associated with an end-of-life condition of the memory, a second health scheme may be applied that emphasizes a failed bit count to determine the health status associated with the memory) and determine an updated health threshold based on the health threshold, a value of an incremented erase counter, and a total count of blocks of non-volatile memory cells (Shen paragraph [0033], As an illustrative example, the health meter 184 may determine that the memory 104 is associated with a first life stage of the multiple life stages. For example, the health meter 184 may compare the P/E count 172 of the memory 104 to a threshold value (e.g., a threshold number of P/E cycles) and, based on the P/E count 172 being less than the threshold value, the health meter 184 may determine that the memory 104 is in the first life stage. Based on the memory 104 being in the first life stage, the health meter 184 may select the first health scheme 180 to be used as the health scheme 185. The health meter 184 may apply the health scheme 185 (e.g., the first health scheme 180) using a first set of one or metrics (maintained by the metric tracker 170) to generate health indicators for each of the blocks 142-146. The one or more metrics applied for a particular block may correspond to the particular block (e.g., a P/E count of the block 142 may be used to determine a health indictor of the block 142 and a P/E count of the block 144 may be used to determine a health indicator of the block 144). Also see Shen paragraph (Shen paragraph [0042], Based on a determination by the health meter 184 that the memory 104 is associated with the first life stage, the health meter 184 may use a first set of weight values that includes weight values (a, b)=(0.2, 0.8). Accordingly, the BHM for the first life stage is BHM.sub.First.sub._.sub.Stage=0.2*FBC+0.8*PEC. The BHM for the first life stage may include or correspond to the health scheme 185 applied during the first life stage of the memory 104, such as the first health scheme 180. Since the program/erase count metric has more weight than the FBC metric, the data storage device 102 may favor uses of blocks having a lower PEC, thus promoting regular use of each of the blocks. The updated health threshold may utilize the previous health threshold as the block health meter, as well as erase counter (i.e., PEC), as well as the total cell block count of the memory region selected (i.e., see Shen paragraph [0040]).
Shen does not teach determine a gap threshold equal to at least one of the first and second health characteristic values; selectively perform a static wear leveling operation on a particular block of the block of memory cells, wherein the particular block has a highest health characteristic value of the block of memory cells.
However, Kim teaches selectively perform a static wear leveling operation on a particular block of the block of memory cells, wherein the particular block has a highest health characteristic value of the block of memory cells (Kim paragraph [0048], A background operation may be at least one of wear leveling, read reclaim and garbage collection. Wear leveling may refer to, for example, static wear leveling, dynamic wear leveling, or the like. Static wear leveling may refer to storing erase counts of memory blocks and moving cold data with which an erase operation or a write operation is seldom performed (e.g., less than a predetermined number of times) to a memory block with the highest erase count. A static wear leveling operation may be performed on a block having a highest erase count, which is interpreted as referring to a highest health characteristic value).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen with those of Kim. Kim teaches a static wear leveling operation which targets a block with a highest health characteristic, which optimizes garbage collection targeting to ensure the highest risk blocks are addressed first, resulting in improved reliability (i.e., see Kim paragraphs [0164-0165], In accordance with one embodiment, an apparatus includes a storage configured to store instructions and logic configured to execute the instructions to perform any of the embodiments described herein. For example, the logic may be configured to detect a defect occurring in at least one of a memory controller or a buffer memory, check whether or not the defect is reparable based on information in a defect information table, and perform a recovery operation based on a type of the defect when the defect is reparable. The logic may correspond, for example, to the memory controller as described herein. According to one or more of the aforementioned embodiments, a memory controller having improved reliability and a storage device including such a memory controller are provided).
Shen in view of Kim does not teach determining a gap threshold equal to at least one of the first and second health characteristic values.
However, Park teaches determining a gap threshold equal to at least one of the first and second health characteristic values (Park paragraph [0094], Also, in an embodiment, the wear level manager 212 may determine whether the wear levels of the plurality of cores 221, 222, 223, and 224 are equal to each other based on a result obtained by comparing, with a threshold difference value, the difference values of erase count values of the plurality of memory block groups respectively corresponding to the plurality of zones controlled by each of the plurality of cores 221, 222, 223, and 224. For example, when a difference value of a highest erase count value and a lowest erase count value from among the erase count values corresponding to the plurality of cores 221, 222, 223, and 224 exceeds the threshold difference value. The gap threshold may be equal to a highest or lowest erase count of the memory block, wherein the erase counts may correspond to health characteristic values).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen and Kim with those of Park. Park teaches determining a gap threshold value, which may be utilized to access health values for a given set of blocks and determine when a wear leveling operation is necessary (i.e., see Park paragraphs [0173-0174], Alternatively, when the difference value of the highest reset count sum value and the lowest reset count sum value is the threshold difference value or less, based on a determination result in the step S1305, in step S1309, the memory controller 200 may generate erase count values of a plurality of memory block groups respectively corresponding to the plurality of zones. In step S1311, the memory controller 200 may determine whether a difference value between a highest erase count value and a lowest erase count value from among the erase count values of the plurality of memory block groups exceeds a threshold difference value).
Regarding claim 11, Shen in view of Kim in further view of Park teaches The apparatus of claim 10, wherein the first health characteristic value corresponds to a lowest respective erase count (EC) of the blocks of non-volatile memory cells (Shen paragraph [0005], By evaluating the health status based on the particular life stage, the system may be able to account of changing conditions and changing priorities associated with the memory as the memory is used (e.g., as the memory stores and maintains data over time). For example, based on the particular life stage of the memory, the system may consider and/or emphasize factors (e.g., one or more metrics) that correspond to the particular life stage, such as emphasizing a lower program erase count during the first life stage to promote regular use of each block of the memory and emphasizing a failed bit count at the second life stage to push blocks to their operational limit. The lowest erase count may be utilized to determine a first health indicator value, also see Shen paragraph [0017], As another example, when the memory 104 is associated with the end-of-life stage, the controller may use a second health scheme (e.g., a second set of weight values) to determine a health indicator associated with the memory 104. The second health scheme may be configured to emphasize a failed bit count (e.g., a failed bit count associated with a storage element, a page, a wordline, a block, a die, a meta block, and/or an entirety of the memory 104) to determining the health status).
Regarding claim 13, Shen in view of Kim in further view of Park teaches The apparatus of claim 10, wherein the memory sub-system media management component is configured to determine an updated first health characteristic value by performance of a media management operation (Shen paragraph [0014], Referring to FIG. 1, a particular illustrative embodiment of a system is depicted and generally designated 100. The system 100 includes a data storage device 102 and a host device 150. The data storage device 102 includes a controller 120 and a memory 104, such as a non-volatile memory, that is coupled to the controller 120. The controller 120 may be configured to determine one or more health indicators (e.g., health statuses) associated with the memory 104. As used herein, “health” is used to indicate an amount and/or a type of use or wear of a system or a device, such as a memory and/or components thereof. The health of a system or a device may provide an indication and/or a prediction of an endurance of the system or the device and may be representative of an amount of wear or a decrease in (e.g., a degradation of) a storage capability of the system or the device. A health indicator may include or correspond to a value that is representative of a health of a region of the memory 104 (e.g., a health of a storage element, a page, a wordline, a block, a die, or a meta block) or a health of the memory 104 as a whole. For example, the value of the health indicator may be a numerical value (e.g., a scaled value or a relative value) or a descriptive value (e.g., very healthy, healthy, slightly unhealthy, unhealthy), as illustrative, non-limiting examples. To illustrate, a first region (e.g., a first block) of the memory 104 may correspond to a first health indicator (e.g., “healthy”) and a second region (e.g., a second block) of the memory may correspond to a second health indicator (e.g., “unhealthy”), where the first region may be determined to be healthier than the second region based on a comparison of the first health indicator to the second health indicator. The health characteristic value can be updated/tracked, which includes various events such as pseudo memory operations performed without specific values used, as seen in Shen paragraph [0015], The controller 120 may be configured to determine one or more health indicators associated with a memory system (e.g., a health indicator of a storage element of the memory 104, a health indicator of a page of the memory 104, a health indicator of a wordline of the memory 104, a health indicator of a block of the memory 104, a health indicator of a die of the memory 104, a health indicator of a meta block of the memory 104, or a health indicator of the memory 104 as a system) based on a “life” stage of the memory 104. As used herein, “life” of the memory 104 corresponds to a duration of use of the memory 104 from a first data storage operation until an end-of-life condition is met, such as when an amount of wear on the memory 104 causes the data storage device 102 to be unable to reliably store and retrieve data for the host device 150. For example, an endurance of the memory 104 (e.g., a life of the memory 104 in terms of a capability of the memory 104 to reliably store and maintain data) may be divided into multiple life stages, such as a beginning-of-life stage and an end-of-life stage, as illustrative, non-limiting examples. The controller 120 may be configured to determine which stage of the multiple life stages is associated with the memory 104 based on at least one metric, such as a program/erase count metric, a data received metric, a data written metric, or a combination thereof, as illustrative, non-limiting examples. Shen teaches memory management operations that can be performed without determining a specific value or minimum health threshold, but instead based on more generic considerations).
Regarding claim 14, Shen in view of Kim in further view of Park teaches The apparatus of claim 13, wherein the memory sub-system media management component is configured to perform the quantity of pseudo media management operations in the absence of performance of a wear-leveling operation (Shen paragraphs [0014-0015], Referring to FIG. 1, a particular illustrative embodiment of a system is depicted and generally designated 100. The system 100 includes a data storage device 102 and a host device 150. The data storage device 102 includes a controller 120 and a memory 104, such as a non-volatile memory, that is coupled to the controller 120. The controller 120 may be configured to determine one or more health indicators (e.g., health statuses) associated with the memory 104. As used herein, “health” is used to indicate an amount and/or a type of use or wear of a system or a device, such as a memory and/or components thereof. The health of a system or a device may provide an indication and/or a prediction of an endurance of the system or the device and may be representative of an amount of wear or a decrease in (e.g., a degradation of) a storage capability of the system or the device. A health indicator may include or correspond to a value that is representative of a health of a region of the memory 104 (e.g., a health of a storage element, a page, a wordline, a block, a die, or a meta block) or a health of the memory 104 as a whole. For example, the value of the health indicator may be a numerical value (e.g., a scaled value or a relative value) or a descriptive value (e.g., very healthy, healthy, slightly unhealthy, unhealthy), as illustrative, non-limiting examples. To illustrate, a first region (e.g., a first block) of the memory 104 may correspond to a first health indicator (e.g., “healthy”) and a second region (e.g., a second block) of the memory may correspond to a second health indicator (e.g., “unhealthy”), where the first region may be determined to be healthier than the second region based on a comparison of the first health indicator to the second health indicator. Various operations can be performed without specific health metrics when a general level of wear is attached to the memory blocks referenced).
Regarding claim 15, Shen in view of Kim in further view of Park teaches The apparatus of claim 10, wherein the quantity of pseudo media management operations is performed in an absence of occurrence of determination of an actual updated health characteristic value (Shen paragraphs [0014-0015], Referring to FIG. 1, a particular illustrative embodiment of a system is depicted and generally designated 100. The system 100 includes a data storage device 102 and a host device 150. The data storage device 102 includes a controller 120 and a memory 104, such as a non-volatile memory, that is coupled to the controller 120. The controller 120 may be configured to determine one or more health indicators (e.g., health statuses) associated with the memory 104. As used herein, “health” is used to indicate an amount and/or a type of use or wear of a system or a device, such as a memory and/or components thereof. The health of a system or a device may provide an indication and/or a prediction of an endurance of the system or the device and may be representative of an amount of wear or a decrease in (e.g., a degradation of) a storage capability of the system or the device. A health indicator may include or correspond to a value that is representative of a health of a region of the memory 104 (e.g., a health of a storage element, a page, a wordline, a block, a die, or a meta block) or a health of the memory 104 as a whole. For example, the value of the health indicator may be a numerical value (e.g., a scaled value or a relative value) or a descriptive value (e.g., very healthy, healthy, slightly unhealthy, unhealthy), as illustrative, non-limiting examples. To illustrate, a first region (e.g., a first block) of the memory 104 may correspond to a first health indicator (e.g., “healthy”) and a second region (e.g., a second block) of the memory may correspond to a second health indicator (e.g., “unhealthy”), where the first region may be determined to be healthier than the second region based on a comparison of the first health indicator to the second health indicator. Various operations can be performed without specific health metrics when a general level of wear is attached to the memory blocks referenced).
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shen in view of Kim in further view of Park as applied to claim 3 above, and further in view of Yang (US Publication No. 2022/0300184 -- "Yang").
Regarding claim 4, Shen in view of Kim in further view of Park in view of Yang teaches The method of claim 3, wherein performing the wear-leveling operation further comprises performing a static-wear-leveling operation on a block having a highest health characteristic value (Yang paragraph [0003], Typically, a conventional static wear-leveling operation is triggered as long as a difference between a highest erase count of spare blocks and a lowest erase count in the flash memory exceeds a threshold. At this time, blocks having low erase counts are selected as source blocks and data in these blocks is deemed as cold (i.e., infrequently accessed). On the other hand, spare blocks with high erase counts are selected as destination blocks and data in these blocks is deemed as hot (i.e., frequently accessed). Accordingly, the deemed “cold data” will be moved to destination blocks and the deemed “hot data” will then be programmed to the source blocks. It is expected that there will be relatively large increases in the erase counts of the source blocks (since they now contain hot data) and relatively small increases in the erase counts of the destination blocks (since they now contain cold data), thereby leveling erase count differences therebetween. However, such manner may lead to an unfavorable result. Yang teaches a static wear leveling operation).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen, Kim and Park with those of Yang. Yang teaches explicitly using a static wear leveling operation, which provides additional level of details regarding the wear leveling operation and when it is performed, making predictive data far more reliable (Yang paragraph [0003], Typically, a conventional static wear-leveling operation is triggered as long as a difference between a highest erase count of spare blocks and a lowest erase count in the flash memory exceeds a threshold. At this time, blocks having low erase counts are selected as source blocks and data in these blocks is deemed as cold (i.e., infrequently accessed). On the other hand, spare blocks with high erase counts are selected as destination blocks and data in these blocks is deemed as hot (i.e., frequently accessed). Accordingly, the deemed “cold data” will be moved to destination blocks and the deemed “hot data” will then be programmed to the source blocks. It is expected that there will be relatively large increases in the erase counts of the source blocks (since they now contain hot data) and relatively small increases in the erase counts of the destination blocks (since they now contain cold data), thereby leveling erase count differences therebetween. However, such manner may lead to an unfavorable result).
Claim(s) 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shen in view of Kim in further view of Park as applied to claim 1 above, and further in view of Navon et al. (US Publication No. 2021/0216412 – “Navon”).
Regarding claim 7, Shen in view of Kim in further view of Park in view of Navon teaches The method of claim 1, further comprising tracking a quantity of occurrences of the erase operation using the incremented erase counter (Navon paragraph [0010], The memory health data may include at least one memory health value selected from: a bit error rate value; a write/erase cycles value; a program loop counter value; an erase loop counter value. An erase counter value may be incremented for each erase operation on the physical memory).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen, Kim and Park with those of Navon. Navon teaches tracking erase counts for memory operations, as well as using that erase count to determine a corresponding health metric value for the memory, which can provide more accurate information regarding the reliability and health of the memory (i.e., see Navon paragraph [0108], At block 408, memory health data may be evaluated for a change in reliability condition. For example, the reliability manager may compare memory health data received at block 406 with one or more reliability thresholds to determine whether the memory health data has had a significant change representative of a material change in reliability of the remote storage device. If no, there is no significant change and method 400 may return to block 404 to store the next data unit using the first data recovery configuration. If yes, there is a significant change in reliability and method 400 may proceed to block 410).
Regarding claim 8, Shen in view of Kim in further view of Park in view of Navon teaches The method of claim 7, further comprising incrementing the second health characteristic value by a quantity that is equal to the quantity of occurrences of the erase operation (Navon paragraph [0029], Physical memory health parameters may include: [0030] BER (Bit Error Rate) values [0031] W/E (Write/Erase) cycle values [0032] PLC (Program Loop Counter) values [0033] ELC (Erase Loop Counter) values [0034] Leak detection measurement values [0035] EPD (Erratic Program Disturbance) error values [0036] Bad blocks statistics [0037] Voltage margin values. The health characteristic value of the memory may be incremented corresponding to various factors including an erase counter).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen, Kim and Park with those of Navon. Navon teaches tracking erase counts for memory operations, as well as using that erase count to determine a corresponding health metric value for the memory, which can provide more accurate information regarding the reliability and health of the memory (i.e., see Navon paragraph [0108], At block 408, memory health data may be evaluated for a change in reliability condition. For example, the reliability manager may compare memory health data received at block 406 with one or more reliability thresholds to determine whether the memory health data has had a significant change representative of a material change in reliability of the remote storage device. If no, there is no significant change and method 400 may return to block 404 to store the next data unit using the first data recovery configuration. If yes, there is a significant change in reliability and method 400 may proceed to block 410).
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shen in view of Kim in further view of Park as applied to claim 11 above, and further in view of Gao et al. (US Publication No. 2019/0205245 -- "Gao").
Regarding claim 12, Shen in view of Kim in further view of Park in view of Gao teaches The apparatus of claim 11, wherein the second health characteristic value corresponds to a highest respective EC of the blocks of non-volatile memory cells (Gao paragraph [0027], In other words, it is assumed that the maximum allowable erase count of the blocks in the flash memory array 110 is a predetermined value, which means that the data could not be written once the erase counts of the blocks in the flash memory array 110 have reached the predetermined value. Therefore, the number of scan operations mentioned above that the controller 120 executes to determine the minimum erase number EC_NUM is equal to the predetermined value. However, the predetermined value may be not high. For example, when the flash memory array 110 is adopted with the Trinary-level cell (TLC) technology which has less life time, the maximum allowable erase count of the blocks is, for example, 300. In the life time of the flash memory array 110, the scan operation should be executed 300 times. The highest erase count of a particular memory block may be used to indicate various health/wear factors).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen, Kim and Park with those of Gao. Gao teaches using a minimum and maximum erase count value to as a means to provide additional data to the memory system for determining health thresholds and performing various operations. These values allow the memory system to set borders and boundaries regarding the expected value and reach an optimal value for triggering certain operations such as wear-leveling procedures (Gao paragraph [0025], According to an embodiment of the invention, when the storage device 100 is manufactured, the minimum erase count ECmin is set to 0 and the initial value of the minimum erase number EC_NUM is set to the total number of blocks in the flash memory array 110. Once there is any one of the blocks is erased, the controller 120 subtracts 1 from the minimum erase number EC_NUM. When all blocks have been erased at least once, the minimum erase number EC_NUM is equal to 0. At the meanwhile, the minimum erase count ECmin is increased by 1 (to be 1). The erase counts of all blocks in the flash memory array 110 are then scanned once again to select the number of blocks having erase counts equal to the minimum erase count ECmin, which is equal to 1 now, to be the minimum erase number EC_NUM. When a block having the minimum erase count ECmin, which is equal to 1 now, is erased once again, the controller 120 subtracts 1 from the minimum erase number EC_NUM. When the minimum erase number EC_NUM obtained by a previous scan is decreased to 0, the controller 120 increases the minimum erase count ECmin by 1 (to be 2), re-scans the erase counts of all blocks in the flash memory array 110, and selects the number of blocks having an erase count equal to the new minimum erase count ECmin, which is equal to 2, to be the minimum erase number EC_NUM. The following process is repeated as stated above until the minimum erase count ECmin reaches the maximum allowable erase count of the blocks in the flash memory array 110).
Claim(s) 16-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shen (US Publication No. 2016/0103630 -- "Shen") in view of Gao et al. (US Publication No. 2019/0205245 -- "Gao") in further view of Kim et al. (US Publication No. 2022/0187996 – “Kim”) and further in view of Park et al. (US Publication No. 2022/0057938 – “Park”).
Regarding claim 16, Shen teaches A system comprising: a memory sub-system comprising a plurality of memory components arranged to form a stackable cross-gridded array of blocks of non-volatile memory cells; and a processing device coupled to the plurality of memory components, the processing device to perform operations comprising: (Shen paragraphs [0121-0122], By way of a non-limiting example, in a three dimensional NAND memory array, the memory elements may be coupled together to form a NAND string within a single horizontal (e.g., x-z) memory device levels. Alternatively, the memory elements may be coupled together to form a vertical NAND string that traverses across multiple horizontal memory device levels. Other three dimensional configurations can be envisioned wherein some NAND strings contain memory elements in a single memory level while other strings contain memory elements which span through multiple memory levels. Three dimensional memory arrays may also be designed in a NOR configuration and in a ReRAM configuration. Typically, in a monolithic three dimensional memory array, one or more memory device levels are formed above a single substrate. Optionally, the monolithic three dimensional memory array may also have one or more memory layers at least partially within the single substrate. As a non-limiting example, the substrate may include a semiconductor material such as silicon. In a monolithic three dimensional array, the layers constituting each memory device level of the array are typically formed on the layers of the underlying memory device levels of the array. However, layers of adjacent memory device levels of a monolithic three dimensional memory array may be shared or have intervening layers between memory device levels) and determining an updated health threshold based on the health threshold, a value of an incremented erase counter, and a total count of the memory cell blocks (Shen paragraph [0033], As an illustrative example, the health meter 184 may determine that the memory 104 is associated with a first life stage of the multiple life stages. For example, the health meter 184 may compare the P/E count 172 of the memory 104 to a threshold value (e.g., a threshold number of P/E cycles) and, based on the P/E count 172 being less than the threshold value, the health meter 184 may determine that the memory 104 is in the first life stage. Based on the memory 104 being in the first life stage, the health meter 184 may select the first health scheme 180 to be used as the health scheme 185. The health meter 184 may apply the health scheme 185 (e.g., the first health scheme 180) using a first set of one or metrics (maintained by the metric tracker 170) to generate health indicators for each of the blocks 142-146. The one or more metrics applied for a particular block may correspond to the particular block (e.g., a P/E count of the block 142 may be used to determine a health indictor of the block 142 and a P/E count of the block 144 may be used to determine a health indicator of the block 144). Also see Shen paragraph (Shen paragraph [0042], Based on a determination by the health meter 184 that the memory 104 is associated with the first life stage, the health meter 184 may use a first set of weight values that includes weight values (a, b)=(0.2, 0.8). Accordingly, the BHM for the first life stage is BHM.sub.First.sub._.sub.Stage=0.2*FBC+0.8*PEC. The BHM for the first life stage may include or correspond to the health scheme 185 applied during the first life stage of the memory 104, such as the first health scheme 180. Since the program/erase count metric has more weight than the FBC metric, the data storage device 102 may favor uses of blocks having a lower PEC, thus promoting regular use of each of the blocks. The updated health threshold may utilize the previous health threshold as the block health meter, as well as erase counter (i.e., PEC), as well as the total cell block count of the memory region selected (i.e., see Shen paragraph [0040]).
Shen does not teach responsive to an occurrence of an erase operation, determining a value of a difference between a minimum erase count (EC) and a maximum EC of the blocks of memory cells; determining a gap threshold equal to at least one of the minimum EC and the maximum EC; determining a gap between the difference and a health threshold is greater than a gap threshold from the health threshold; performing a quantity of pseudo media management operations: subsequent to performing the quantity of pseudo media operations: selectively performing a static wear leveling operation on a particular block of the blocks of non-volatile memory cells, wherein the particular block has a highest maximum EC or minimum EC value of the block of non-volatile memory cells; determining an updated difference between an updated minimum EC and an updated maximum EC.
However, Gao teaches responsive to an occurrence of an erase operation, determining a value of a difference between a minimum erase count (EC) and a maximum EC of the blocks of memory cells; (Gao paragraph [0025], According to an embodiment of the invention, when the storage device 100 is manufactured, the minimum erase count ECmin is set to 0 and the initial value of the minimum erase number EC_NUM is set to the total number of blocks in the flash memory array 110. Once there is any one of the blocks is erased, the controller 120 subtracts 1 from the minimum erase number EC_NUM. When all blocks have been erased at least once, the minimum erase number EC_NUM is equal to 0. At the meanwhile, the minimum erase count ECmin is increased by 1 (to be 1). The erase counts of all blocks in the flash memory array 110 are then scanned once again to select the number of blocks having erase counts equal to the minimum erase count ECmin, which is equal to 1 now, to be the minimum erase number EC_NUM. When a block having the minimum erase count ECmin, which is equal to 1 now, is erased once again, the controller 120 subtracts 1 from the minimum erase number EC_NUM. When the minimum erase number EC_NUM obtained by a previous scan is decreased to 0, the controller 120 increases the minimum erase count ECmin by 1 (to be 2), re-scans the erase counts of all blocks in the flash memory array 110, and selects the number of blocks having an erase count equal to the new minimum erase count ECmin, which is equal to 2, to be the minimum erase number EC_NUM. The following process is repeated as stated above until the minimum erase count ECmin reaches the maximum allowable erase count of the blocks in the flash memory array 110. The minimum and maximum erase counts are calculated for the memory blocks, also see Gao paragraph [0027], In other words, it is assumed that the maximum allowable erase count of the blocks in the flash memory array 110 is a predetermined value, which means that the data could not be written once the erase counts of the blocks in the flash memory array 110 have reached the predetermined value. Therefore, the number of scan operations mentioned above that the controller 120 executes to determine the minimum erase number EC_NUM is equal to the predetermined value) determining a gap between the difference and a health threshold is greater than a gap threshold from the health threshold; performing a quantity of pseudo media management operations: subsequent to performing the quantity of pseudo media operations, (Gao paragraph [0028], Then, the controller 120 determines whether the difference between the erase count of the erased block and the minimum erase count ECmin exceeds a target threshold TH (Step S230). When the difference between the erase count of the erased block and the minimum erase count ECmin exceeds the target threshold TH, the erased block is selected to be target block for data migration of a wear-leveling process (Step S240). Otherwise, when the controller 120 determines in Step S230 that the difference between the erase count of the erased block and the minimum erase count ECmin does not exceed the target threshold TH, the controller 120 terminates the data retention method 200. Namely, the wear-leveling process is not executed on the erased block for data migration. If the gap is determined to exceed a predetermined threshold value, various operations may be determined to be performed) determining an updated difference between an updated minimum EC and an updated maximum EC; (Gao paragraph [0027], In other words, it is assumed that the maximum allowable erase count of the blocks in the flash memory array 110 is a predetermined value, which means that the data could not be written once the erase counts of the blocks in the flash memory array 110 have reached the predetermined value. Therefore, the number of scan operations mentioned above that the controller 120 executes to determine the minimum erase number EC_NUM is equal to the predetermined value. However, the predetermined value may be not high. For example, when the flash memory array 110 is adopted with the Trinary-level cell (TLC) technology which has less life time, the maximum allowable erase count of the blocks is, for example, 300. In the life time of the flash memory array 110, the scan operation should be executed 300 times. Comparing with the technical solution that all blocks should be thoroughly scanned, and all the erase counts should be compared with one another for obtaining the minimum erase count ECmin when the minimum erase count ECmin is required, the data retention method provided herein would prevent the controller 120 from frequently scanning the flash memory array 110 such that the host spends less hardware resources to scan the flash memory array 110. In addition, since the minimum erase count ECmin and the minimum erase number EC_NUM are stored in the flash memory array 110, the minimum erase count ECmin and the minimum erase number EC_NUM could be preserved when the power is suddenly lost. The count values for the max and min erase counts can be updated based on performed operations).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen with those of Gao. Gao teaches using a minimum and maximum erase count value to as a means to provide additional data to the memory system for determining health thresholds and performing various operations. These values allow the memory system to set borders and boundaries regarding the expected value and reach an optimal value for triggering certain operations such as wear-leveling procedures (Gao paragraph [0025], According to an embodiment of the invention, when the storage device 100 is manufactured, the minimum erase count ECmin is set to 0 and the initial value of the minimum erase number EC_NUM is set to the total number of blocks in the flash memory array 110. Once there is any one of the blocks is erased, the controller 120 subtracts 1 from the minimum erase number EC_NUM. When all blocks have been erased at least once, the minimum erase number EC_NUM is equal to 0. At the meanwhile, the minimum erase count ECmin is increased by 1 (to be 1). The erase counts of all blocks in the flash memory array 110 are then scanned once again to select the number of blocks having erase counts equal to the minimum erase count ECmin, which is equal to 1 now, to be the minimum erase number EC_NUM. When a block having the minimum erase count ECmin, which is equal to 1 now, is erased once again, the controller 120 subtracts 1 from the minimum erase number EC_NUM. When the minimum erase number EC_NUM obtained by a previous scan is decreased to 0, the controller 120 increases the minimum erase count ECmin by 1 (to be 2), re-scans the erase counts of all blocks in the flash memory array 110, and selects the number of blocks having an erase count equal to the new minimum erase count ECmin, which is equal to 2, to be the minimum erase number EC_NUM. The following process is repeated as stated above until the minimum erase count ECmin reaches the maximum allowable erase count of the blocks in the flash memory array 110).
Shen in view of Gao does not teach determining a gap threshold equal to at least one of the minimum EC and the maximum EC; selectively performing a static wear leveling operation on a particular block of the blocks of non-volatile memory cells, wherein the particular block has a highest maximum EC or minimum EC value of the block of non-volatile memory cells.
However, Kim teaches selectively performing a static wear leveling operation on a particular block of the blocks of non-volatile memory cells, wherein the particular block has a highest maximum EC or minimum EC value of the block of non-volatile memory cells (Kim paragraph [0048], A background operation may be at least one of wear leveling, read reclaim and garbage collection. Wear leveling may refer to, for example, static wear leveling, dynamic wear leveling, or the like. Static wear leveling may refer to storing erase counts of memory blocks and moving cold data with which an erase operation or a write operation is seldom performed (e.g., less than a predetermined number of times) to a memory block with the highest erase count. A static wear leveling operation may be performed on a block having a highest erase count, which is interpreted as referring to a highest health characteristic value).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen and Gao with those of Kim. Kim teaches a static wear leveling operation which targets a block with a highest health characteristic, which optimizes garbage collection targeting to ensure the highest risk blocks are addressed first, resulting in improved reliability (i.e., see Kim paragraphs [0164-0165], In accordance with one embodiment, an apparatus includes a storage configured to store instructions and logic configured to execute the instructions to perform any of the embodiments described herein. For example, the logic may be configured to detect a defect occurring in at least one of a memory controller or a buffer memory, check whether or not the defect is reparable based on information in a defect information table, and perform a recovery operation based on a type of the defect when the defect is reparable. The logic may correspond, for example, to the memory controller as described herein. According to one or more of the aforementioned embodiments, a memory controller having improved reliability and a storage device including such a memory controller are provided).
Shen in view of Gao in further view of Kim does not teach determining a gap threshold equal to at least one of the minimum EC and the maximum EC.
However, Park teaches determining a gap threshold equal to at least one of the minimum EC and the maximum EC (Park paragraph [0094], Also, in an embodiment, the wear level manager 212 may determine whether the wear levels of the plurality of cores 221, 222, 223, and 224 are equal to each other based on a result obtained by comparing, with a threshold difference value, the difference values of erase count values of the plurality of memory block groups respectively corresponding to the plurality of zones controlled by each of the plurality of cores 221, 222, 223, and 224. For example, when a difference value of a highest erase count value and a lowest erase count value from among the erase count values corresponding to the plurality of cores 221, 222, 223, and 224 exceeds the threshold difference value. The gap threshold may be equal to a highest or lowest erase count of the memory block, wherein the erase counts may correspond to health characteristic values).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen, Gao and Kim with those of Park. Park teaches determining a gap threshold value, which may be utilized to access health values for a given set of blocks and determine when a wear leveling operation is necessary (i.e., see Park paragraphs [0173-0174], Alternatively, when the difference value of the highest reset count sum value and the lowest reset count sum value is the threshold difference value or less, based on a determination result in the step S1305, in step S1309, the memory controller 200 may generate erase count values of a plurality of memory block groups respectively corresponding to the plurality of zones. In step S1311, the memory controller 200 may determine whether a difference value between a highest erase count value and a lowest erase count value from among the erase count values of the plurality of memory block groups exceeds a threshold difference value).
Regarding claim 17, Shen in view of Gao in further view of Kim and further in view of Park teaches The system of claim 16, further comprising: determining the difference between the minimum EC and the maximum EC at a first time; and determining the updated difference at a second time that is subsequent to the first time (Gao paragraph [0027], In other words, it is assumed that the maximum allowable erase count of the blocks in the flash memory array 110 is a predetermined value, which means that the data could not be written once the erase counts of the blocks in the flash memory array 110 have reached the predetermined value. Therefore, the number of scan operations mentioned above that the controller 120 executes to determine the minimum erase number EC_NUM is equal to the predetermined value. However, the predetermined value may be not high. For example, when the flash memory array 110 is adopted with the Trinary-level cell (TLC) technology which has less life time, the maximum allowable erase count of the blocks is, for example, 300. In the life time of the flash memory array 110, the scan operation should be executed 300 times. Comparing with the technical solution that all blocks should be thoroughly scanned, and all the erase counts should be compared with one another for obtaining the minimum erase count ECmin when the minimum erase count ECmin is required, the data retention method provided herein would prevent the controller 120 from frequently scanning the flash memory array 110 such that the host spends less hardware resources to scan the flash memory array 110. In addition, since the minimum erase count ECmin and the minimum erase number EC_NUM are stored in the flash memory array 110, the minimum erase count ECmin and the minimum erase number EC_NUM could be preserved when the power is suddenly lost. The count values for the max and min erase counts can be calculated and then in the future updated based on performed operations).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Shen with those of Gao, Kim and Park. Gao teaches using a minimum and maximum erase count value to as a means to provide additional data to the memory system for determining health thresholds and performing various operations. These values allow the memory system to set borders and boundaries regarding the expected value and reach an optimal value for triggering certain operations such as wear-leveling procedures (Gao paragraph [0025], According to an embodiment of the invention, when the storage device 100 is manufactured, the minimum erase count ECmin is set to 0 and the initial value of the minimum erase number EC_NUM is set to the total number of blocks in the flash memory array 110. Once there is any one of the blocks is erased, the controller 120 subtracts 1 from the minimum erase number EC_NUM. When all blocks have been erased at least once, the minimum erase number EC_NUM is equal to 0. At the meanwhile, the minimum erase count ECmin is increased by 1 (to be 1). The erase counts of all blocks in the flash memory array 110 are then scanned once again to select the number of blocks having erase counts equal to the minimum erase count ECmin, which is equal to 1 now, to be the minimum erase number EC_NUM. When a block having the minimum erase count ECmin, which is equal to 1 now, is erased once again, the controller 120 subtracts 1 from the minimum erase number EC_NUM. When the minimum erase number EC_NUM obtained by a previous scan is decreased to 0, the controller 120 increases the minimum erase count ECmin by 1 (to be 2), re-scans the erase counts of all blocks in the flash memory array 110, and selects the number of blocks having an erase count equal to the new minimum erase count ECmin, which is equal to 2, to be the minimum erase number EC_NUM. The following process is repeated as stated above until the minimum erase count ECmin reaches the maximum allowable erase count of the blocks in the flash memory array 110).
Regarding claim 18, Shen in view of Gao in further view of Kim and further in view of Park teaches The system of claim 16, further comprising performing the quantity of pseudo media management operations until it is determined that the updated difference is less than the gap threshold from the health threshold (Shen paragraph [0040], As an illustrative example, the controller 120 may be configured to track one or more metrics associated with the memory 104. For example, the metric tracker 170 may track the one or more metrics. The controller 120 may further be configured to determine, based on the one or more metrics, a transition from a first life stage of the memory 104 to a second life stage of the memory 104. Based on the transition to the second life stage, the controller 120 may modify weight values associated with the health scheme 185. The controller 120 (e.g., the health meter 184) may use the modified weight values to determine a health indicator of multiple regions (e.g., multiple blocks 142-146) included in the memory 104. The controller 120 may be configured to select one or more regions (e.g., one or more blocks of the multiple blocks 142-146) during the second life stage based on the health indicators. The health characteristic values may be tracked and constantly updated based on events such as memory operations being performed, also see Shen paragraph [0087], In some implementations, after the first health indicator is generated, the first health indicator may be stored at a table. The table may be configured to track a corresponding health indicator for each region of a plurality of regions of the memory. The plurality of regions of the memory may include or correspond to multiple storage elements, multiple pages, multiple wordlines, multiple blocks, multiple dies, multiple meta blocks, or a combination thereof, of the memory. Additionally, before or after storing the first health indicator at the table, the first health indicator may be sent to a host device, such as the host device 150 of FIG. 1, that is communicatively coupled to the data storage device and Shen paragraph [0004], A system is configured to use a dynamic health assessment method to evaluate a health status (e.g., generate a health indicator) associated with a memory of a data storage device. An endurance (e.g., a data storage life) of the memory, such as an endurance of a block and/or a die of the memory, may be divided into multiple “life” stages. Each life stage may be associated with different priorities related to use of the memory during the life stage. The system may identify a particular life stage associated with the memory and may evaluate a health status of the memory based on the particular life stage. For example, based on the memory being in a first life stage associated with a beginning-of-life condition of the memory, a first health scheme may be applied that emphasizes a program/erase count to determine a health status associated with the memory. As another example, based on the memory being in a second life stage associated with an end-of-life condition of the memory, a second health scheme may be applied that emphasizes a failed bit count to determine the health status associated with the memory).
Regarding claim 19, Shen in view of Gao in further view of Kim and further in view of Park teaches The system of claim 16, wherein the gap threshold is at least one health characteristic value less than the health threshold (Shen paragraph [0028], The controller 120 may include a metric tracker 170, health schemes 178, a health meter 184, and a selector 188. The metric tracker 170 may be configured to track one or more metrics associated with the memory 104. The metric tracker 170 may be configured to track the one or more metrics for the memory 104 as a whole and/or on a storage element-by-storage element basis, on a page-by-page basis, on a wordline-by-wordline basis, on a block-by-block basis, on a die-by-die basis, and/or on a meta block-by-meta block basis. The one or more metrics tracked by the metric tracker 170 may include a program/erase (P/E) count (PEC) 172, a failed bit count (FBC) 174, and a trim value 176 (e.g., a trim index value), as illustrative, non-limiting examples. Alternatively, or in addition, the one or more metrics tracked by metric tracker 170 include a bit error rate (BER), a programming time, an erase time, a number of voltage pulses to program a storage element, a number of voltage pulses to erase a storage element, one or more other metrics corresponding to the memory 104, or a combination thereof, as illustrative, non-limiting examples. As previously mentioned, the health characteristic values are updated and tracked through various periods of time).
Regarding claim 20, Shen in view of Gao in further view of Kim and further in view of Park teaches The system of claim 16, wherein the health threshold is equal to a quantity of EC, and wherein the gap threshold is at least one EC less than the quantity of EC (Shen paragraph [0033], As an illustrative example, the health meter 184 may determine that the memory 104 is associated with a first life stage of the multiple life stages. For example, the health meter 184 may compare the P/E count 172 of the memory 104 to a threshold value (e.g., a threshold number of P/E cycles) and, based on the P/E count 172 being less than the threshold value, the health meter 184 may determine that the memory 104 is in the first life stage. Based on the memory 104 being in the first life stage, the health meter 184 may select the first health scheme 180 to be used as the health scheme 185. The health meter 184 may apply the health scheme 185 (e.g., the first health scheme 180) using a first set of one or metrics (maintained by the metric tracker 170) to generate health indicators for each of the blocks 142-146. The one or more metrics applied for a particular block may correspond to the particular block (e.g., a P/E count of the block 142 may be used to determine a health indictor of the block 142 and a P/E count of the block 144 may be used to determine a health indicator of the block 144). As another example, based on the P/E count 172 being greater than or equal to the threshold value, the health meter 184 may determine that the memory 104 is in the second life stage of the multiple life stages. Based on the memory 104 being in the second life stage, the health meter 184 may select the second health scheme 182 to be used as the health scheme 185. The health meter 184 may apply the health scheme 185 (e.g., the second health scheme 182) to a second set of one or metrics to generate health indicators of each of the blocks 142-146. The first set of one or more metrics may be the same as or different than the second set of one or more metrics. When the first set of one or more metrics is the same as the second set of one or more metrics, different weight value may be applied to the first set of one or more metrics and to the second set of one or more metrics. The health meter 184 may provide an output 186 that includes the health indicators (e.g., health status information) associated with the memory 104, such as the health indicators of one or more storage elements, one or more pages, one or more wordlines, one or more blocks, one or more dies, one or more meta blocks, or an entirety of the memory 104. The erase count may be utilized as a health threshold indicator, wherein the threshold is exceeded by the memory blocks references in Shen).
Response to Arguments
Applicant’s arguments, see pages 8-13 (numbered pages 8-13), filed April 1st, 2026, with respect to the rejection(s) of claim(s) 1, 10 and 16 under 35 U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Shen (US Publication No. 2016/0103630 -- "Shen") in view of Kim et al. (US Publication No. 2022/0187996 – “Kim”) in further view of Park et al. (US publication No. 2022/0057938 – “Park”). Independent claim 16 similarly has had the Kim and Park references added to the teachings of Shen and Gao. In response to the applicant’s newly added claim limitations, the Kim and Park references have been added, in order to disclose the concept of performing a static wear leveling on a block with a highest erase count, as well as the concept of determining a gap threshold for health evaluation, respectively. Further details regarding the newly added references is described in the 35 USC 103 Rejection above. In light of the newly cited references, the 35 USC 103 Rejection is maintained.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Tsou et al. (US Publication No. 2018/0260137 – “Tsou”) teaches using minimum and maximum erase counts as well as a threshold difference between the two to determine various memory management operations such as wear leveling (i.e., see Tsou paragraph [0009], In addition, the controller further determines a plurality of maintenance processes after transmitting the read part to the host, wherein the maintenance processes are arranged to maintain data in the flash memory. In an embodiment, the maintenance processes comprise a wear-leveling process, a read reclaim process, a read refresh process, and a data collection process. When a difference between the minimum one of the erase counts and the maximum one of the erase counts among the blocks is greater than a predetermined difference value, the controller determines that the maintenance processes include a wear-leveling process. When the number of error bits for the data in the flash memory is greater than a predetermined number of error bits, the controller determines that the maintenance processes include a read reclaim process).
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/J.C.K./ Examiner, Art Unit 2133
/ROCIO DEL MAR PEREZ-VELEZ/Supervisory Patent Examiner, Art Unit 2133
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