Prosecution Insights
Last updated: August 17, 2026
Application No. 18/989,356

CONTROL CIRCUIT FOR CONTROLLING A SWITCHING STAGE OF AN ELECTRONIC CONVERTER, CORRESPONDING ELECTRONIC CONVERTER DEVICE AND METHOD

Non-Final OA §102§103
Filed
Dec 20, 2024
Priority
Feb 15, 2021 — IT 102021000003368 +1 more
Examiner
RIVERA-PEREZ, CARLOS O
Art Unit
Tech Center
Assignee
STMicroelectronics N.V.
OA Round
1 (Non-Final)
72%
Grant Probability
Favorable
1-2
OA Rounds
1y 0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
372 granted / 516 resolved
+12.1% vs TC avg
Strong +20% interview lift
Without
With
+20.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
24 currently pending
Career history
548
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
64.4%
+24.4% vs TC avg
§102
21.3%
-18.7% vs TC avg
§112
7.7%
-32.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 516 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, “the plurality of feed-forward compensations simultaneously” (see claims 2 and 13) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 4, 9, 10, 12 and 15 is rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Chen (US 2017/0012526). Regarding claim 1, Chen discloses (see figures 1-9) a DC-DC converter circuit (figure 1, part 100) (paragraph [0048]; The boost regulator 100), comprising: a switching stage (figure 1, part 108/110) including first (figure 1, part 108) and second switches (figure 1, part 110); and a control circuit (figure 1, part 112) coupled to the switching stage (figure 1, part 108/110) and configured to: detect (figures 1 and 9, part 902) a threshold (figures 1 and 9, part T1/T2) for changing between a synchronous operation mode (figures 1 and 9, part 906 [synchronous mode]) and an asynchronous operation mode (figures 1 and 9, part 904 [asynchronous mode]) (paragraphs [0054]-[0065] and [0093]-[0099]; At 902, a voltage difference is detected between an input voltage and an output voltage of the boost regulator… At 904, when the voltage difference is below a first threshold, the boost regulator is operated in an asynchronous mode… At 906, when the voltage difference is above a second threshold, the boost regulator is operated in a synchronous mode); synchronize the detected threshold (figures 1 and 9, part 902-908 [T1/T2]) with a beginning of a new switching cycle (figures 4A/4B, part beginning of a new switching cycle Ts); apply feed-forward compensation (figures 3 and 4A/4B, part feed-forward compensation generated by Tdead; at adaptive mode) at the beginning of an ON time period to vary a duty cycle (figures 4A/4B, part feed-forward compensation Tdead apply at the beginning of ON time period to vary the duty cycle of 404/454; at adaptive mode) (paragraphs [0064]-[0068]; Adaptive mode is used when less boost is needed than in synchronous mode, but more boost is needed than in asynchronous mode. That is, adaptive mode is between synchronous mode and asynchronous mode. In the adaptive mode, the boost mode regulator 112 controls the high side switch 110 according to an adaptive dead time. The adaptive dead time changes (adapts, adjusts, responds, is dynamic, etc.) as the voltage difference between the input voltage and the output voltage changes); and generate drive signals (figure 1, part drive signals from 112 to 108/110) to control the switching stage (figure 1, part 108/110) (paragraphs [0048]-[0053]). Regarding claim 4, Chen discloses everything claimed as applied above (see claim 1). Further, Chen discloses (see figures 1-9) the control circuit (figure 1, part 112) comprises a comparator circuit (figures 1 and 6, part 604) configured to implement hysteresis (figures 1 and 6, part 604; hysteresis generated by thresholds T1/T2) in the threshold detection to increase operating margins (figures 1 and 9, parts 902-908; T1/T2) (paragraphs [0093]-[0099]). Regarding claim 9, Chen discloses everything claimed as applied above (see claim 1). Further, Chen discloses (see figures 1-9) the first switch (figure 1, part 108) is a low-side switch (figure 1, part 108) connected between a switching node (figure 1, part 122) and ground (figure 1, part ground), the second switch (figure 1, part 110) is a high-side switch (figure 1, part 110) connected between an output terminal (figure 1, part 124) and the switching node (figure 1, part 122), and an inductance (figure 1, part 106) is connected between an input terminal (figure 1, part 120) and the switching node (figure 1, part 122). Regarding claim 10, Chen discloses (see figures 1-9) a method of operating a DC-DC converter (figure 1, part 100) (paragraph [0048]; The boost regulator 100), comprising: comparing (figure 1, part 112), via a comparator circuit (figures 1 and 6, part 604), an input voltage level (figures 1 and 6, part Vin) and an output voltage level of the DC-DC converter (figures 1 and 6, part Vout) (paragraph [0094]; At 902, a voltage difference is detected between an input voltage and an output voltage of the boost regulator); selecting between a synchronous mode (figures 1 and 9, part 906 [synchronous mode]) and an asynchronous mode (figures 1 and 9, part 904 [asynchronous mode]) based on the comparison (figures 1 and 9, part 902) (paragraphs [0054]-[0065] and [0093]-[0099]; At 902, a voltage difference is detected between an input voltage and an output voltage of the boost regulator… At 904, when the voltage difference is below a first threshold, the boost regulator is operated in an asynchronous mode… At 906, when the voltage difference is above a second threshold, the boost regulator is operated in a synchronous mode); applying feed-forward compensation (figures 3 and 4A/4B, part feed-forward compensation generated by Tdead; at adaptive mode) by varying a duty cycle (figures 4A/4B, part duty cycle of 404/454; at adaptive mode) of the DC-DC converter (figure 1, part 100) when transitioning between modes (figures 1 and 9, part transitioning at adaptive mode 908 between synchronous mode and asynchronous mode) (paragraphs [0064]-[0068]; Adaptive mode is used when less boost is needed than in synchronous mode, but more boost is needed than in asynchronous mode. That is, adaptive mode is between synchronous mode and asynchronous mode. In the adaptive mode, the boost mode regulator 112 controls the high side switch 110 according to an adaptive dead time. The adaptive dead time changes (adapts, adjusts, responds, is dynamic, etc.) as the voltage difference between the input voltage and the output voltage changes); and generating drive signals (figure 1, part drive signals from 112 to 108/110) to control switches (figure 1, part 108/110) of the DC-DC converter (figure 1, part 100) based on the varied duty cycle (figures 1 and 4A/4B, part duty cycle of 404/454; at adaptive mode) (paragraphs [0048]-[0053]). Regarding claim 12, Chen discloses everything claimed as applied above (see claim 10). Further, Chen discloses (see figures 1-9) the comparator circuit (figures 1 and 6, part 604) implements hysteresis (figures 1 and 6, part 604; hysteresis generated by thresholds T1/T2) to increase operating margins for mode detection (figures 1 and 9, parts 902-908; T1/T2) (paragraphs [0093]-[0099]). Regarding claim 15, Chen discloses everything claimed as applied above (see claim 10). Further, Chen discloses (see figures 1-9) applying the feed-forward compensation (figures 3 and 4A/4B, part feed-forward compensation generated by Tdead; at adaptive mode) comprises: synchronizing the feed-forward compensation (figures 3 and 4A/4B, part feed-forward compensation generated by Tdead; at adaptive mode) with a beginning of a new switching cycle (figures 4A/4B, part beginning of a new switching cycle Ts); and applying the feed-forward compensation (figures 3 and 4A/4B, part feed-forward compensation generated by Tdead; at adaptive mode) at the beginning of an ON time period (figures 4A/4B, part feed-forward compensation Tdead apply at the beginning of ON time period to vary the duty cycle of 404/454; at adaptive mode) (paragraphs [0064]-[0068]; Adaptive mode is used when less boost is needed than in synchronous mode, but more boost is needed than in asynchronous mode. That is, adaptive mode is between synchronous mode and asynchronous mode. In the adaptive mode, the boost mode regulator 112 controls the high side switch 110 according to an adaptive dead time. The adaptive dead time changes (adapts, adjusts, responds, is dynamic, etc.) as the voltage difference between the input voltage and the output voltage changes). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2017/0012526), in view of Donaldson et al. (US 7,957,847), hereinafter Donaldson. Regarding claim 2, Chen discloses everything claimed as applied above (see claim 1). Further, Chen discloses (see figures 1-9) the control circuit (figure 1, part 112) is further configured to implement a feed-forward compensation (figures 3 and 4A/4B, part feed-forward compensation generated by Tdead; at adaptive mode). However, Chen does not expressly disclose a plurality of feed-forward compensations simultaneously, wherein the feed-forward compensations operate independently of each other through addition of respective feed-forward currents. Donaldson teaches (see figures 1-6) the control circuit (figure 5, part control circuit) is further configured to implement a plurality of feed-forward compensations simultaneously (figure 5, parts 503 and 504), wherein the feed-forward compensations operate independently of each other (figure 5, parts 503 and 504) through addition of respective feed-forward currents (figure 5, parts 503 and 504) (column 9; lines 31-52; Feed-forward circuit 503 generates one or more feed-forward signals from a node that is internal to the regulator. Feed-forward circuit 504 generates any number of feed-forward signals responsive to external feed-forward information that indicates deterministic changes in the load current). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the control circuit of Chen with the plurality of feed-forward compensations as taught by Donaldson, because it provides more robust and reliable system in order to obtain more efficient control compensation that maintain the regulated output within a tight tolerance range (column 2; lines 1-4). Regarding claim 13, claim 2 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons. Claims 3 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2017/0012526), in view of Chen et al. (US 2012/0146602), hereinafter Chen2. Regarding claim 3, Chen discloses everything claimed as applied above (see claim 1). Further, Chen discloses (see figures 1-9) the control circuit (figure 1, part 112). However, Chen does not expressly disclose an adding resistance formed as different series-connected electric components; wherein the control circuit is configured to vary a slope of a sawtooth signal by selectively shorting at least one of the series-connected electric components. Chen2 teaches (see figures 1-18) an adding resistance (figure 8, part 731) formed as different series-connected electric components (figure 8, part 731); wherein the control circuit (figure 8, part control circuit of 70) is configured to vary a slope of a sawtooth signal (figure 8, part sawtooth signal from 241) by selectively shorting (figure 8, part through 733) at least one of the series-connected electric components (figure 8, part 731). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the control circuit of Chen with the control circuit features as taught by Chen2 and obtain an adding resistance formed as different series-connected electric components; wherein the control circuit is configured to vary a slope of a sawtooth signal by selectively shorting at least one of the series-connected electric components, because it provides high efficiency operation based on the operational modes (paragraph [0006]). Regarding claim 14, claim 3 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons. Claims 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2017/0012526), in view of Chen et al. (US 2012/0146602), hereinafter Chen2, and further in view of Wilcox et al. (US 5,481,178), hereinafter Wilcox. Regarding claim 5, Chen discloses everything claimed as applied above (see claim 1). Further, Chen discloses (see figures 1-9) the feed-forward compensation (figures 3 and 4A/4B, part feed-forward compensation generated by Tdead; at adaptive mode). However, Chen does not expressly disclose a current generator configured to provide the feed-forward compensation, and an adding resistance; wherein the current generator and the adding resistance are configured to be tuned via simulation and trimming operations. Chen2 teaches (see figures 1-18) a current generator (figures 8 and 9, part 732/932) configured to provide the feed-forward compensation (figures 8 and 9, part 732/932), and an adding resistance (figures 8 and 9, part 731/931); wherein the current generator (figures 8 and 9, part 732/932) and the adding resistance (figures 8 and 9, part 731/931). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the control circuit of Chen with the control circuit features as taught by Chen2, because it provides high efficiency operation based on the operational modes (paragraph [0006]). Wilcox teaches (see figures 1-10) the current generator (figure 6, part 260) and the adding resistance (figure 6, part 278) are configured to be tuned via simulation and trimming operations (figure 6, part through ITRIM at ICN1B) (column 11; lines 23-30; Compensation current ICN1B has two purposes: 1) to serve as a trimming current to set a desired control current I.CON when the output voltage VOUT is substantially at its regulated level). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the combination of Chen and Chen2 with the trimming features as taught by Wilcox and obtain a current generator configured to provide the feed-forward compensation, and an adding resistance; wherein the current generator and the adding resistance are configured to be tuned via simulation and trimming operations, because it provides more efficient control with more accurate control values (column 11; lines 23-39). Regarding claim 6, Chen, Chen2 and Wilcox teach everything claimed as applied above (see claim 5). Further, Chen discloses (see figures 1-9) the control circuit (figure 1, part 112). However, Chen does not expressly disclose a current mirror having a mirroring factor tunable via simulation and trimming operations. Wilcox teaches (see figures 1-10) the control circuit (figure 6) comprises a current mirror having a mirroring factor (figure 6, part 296/298) tunable via simulation and trimming operations (figure 6, part through ITRIM at ICN1B) (column 11; lines 23-30; Compensation current ICN1B has two purposes: 1) to serve as a trimming current to set a desired control current I.CON when the output voltage VOUT is substantially at its regulated level). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the combination of Chen and Chen2 with the trimming features as taught by Wilcox and obtain the control circuit comprises a current mirror having a mirroring factor tunable via simulation and trimming operations, because it provides more efficient control with more accurate control values (column 11; lines 23-39). Regarding claim 7, Chen, Chen2 and Wilcox teach everything claimed as applied above (see claim 5). However, Chen does not expressly disclose a resistance connected in parallel to the adding resistance between a sum signal node and a switching node, the parallel resistance having a value tunable via simulation and trimming operations. Chen2 teaches (see figures 1-18) a resistance (figure 3, part resistance connected to Vcomp) connected in parallel to the adding resistance (figure 3, part 231) between a sum signal node (figure 3, part sum signal node at Vcomp) and a switching node (figure 3, part switching node at lower terminal of 231), the parallel resistance (figure 3, part resistance connected to Vcomp). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the control circuit of Chen with the control circuit features as taught by Chen2, because it provides high efficiency operation based on the operational modes (paragraph [0006]). Wilcox teaches (see figures 1-10) the resistance (figure 6, part 278) having a value tunable via simulation and trimming operations (figure 6, part through ITRIM at ICN1B) (column 11; lines 23-30; Compensation current ICN1B has two purposes: 1) to serve as a trimming current to set a desired control current I.CON when the output voltage VOUT is substantially at its regulated level). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the combination of Chen and Chen2 with the trimming features as taught by Wilcox and obtain a resistance connected in parallel to the adding resistance between a sum signal node and a switching node, the parallel resistance having a value tunable via simulation and trimming operations, because it provides more efficient control with more accurate control values (column 11; lines 23-39). Claims 8, 11 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2017/0012526), in view of Li (US 2018/0367035). Regarding claim 8, Chen discloses everything claimed as applied above (see claim 1). Further, Chen discloses (see figures 1-9) the control circuit (figure 1, part 112) comprises: a feedback signal (figure 7, part Vfb), wherein the feed-forward compensation is applied (figures 3 and 4A/4B, part feed-forward compensation generated by Tdead; at adaptive mode); and controlling the drive signals (figure 1, part drive signals from 112 to 108/110). However, Chen does not expressly disclose an error amplifier configured to compare a feedback signal with a reference signal to produce a control signal; a sum circuit configured to superimpose a compensation signal onto a measurement signal to produce a sum signal, wherein the feed-forward compensation is applied through variation of at least one of the control signal or the sum signal; and a comparator configured to compare the control signal and the sum signal to generate a modulation signal for controlling the drive signals. Li teaches (see figures 1-12) the control circuit (figure 8, part control circuit) comprises: an error amplifier (figure 8, part 222) configured to compare a feedback signal (figure 8, part feedback signal from 221) with a reference signal (figure 8, part VREF) to produce a control signal (figure 8, part Se); a sum circuit (figure 8, part 253) configured to superimpose (figure 8, part 253) a compensation signal (figure 8, part compensation signal from 252) onto a measurement signal (figure 8, part measurement signal from 251) to produce a sum signal (figure 8, part sum signal out from 253), wherein the feed-forward compensation (figure 8, part feed-forward compensation from 240) is applied through variation of at least one of the control signal (figure 8, part Se; through 231); and a comparator (figure 8, part 233) configured to compare the control signal (figure 8, part Se; through COMP) and the sum signal (figure 8, part sum signal out from 253) to generate a modulation signal (figure 8, part modulation signal from 233 to 234) for controlling the drive signals (figure 8, part drive signals from 234). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the control circuit of Chen with the control circuit features as taught by Li and obtain the control circuit comprises: an error amplifier configured to compare a feedback signal with a reference signal to produce a control signal; a sum circuit configured to superimpose a compensation signal onto a measurement signal to produce a sum signal, wherein the feed-forward compensation is applied through variation of at least one of the control signal or the sum signal; and a comparator configured to compare the control signal and the sum signal to generate a modulation signal for controlling the drive signals, because it provides more efficient controller with improvement in the transient response characteristic of the voltage converter (paragraph [0006]). Regarding claim 11, Chen discloses everything claimed as applied above (see claim 10). Further, Chen discloses (see figures 1-9) applying the feed-forward compensation (figures 3 and 4A/4B, part feed-forward compensation generated by Tdead; at adaptive mode). However, Chen does not expressly disclose varying a switching point at which a PWM comparator triggers relative to a previous switching cycle to extend an on-period. Li teaches (see figures 1-12) applying the feed-forward compensation (figure 8, part feed-forward compensation from 240) comprises varying a switching point (figure 8, part through 231) at which a PWM comparator (figure 8, part 233) triggers relative to a previous switching cycle to extend an on-period (figure 8, part on-period from 234). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the control circuit of Chen with the control circuit features as taught by Li and obtain varying a switching point at which a PWM comparator triggers relative to a previous switching cycle to extend an on-period, because it provides more efficient controller with improvement in the transient response characteristic of the voltage converter (paragraph [0006]). Regarding claim 16, Chen discloses everything claimed as applied above (see claim 10). Further, Chen discloses (see figures 1-9) applying the feed-forward compensation (figures 3 and 4A/4B, part feed-forward compensation generated by Tdead; at adaptive mode). However, Chen does not expressly disclose at least one of: providing a positive step on a control signal; or providing a negative step on a sum signal. Li teaches (see figures 1-12) applying the feed-forward compensation (figure 8, part feed-forward compensation from 240) comprises at least one of: providing a positive step on a control signal (figure 8, part positive step from 240 to Se). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the control circuit of Chen with the control circuit features as taught by Li and obtain applying the feed-forward compensation comprises at least one of: providing a positive step on a control signal; or providing a negative step on a sum signal, because it provides more efficient controller with improvement in the transient response characteristic of the voltage converter (paragraph [0006]). Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2017/0012526), in view of Tomiyoshi (US 7,372,241). Regarding claim 17, Chen discloses everything claimed as applied above (see claim 10). However, Chen does not expressly disclose converting a compensation signal to a current; mirroring the current via a current mirror; and superimposing the mirrored current onto a signal containing coil current information through an adding resistance. Tomiyoshi teaches (see figures 1-6) converting a compensation signal to a current (figure 3, part through A2 and Q1/Q2); mirroring the current via a current mirror (figure 3, part current mirror Q3/Q4); and superimposing (figure 3, part superimposing at Ramp) the mirrored current (figure 3, part current from Q3/Q4) onto a signal containing coil current information (figure 3, part current from A1) through an adding resistance (figure 3, part adding resistance generated by components at 340). It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the control circuit of Chen with the control circuit features as taught by Tomiyoshi and obtain converting a compensation signal to a current; mirroring the current via a current mirror; and superimposing the mirrored current onto a signal containing coil current information through an adding resistance, because it provides more efficient switching control compensation in order to obtain more stable and efficient power conversion. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Carlos O. Rivera-Pérez, whose telephone number is (571) 272-2432 and fax is (571) 273-2432. The examiner can normally be reached on Monday through Friday, 8:30 AM – 5:00 PM EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V. Tran can be reached on (571) 270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.O.R. / Examiner, Art Unit 2838 /THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
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Prosecution Timeline

Dec 20, 2024
Application Filed
Jul 21, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
72%
Grant Probability
92%
With Interview (+20.1%)
2y 8m (~1y 0m remaining)
Median Time to Grant
Low
PTA Risk
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