Prosecution Insights
Last updated: July 17, 2026
Application No. 18/989,694

Data Reconstruction Method and Apparatus

Non-Final OA §102§103§112
Filed
Dec 20, 2024
Priority
Jun 20, 2022 — CN 202210701616.6 +2 more
Examiner
TABONE JR, JOHN J
Art Unit
2111
Tech Center
2100 — Computer Architecture & Software
Assignee
Huawei Technologies Co., Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
699 granted / 790 resolved
+33.5% vs TC avg
Moderate +9% lift
Without
With
+8.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
10 currently pending
Career history
796
Total Applications
across all art units

Statute-Specific Performance

§101
4.1%
-35.9% vs TC avg
§103
48.7%
+8.7% vs TC avg
§102
23.3%
-16.7% vs TC avg
§112
13.0%
-27.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 790 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION This Office Action is in response to the Preliminary Amendment filed 12/16/2024. Claims 1-20 are currently pending in the application and have been examined. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statements (IDSs) submitted on 02/13/2025 and 07/21/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 7 and 15 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. Claims 7 and 15: Thes claims recite the limitation “verifying whether the replica is damaged”. However, this is not supported by the Specification. The disclosure explicitly states in multiple places “where the check module is configured to check the replica of the damaged block” (¶¶ [0027], [0071]). The disclosure basically states that the data block is checked to see if it’s damaged and if it is use the replica to reconstruct the data. It does not disclose that the replica data is checked to confirm whether it is damaged or not. Therefore, these claims are rejected as failing to comply with the enablement requirement. Clarification and correction are required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Roberts et al. (US-20190188099), hereinafter Roberts. Claim 1: Roberts teaches a method, comprising: obtaining a replica of a damaged block in a data protection group (Step 715 corresponds to the case where the failed drive is rebuilt by transferring the mirrored copy in a remote direct memory access (ROMA) or other transfer from the mirroring RAID array 651, ¶ [0066], Fig. 7, Step 715), wherein blocks in the data protection group are protected by an erasure coding (EC) algorithm or a redundant array of independent disks (RAID) algorithm (RAID (Redundant Array of Independent Disks) arrays provide an efficient method for protecting data and correcting devices failures without losing user data. In a RAID array, data is distributed across a number of different drives (such as solid-state drives, or SSDs, and hard disk drives, or HDDs), in a redundant manner to improve the reliability of the stored data. A number of RAID variations or "levels" (RAID levels 1, 2, 3, 4, 5, 6, 10, 50, 60, among others), including erasure codes, are used. These various RAID levels store data by having multiple copies of data stored on different drives of a RAID array, by striping data sets across multiple drives of a RAID array, generating parities for the data and storing the parities across one or more of the RAID array's drives, or various combinations of these. These redundancies allow for the protection of the data should one of the RAID array's drives fail, as the lost data can be rebuilt from other drives in the array or re-constructible from the parities, ¶ [0015], Figs. 1 and 6); and recovering the damaged block based on the replica instead of based on the EC algorithm or the RAID algorithm (If a mirror copy of the failed or failing drive is available, multiple options are available for the rebuild, and step 711 determines which of these to use. The choices include performing the rebuild with the RAID array 601 (step 713), performing it entirely through a remote direct memory access (RDMA) or other transfer of the copy from the mirroring RAID array 651 (step 715), or a combination of these (step 717), ¶ [0064], Fig. 7, Steps 703 and 715. Step 715 corresponds to the case where the failed drive is rebuilt by transferring the mirrored copy in a remote direct memory access (ROMA) or other transfer from the mirroring RAID array 651, ¶ [0066], Fig. 7, Step 715). Claims 9 and 17: These claims recite similar limitations as claim 1 and are rejected as such. Claims 2, 10 and 18: Roberts teaches performing a garbage collection operation comprising valid data migration, wherein the damaged block is generated after the valid data migration is performed, and wherein the replica stored at a storage location in which the damaged block is located before the valid data migration and is marked as an invalid block after the valid data migration is completed (The drive memory controller 201 can also perform various memory management functions, such as, but not limited to, wear leveling (distributing writes to avoid wearing out specific blocks of memory that would otherwise be repeatedly written to) and garbage collection (after a block is full, moving only the valid pages of data to a new block, so the full block can be erased and reused), ¶ [0029]. The valid data migration is known in the art to be part of the garbage collection as stated in Kuzmin et al. (US-10642505) “the storage server is configured to access NAND flash memory, such as in drive 163 using physical block addressing, and to account for NAND flash memory-based device wear-out, and to execute garbage collection with associated valid data migration to manage NAND flash P/E asymmetry and other NAND flash management functions.” Col. 11, ll. 58-64). Claims 4, 12 and 20: Roberts teaches wherein the blocks are in a same hard disk (FIG. 3 is a block diagram of example a hard drive disk (HDD) 300, such as can be used for each of the drives D1-DN 121-129 for RAID array embodiments using hard drives. In the case of a hard drive, the storage media is one or more disks 302 that store data magnetically, rather than the solid-state non-volatile memory devices 202 of FIG. 2. In addition to the one or more disks, the hard disk drive 300 will again include a controller 301 that manages the storage of data on the disks 302. The controller of the hard drive system will perform many of the same functions and include elements corresponding to those of the SSD controller 201, but there will be difference due to the different physical nature of the storage media, ¶¶ [0045], [0086]). Claims 5 and 13: Roberts teaches wherein the blocks are in a same hard disk (FIG. 6 is a simplified version of the fabric of FIG. 4, illustrating just two RAID arrays connected over the computing fabric, but with more detail for the RAID arrays, which are represented similarly to FIG. 1. As in FIG. 1, RAID array 601 includes drives D1-DN 621-629, with a respective portion 641-649 of each storing metadata. The explicitly represented elements of control section 610 include drive interface 617, network interface 611, processing module 619, RAID module 613, and a buffer 615. Similarly, RAID array 651 includes drives D′1-D′N′ 671-679, a respective portion 691-699 of each storing metadata, and a control section 660 including drive interface 667, network interface 661, processing module 669, RAID module 663, and a buffer 665. RAID array 601 and RAID array 651 are connected over a computing fabric 650 or other network, which is represented as the connection of the two RAID arrays through the switches 650a and 650b, ¶ [0054]). Claims 6 and 14: Roberts teaches writing data in an appending write manner to the storage system (¶¶ [0029], [0046]). Claims 7 and 15: Roberts teaches verifying whether the replica is damaged (At step 703, the RAID array determines if a mirrored copy of the failed drive is available on another RAID array, ¶ [0063], Fig. 7). Claims 8 and 16: Roberts teaches obtaining reverse description information of the damaged block, wherein the reverse description information comprises a logical address of the damaged block; and determining the replica based on the logical address (If the RAID array control section provides a logical address to which data is to be read/written, the flash memory controller can convert the logical address received from the host RAID array control section to a physical address in the memory devices 202, ¶ [0029]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3, 11 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Roberts et al. (US-20190188099), hereinafter Roberts, in view of Coronado et al. (US-20150234719), hereinafter Coronado. Claims 3, 11 and 19: Roberts does not explicitly teach performing a hierarchical storage operation on the damaged block to generate the replica in a cache or a block. However, Coronado teaches in an analogous art Aa tiered, hierarchical storage system is one such system that includes a variety of storage media of differing performance and/or cost arranged into storage tiers. Such storage media may include solid state drives (SSD), enterprise hard disk drives (HUD), serial advanced technology attachment (SATA) disk drives, tape drives, and other storage devices. Storage of data on particular media and/or tier may be based on performance requirements, frequency of use, necessary levels of protection, and other considerations. Moreover, data may be migrated between tiers, as one or more characteristics of the data may change. Placement of the data in the appropriate storage media and/or tier may facilitate efficient and reliable access to the data, and thus enhance the overall performance of the storage environment. (¶ [0003]. Also, Fig. 3 and discussion therein.). It would have been obvious to one of ordinary skill in the art before the effective filing data of the claimed invention to utilize Coronado’s tiered, hierarchical storage system in Roberts. The artisan would be motivated to do so because placement of the data in the appropriate storage media and/or tier may facilitate efficient and reliable access to the data, and thus enhance the overall performance of the storage environment. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Thomasian (Mirrored and Hybrid Disk Arrays: Organization, Scheduling, Reliability, and Performance, Jan. 26, 2018, arXiv, pp. 1-37) teaches Basic mirroring (BM) classified as RAID level 1 replicates data on two disks, thus doubling disk access bandwidth for read requests. RAID1/0 is an array of BM pairs with balanced loads due to striping. When a disk fails the read load on its pair is doubled, which results in halving the maximum attainable bandwidth. We review RAID1 organizations which attain a balanced load upon disk failure, but as shown by reliability analysis tend to be less reliable than RAID1/0. Hybrid disk arrays which store XORed instead of replicated data tend to have a higher reliability than mirrored disks, but incur a higher overhead in updating data. Read request response time can be improved by processing them at a higher priority than writes, since they have a direct effect on application response time. Shortest seek distance and affinity based routing both shorten seek time. Anticipatory arm placement places arms optimally to minimize the seek distance. The analysis of RAID1 in normal, degraded, and rebuild mode is provided to quantify RAID1/0 performance. We compare the reliability of mirrored disk organizations against each other and hybrid disks and erasure coded disk arrays. RAID reliabilities can be compared with a shortcut reliability analysis method. (Abstract). Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN J TABONE JR whose telephone number is (571)272-3827. The examiner can normally be reached M-F 9 AM to 7 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mark Featherstone can be reached at (571) 270-3750. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN J TABONE JR/Primary Examiner, Art Unit 2111 06/25/2026
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Prosecution Timeline

Dec 20, 2024
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
97%
With Interview (+8.7%)
2y 3m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 790 resolved cases by this examiner. Grant probability derived from career allowance rate.

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