Prosecution Insights
Last updated: August 17, 2026
Application No. 18/990,059

EFFICIENT PROCESSING OF OPACITY MICRO-MAPS

Non-Final OA §103
Filed
Dec 20, 2024
Examiner
ZHAI, KYLE
Art Unit
2611
Tech Center
2600 — Communications
Assignee
Advanced Micro Devices Inc.
OA Round
1 (Non-Final)
74%
Grant Probability
Favorable
1-2
OA Rounds
1y 2m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
363 granted / 487 resolved
+12.5% vs TC avg
Strong +19% interview lift
Without
With
+18.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
27 currently pending
Career history
514
Total Applications
across all art units

Statute-Specific Performance

§101
12.3%
-27.7% vs TC avg
§103
62.4%
+22.4% vs TC avg
§102
7.2%
-32.8% vs TC avg
§112
13.7%
-26.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 487 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-6, 10-15 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Nvidia OptiX 8.1 (10/22/2024, hereinafter OptiX) in view of Weinberger et al. (US 6,453,389). Regarding claim 1, OptiX discloses a method (OptiX, 5.11 Opacity micromaps) comprising: a first opacity micro-map evaluation request for a first ray and receiving a second opacity micro-map evaluation request (OptiX, 5.11 Opacity micromaps, [0001], “any-hit programs are often invoked for ray-triangle hits that could be trivially categorized as either a miss or a hit. To reduce the overhead of redundant and potentially expensive any-hit programs, OptiX opacity micromaps (OMMs) can be used to cull any-hit program invocations in regions within a triangle known to be completely opaque or transparent”. A first ray intersecting with a triangle causes the OMM associated with that triangle to be consulted to determined opacity is considered the first OMM evaluation request. Because ray tracing processes many rays, each ray triangle hit may request OMM evaluation, a subsequent ray triangle hit would cause another OMM evaluation is considered the second OMM evaluation request); OptiX does not expressly disclose “initiating a first data memory request to a first address in memory”; Weinberger et al. (hereinafter Weinberger) discloses initiating a first data memory request to a first address in memory (Weinberger, col 5. 66-67, “the CPU 12 inserts a request for the cache line in the queue 20”); while the first data memory request is pending, receiving a second request associated with the same address (Weinberger, col 5-6. 64-1, “the CPU 12 checks the queue 20 and the bus 22 for a duplicate cache line request at step 150…If a duplicate cache line request exists”); in response to a first data being returned from the memory, servicing both the first request and the second request utilizing the first data (Weinberger, col 6. 1-6, “the CPU 12 merges the new request with the existing request in the queue 20 or the bus 22 so that a single memory transaction will satisfy both requests (step 160). At step 170, the cache line is retrieved from main memory 24 and provided to the CPU 12 at step 125”). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the OptiX opacity micromap evaluation process to incorporate the duplicate memory request handling technique of Weinberger in order to reduce redundant memory transactions and improve ray tracing performance. Regarding claim 2, OptiX teaches the second opacity micro-map evaluation request; OptiX as modified by Weinberger with the same motivation from claim 1 discloses refraining from issuing a memory request to the memory for the second request (Weinberger, col 6. 1-6, “the CPU 12 merges the new request with the existing request in the queue 20 or the bus 22 so that a single memory transaction will satisfy both requests (step 160). At step 170, the cache line is retrieved from main memory 24 and provided to the CPU 12 at step 125”). Regarding claim 3, OptiX teaches he first opacity micro-map evaluation request and the second opacity micro-map evaluation request; OptiX as modified by Weinberger with the same motivation from claim 1 discloses the refraining also occurs in response to the first request and the second request being directed to the first address (Weinberger, col 5-6. 64-1, “the CPU 12 checks the queue 20 and the bus 22 for a duplicate cache line request at step 150…If a duplicate cache line request exists”). Regarding claim 4, OptiX discloses wherein the first opacity micro-map evaluation request is for a first subdivision of a first primitive and the second opacity micro-map evaluation request is for a second subdivision of the first primitive or a second primitive (OptiX, 5.11 Opacity micromaps, [0003], “The OMM specifies one of four opacity states per microtriangle: opaque, transparent, unknown-opaque or unknown-transparent. An OMM is applied to one or more base triangles in a GAS to add extra opacity detail, much like traditional texture mapping”. The first OMM evaluation is for microtriangle 1 and the second OMM evaluation is for microtriangle 2). Regarding claim 5, OptiX teaches the second opacity micro-map evaluation request; OptiX as modified by Weinberger with the same motivation from claim 1 discloses storing an indication of the request in a local memory (Weinberger, col 6. 1-4, “Weinberger, col 6. 1-6, “the CPU 12 merges the new request with the existing request in the queue 20 or the bus 22 so that a single memory transaction will satisfy both requests (step 160)”. The merged request information is considered an indication and the request queue is a local storage structure reads on the local memory). Regarding claim 6, OptiX teaches the first opacity micro-map evaluation request and the second opacity micro-map evaluation request; OptiX as modified by Weinberger with the same motivation from claim 1 discloses checking the local memory to determine that the first request and the second request are associated with the same data (Weinberger, col 5 64-65, “the CPU 12 checks the queue 20 and the bus 22 for a duplicate cache line request at step 150”). Regarding claim 10, Optix discloses an opacity micro-map (Optix, 5.11 Opacity micromaps); OptiX as modified by Weinberger with the same motivation from claim 1 discloses a system (Weinberger, col 4. 18-20, “FIG. 1 is a block diagram of an example system architecture for implementing the prediction method and apparatus of the present invention”) comprising: a memory (Weinberger, Fig. 1); and a circuitry (Weinberger, Fig. 1 illustrates a CPU 12). The remaining limitations recite in claim 10 are similar in scope to the method recited in claim 1 and therefore are rejected under the same rationale. Regarding claims 11-15, claims 11-15 recite functions that are similar in scope to the method steps recited in claims 2-6 and therefore are rejected under the same rationale. Regarding claim 19, OptiX as modified by Weinberger with the same motivation from claim 1 discloses a non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform operations (Weinberger, col 4. 48-55, “The CPU 12 is the primary agent in the system architecture 10. The CPU 12 includes a suitably programmed arithmetic logic unit 13 programmed to manipulate data. The CPU 12 is coupled to the cache 14, the queue 20, the prefetcher 16, and the main memory 24. The CPU 12 initiates substantially all actions in the system architecture 10, including generating memory read misses, memory write misses, and instruction misses”). The limitations recite in claim 19 are similar in scope to the method recited in claim 1 and therefore are rejected under the same rationale. Regarding claim 20, claim 20 recites instruction that is similar in scope to the method recited in claim 2 and therefore is rejected under the same rationale. Claims 7 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over OptiX in view of Weinberger et al. (US 6,453,389), as applied to claims 5 and 14, in view of Arsenault (US 5,408,650) in further view of Thottappilly et al. (US 12,517,760). Regarding claim 7, OptiX teaches receiving a subsequent opacity micro-map evaluation request and a second ray associated with the subsequent opacity micro-map evaluation request (OptiX, 5.11 Opacity micromaps, [0001], “any-hit programs are often invoked for ray-triangle hits that could be trivially categorized as either a miss or a hit. To reduce the overhead of redundant and potentially expensive any-hit programs, OptiX opacity micromaps (OMMs) can be used to cull any-hit program invocations in regions within a triangle known to be completely opaque or transparent”. Ray tracing processes many rays, each ray triangle hit may request OMM evaluation, a subsequent ray triangle hit would cause another OMM evaluation); OptiX as modified by Weinberger teaches the local memory; OptiX as modified by Weinberger does not expressly disclose “in response to the local memory being full”; Asenault discloses in response to a local memory being full, suspending processing (Asenault, col 4. 17-23, “the kernel processor suspends the execution of the application program whenever the memory event queue is full. As soon as the main processor notifies the kernel processor that a predetermined number of messages have been removed from the queue, the kernel processor allows the application program to continue”). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the request queue managment of OptiX as modified by Weinberger with the concept of the queue management function as taught by Asenault in order to prevent queue overflow and improve system stability. In addition, OptiX as modified by Weinberger and Asenault does not expressly disclose “discarding the subsequent opacity micro-map evaluation request”; Thottappilly et al. (hereinafter Thottappilly) discloses discarding request (Thottappily, col 13. 45-50, “The discard signal may be initiated based on the priority inversion signal. The discard signal may be based on an out-of-memory condition, e.g., signaled by an out-of-memory interrupt. The discard signal may be based on a context switch taking too long (e.g., more than a threshold time interval)”). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the request queue management of OptiX as modified by Weinberger and Asenault with the concept of discard function as taught by Thottappilly in order to prevent memory overflow. Regarding claim 16, claim 16 recites function that is similar in scope to the method step recited in claim 7 and therefore is rejected under the same rationale. Claims 8 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Optix in view of Weinberger et al. (US 6,453,389) in view of Arsenault (US 5,408,650) in view of Thottappilly et al. (US 12,517,760), as applied to claims 7 and 16, in further view of Han et al. (US 2026/0111147). Regarding claim 8, OptiX teaches the subsequent opacity micro-map evaluation request; OptiX as modified by Weinberger, Asenault and Thottappilly does not expressly disclose “regenerating in response to a slot becoming available in the local memory”; Han et al. (hereinafter Han) discloses regenerating in response to a slot becoming available in a local memory (Han, [0043], “When space becomes available in the request queue, requests stored in the replay buffer can be reintroduced for scheduling”). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the request queue management of OptiX as modified by Weinberger, Asenault and Thottappilly with the concept of replay buffer scheduling function as taught by Han in order to improve processing efficiency by preventing request from being lost when the queue is temporarily full. Regarding claim 17, claim 17 recites function that is similar in scope to the method step recited in claim 8 and therefore is rejected under the same rationale. Claims 9 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over OptiX in view of Weinberger et al. (US 6,453,389), as applied to claims 1 and 10, in view of Liktor et al. (US 2020/0211253). Regarding claim 9, OptiX teaches the first ray and the first opacity micro-map evaluation request (OptiX, 5.11 Opacity micromaps, [0001], “any-hit programs are often invoked for ray-triangle hits that could be trivially categorized as either a miss or a hit. To reduce the overhead of redundant and potentially expensive any-hit programs, OptiX opacity micromaps (OMMs) can be used to cull any-hit program invocations in regions within a triangle known to be completely opaque or transparent”. A first ray intersecting with a triangle causes the OMM associated with that triangle to be consulted to determined opacity); OptiX as modified by Weinberger does not expressly disclose “performing speculative processing by allocating an entry in a hit buffer” Liktor et al. (hereinafter Liktor) discloses performing speculative processing (Liktor, [0380], “it is possible to speculatively execute multiple intersection shaders and if at least one returns a positive hit result, it is merged into the global nearest hit. Specific implementations need to find an optimal number of deferred intersection tests to reduce the number of dispatch calls but avoid calling too many redundant intersection shaders”) by allocating an entry in a hit buffer (Liktor, [0378], “allow the accumulation of multiple potential intersection or hit invocations in a list. At a given time during traversal each entry in the list may be used to generate a shader invocation”. The entry in the list reads on buffer entry because it stores pending hit). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the opacity micromap evaluation request of OptiX as modified by Weinberger with the concept of speculative execution and hit list entry allocation function of Liktor in order to improve ray processing efficiency. Regarding claim 18, claim 18 recites function that is similar in scope to the method step recited in claim 9 and therefore is rejected under the same rationale. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE ZHAI whose telephone number is (571)270-3740. The examiner can normally be reached 9AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at (571) 272 - 7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KYLE ZHAI/Primary Examiner, Art Unit 2611
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Prosecution Timeline

Dec 20, 2024
Application Filed
Aug 04, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
74%
Grant Probability
93%
With Interview (+18.8%)
2y 10m (~1y 2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 487 resolved cases by this examiner. Grant probability derived from career allowance rate.

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