DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to amendment filed on 6/24/2026.
The title and claims 1, 4, 8, 9, 11, and 15-20 have been amended.
The objections and rejections from the prior correspondence that are not restated herein are withdrawn.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 16-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (US 2022/0414437) and Huang (US 2025/0110648).
With respect to claim 16, Liu teaches of a control method applied in a neural-network processing unit (NPU) and a control circuit, comprising: writing a plurality of command streams to a first storage region of the control circuit (fig. 2; paragraph 26; where the instruction memory stores one or more instructions);
writing a plurality of parameters to a second storage region of the control circuit (fig. 2; paragraph 24, 26; where the data memory stores data relating to computations, including parameters, activations, and weights);
triggering the NPU so that the NPU performs a destination command stream corresponding to a destination block (fig. 1-2; paragraph 36-37; where the neural network accelerator receives instructions that initiate operation to transfer parameters from the data memory to specific computing units).
determining that the destination command stream points to the second storage region (fig. 1-2; paragraph 36-37; where the neural network accelerator receives instructions that initiate operation to transfer parameters from the data memory (pointing to the data memory) to specific computing units);
wherein the destination command stream comprises a first destination command stream and a second destination command stream (fig. 1-2; paragraph 36-37; where there are multiple instructions (first & second destination command streams) that operate to transfer parameters from the data memory to specific computing units).
Liu fails to explicitly teach of (1) determining whether the destination command stream has access authority in response to the destination command stream pointing to the second storage region; (2) determining that the first destination command stream has access authority; determining that the second destination command stream has not access authority; (3) directing the control circuit to stop reading the second storage region in response to the second destination command stream not having access authority; and (4) directing the control circuit to read the second storage region and output a destination parameter in response to the first destination command stream having access authority.
However, Huang teaches of determining that the destination command stream points to the second storage region (fig. 1, 4, 7; paragraph 207-210, 270-277; where when the sector address for the instruction is within a preset sector range. In the combination with Liu, that range is in the data memory);
determining whether the destination command stream has access authority in response to the destination command stream pointing to the second storage region (fig. 1, 4, 7; paragraph 207-210, 270-277; where when the sector address for the instruction is within a range it is checked to see if it complies with the preset specific sector range rules. In the combination with Liu, that range is in the data memory),
wherein the destination command stream comprises a first destination command stream and a second destination command stream (fig. 1, 4, 7; paragraph 207-210, 270-277; where there are multiple interaction instructions (first & second command streams));
determining that the first destination command stream has access authority (fig. 1, 4, 7; paragraph 207-210, 270-277; where when the data interaction instruction address range is a range that can be read and the data interaction instruction is a read instruction);
determining that the second destination command stream has not access authority (fig. 1, 4, 7; paragraph 207-210, 270-277; where when the data interaction instruction address range is a range that can neither be read nor written and the data interaction instruction is a read instruction);
directing the control circuit to stop reading the second storage region in response to the second destination command stream not having access authority (fig. 1, 4, 7; paragraph 207-210, 270-277; where when the data interaction instruction address range is a range that can neither be read nor written, a response of blank or not real data is returned and the instruction to read data isn’t executed); and
directing the control circuit to read the second storage region and output a destination parameter in response to the first destination command stream having access authority (fig. 1, 4, 7; paragraph 207-210, 270-277; where when the data interaction instruction address range is a range that can be read, the data is read and a return response of successful execution occurs).
Liu and Huang are analogous art because they are from the same field of endeavor, as they involve data storage.
It would have been obvious to one of ordinary skill in the art having the teachings of Liu and Huang before the time of the effective filing of the claimed invention to incorporate the protection modes of Huang into the memory of Liu. Their motivation would have been to protect the security of the stored data (Huang, paragraph 4-5).
With respect to claim 17, the combination of Liu and Huang teaches of wherein the step of determining whether the destination command stream has access authority comprises: determining whether the destination block is located in the first storage region (Liu paragraph 26-27, 36-37; Huang paragraph 270-277, 514; where it is determined whether the instructions being executed are within the rules for the specific sector range. In the combination with Liu, this is done by the neural network accelerator of Liu),
wherein: in response to determining that the destination block is located in the first storage region, directing the control circuit to read the second storage region and output the destination parameter (Liu paragraph 26-27, 36-37; Huang paragraph 270-277, 514; where it is determined that the instructions being executed are within the rules for the specific sector range, the instructions are allowed to execute and the sector data is read. In the combination it is the parameter of Liu that is read), and
in response to determining that the destination block is not located in the first storage region, directing the control circuit to stop reading the second storage region (Liu paragraph 26-27, 36-37; Huang paragraph 270-277, 514; where it is determined that the instructions being executed are not within the rules for the specific sector range, the read instruction is prevented from executing).
The reasoning for obviousness is the same as indicated above with respect to claim 1.
With respect to claim 18, Huang teaches of directing the control circuit to output address information pertaining to the first storage region; and comparing the address information pertaining to the first storage region and address information pertaining to the destination block (paragraph 270-280; where the target sector address corresponding to the instruction is verified and compared with the preset sector address range),
wherein: in response to the address information pertaining to the first storage region comprising the address information pertaining to the destination block, directing the control circuit to read the second storage region and output the destination parameter (paragraph 270-280; when the address falls within a preset range, the address corresponds to that specific region and the instruction is executed reading the sector data),
in response to the address information pertaining to the first storage region not completely comprising the address information pertaining to the destination block, directing the control circuit to stop reading the second storage region (paragraph 270-280; when the address doesn’t fall within a particular preset range, the address doesn’t correspond to that specific region, the read instruction is prevented from executing).
The reasoning for obviousness is the same as indicated above with respect to claim 1.
With respect to claim 19, Huang teaches of directing the control circuit to output address information about the second storage region; determining that the address information about the first storage region comprises the address information about the destination block (paragraph 270-280; when the address falls within a preset range, the address corresponds to that specific region) and
comparing the address information about the second storage region and address information about the destination command stream in response to the address information about the first storage region comprising the address information about the destination block (paragraph 270-280; where the target sector address corresponding to the instruction is verified and compared with another preset sector address range),
wherein: in response to the address information about the second storage region comprising the address information about the destination command stream, this means that the destination command stream has access authority (paragraph 270-280; when the address falls within a preset range, and conforms to the range’s rules, it is allowed to execute),
in response to the address information about the second storage region not comprising the address information about the destination command stream, this means that the destination command stream does not have access authority (paragraph 270-280; when the address falls within a preset range, and doesn’t conform to the range’s rules, it does not to execute).
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu and Huang as applied to claim 16 above, and further in view of Horn et al. (US 2006/0059059).
With respect to claim 20, Horn teaches of determining that an erase signal is received (paragraph 124; whereas the memory buffers are cleared, there must have been a signal that caused it to happen);
determining that the first or second storage regions is erased by the control circuit in response to the erase signal being received (fig. 3; paragraph 47, 124; since the storage service profile executes and clears the memory buffers allowing for additional services to run and use the memory buffers, it must be determine that the clearing occurred successfully),
wherein in response to either of the first or second storage regions being erased by the control circuit, the control circuit erases the other of the first and second storage regions (fig. 3; paragraph 47, 124; where after the execution of the processes is complete, the memory buffers are released and cleared. This suggests to one of ordinary skill in the art that they could be cleared one after the other. In the combination with Liu and Huang, this would clear the data memory and instruction memory of Liu).
Liu, Huang, and Horn are analogous art because they are from the same field of endeavor, as they involve data storage.
It would have been obvious to one of ordinary skill in the art having the teachings of Liu, Huang, and Horn before the time of the effective filing of the claimed invention to incorporate the clearing of the memory after the execution is complete in the combination of Liu and Huang as taught in Horn. Their motivation would have been to ensure there is adequate memory space available.
Allowable Subject Matter
Claims 1-15 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Applicant’s arguments, see pages 10-13 of the remarks, filed 6/24/2026, with respect to the 103 rejection of claim 1 over Liu and Huang have been fully considered and are persuasive.
Condict et al. (US 2018/0189199) discloses the NPU determines whether a start address or an end address of the destination block exceeds an address range of the first region, in response to the start address or the end address of the destination block exceeds the address range of the first region, the NPU does not access the storage circuit in figure 5 and paragraph 52 where “the specified range of memory may define starting and/or ending physical memory addresses and the number of bytes within the range of physical memory addresses within the memory. If the determination as to whether the specified range of memory at block is not within the predetermined portion of memory, the method proceeds to block in which a failure indicator is transferred indicating that the device is not authorized to access the predetermine portion of memory.” Condict additionally indicates that the command is executed when the range is within the predetermined portion of memory. However, Condict does not teach or suggest, “in response to the start address and the end address of the destination block not exceeding the address range of the first region and the destination command stream pointing to the second region, the control circuit or the NPU determines whether the destination command stream has access authority,” in the context of the claim.
With respect to independent claim 1, the prior art does not teach or suggest, “in response to the start address and the end address of the destination block not exceeding the address range of the first region and the destination command stream pointing to the second region, the control circuit or the NPU determines whether the destination command stream has access authority,” in the context of the claim.
Response to Arguments
Applicant's arguments filed 6/24/2026 have been fully considered but they are not persuasive.
Applicant argues with respect to independent claim 16, that the combination of Liu and Huang does not teach of determining that the first destination command stream has access authority; determining that the second destination command stream has not access authority. The examiner disagrees.
Liu discloses in figures 1-2 and paragraphs 36-37 that there are multiple instructions that operate to transfer parameters from the data memory to specific computing units. Each of these instructions is a destination command stream, thus there are multiple destination command streams.
Huang also shows this in figures 1, 4, 7 and paragraph 207-210, 270-277 as in a similar manner, there are multiple interaction instructions, which are the claimed first and second command streams.
Hung goes on to explain (paragraph 207-210, 270-277) that where when the data interaction instruction address range is a range that can be read and the data interaction instruction is a read instruction, the read is carried out. Thus, the instruction has the claimed access authority. Furthermore, when where when the data interaction instruction address range is a range that can neither be read nor written and the data interaction instruction is a read instruction, the instruction isn’t executed and a response of blank or not real data is returned. Thus the instruction has the claimed “not access authority.” Thus the combination of Liu and Huang reads on the limitations at issue.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL C KROFCHECK whose telephone number is (571)272-8193. The examiner can normally be reached on Monday - Friday 8am -5pm, first Friday off.
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MICHAEL C. KROFCHECK
Primary Examiner
Art Unit 2138
/Michael Krofcheck/Primary Examiner, Art Unit 2138
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