DETAILED ACTION
This FINAL action is in response to Application No. 18/992,312 originally filed 01/08/2025. The amendment presented on 02/06/2025 which provides no amendments to claims and claim 15 is cancelled is hereby acknowledged.
Currently Claims 1-14 and 16-21 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 02/06/2026 have been fully considered but they are not persuasive.
Applicant asserts Lee does not disclose the identified feature of "when transmitting the current image, updating, upon transmitting the current image for a first preset duration, the backlight data corresponding to the current image to a backlight driver chip" however The Office respectfully disagrees. Firstly, the term “first preset duration” is not defined in the claim and, assuming, Applicant is attempting to suggest here that a certain specific amount time is required by the claim language, The Office disagrees with such an assertion. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Secondly, Lee expressly teaches displaying an image during the noted portion of the frames at F0, F1, and F2 which are time periods in which the current image is being transmitted and produced on the display. (see marked up figure 4 below) Lee further teaches that the backlight control circuit may generate the control signal Vc according to the frame rate of the image frame that is currently processed, to dynamically adjust the brightness of the backlight module 238, thereby preventing image brightness and/or color nonuniformity. Thus, Lee most certainly “turns on” the backlight after making the necessary adjustments. Third, The Office has additionally cited paragraphs [0020-0027] in connection with paragraph [0025] however, and importantly, Figure 5 (and improvement in Figure 6) illustrate average brightness intensity during and between frames as well as the drop-off in backlight intensity due to the frame rate delays and display periods F0, F1 and F2. The result of the backlight control circuit 228 determining whether to change the brightness of the backlight module 238 in the vertical front porch region is provided by Figure 6. Thus again, this further reaffirms that Lee discloses to “turn on” the backlight after making the necessary adjustments/updates/compensation upon transmitting the image data for the current frame. Applicant is reminded of the following upon reviewing any prior art made of record, a prior art reference must be considered in its entirety, i.e., as a whole, including portions that would lead away from the claimed invention. W.L. Gore & Associates, Inc. v. Garlock, Inc., 721 F.2d 1540, 220 USPQ 303 (Fed. Cir. 1983), cert. denied, 469 U.S. 851 (1984).
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Therefore upon review, Applicants arguments are not found persuasive and the rejection will be currently maintained.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1-3, 6-7, 12-14, 16, 17, and 20-21 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. U.S. Patent Application Publication No. 2022/0262324 A1 hereinafter Lee.
Consider Claim 1:
Lee discloses a method for adjusting backlight, comprising: (Lee, See Abstract.)
when rendering a current image, determining backlight data corresponding to the current image; (Lee, [0020-0027], [0023], “Specifically, when the image processing circuit 224 receives the image data from the GPU 210, the image processing circuit 224 delays for a period of time before generating an output image data to the display panel 230, wherein the output image data includes an image data, a vertical sync signal, a horizontal sync signal, etc. If the image processing circuit 224 determines that the image frame F1 has a lower frame rate (e.g. the image frame F2 is not received in a period of time), the control signal Vc (e.g. the PWM signal) generated by the backlight control circuit 228 has a longer duty cycle. That is, the backlight module 238 has a higher brightness in the vertical front porch region of the image frame F1, to make the average brightness displayed by the display panel 230 consistent.”)
when transmitting the current image, updating, upon transmitting the current image for a first preset duration, the backlight data corresponding to the current image to a backlight driver chip; and (Lee, [0020-0027], [0020], “wherein the receiving interface 222 is arranged to receive an image data from the GPU 210 , and then transmit the received image data to image processing circuit 224 for image processing, and the image processing circuit 224 may adjust brightness, color, or format of the received image data to generate and output an output image data to the transmitting interface 226 that transmits the output image data to the display panel 230 for displaying. In addition, the backlight control circuit 228 is arranged to generate a control signal Vc to control the brightness of the display panel 230, wherein the control signal Vc may be a pulse-width modulation (PWM) signal.”)
when the updating of the backlight data corresponding to the current image is completed, controlling the backlight driver chip to turn on a backlight source, and adjusting backlight brightness based on the backlight data of the current image. (Lee, [0020-0027], [0025], “FIG. 5 is a diagram illustrating image brightness and/or color nonuniformity according to the prior art. In FIG. 5, it is assumed that the display panel 230 is a normally white LCD panel, the displayed image frames F0, F1, and F2 have a same content, the backlight brightness remains the same, and the frame rate of the image frame F1 is lower than that of the image frame F0. Similar to the case as discussed in the related description of FIG. 3, the image frame F1 in FIG. 5 has a lower frame rate (i.e. the image frame F1 has a longer vertical front porch region). As a result, the average image brightness generated by the display panel 230 in the vertical front porch region of the image frame F1 will gradually increase due to a longer current leakage time of the pixel capacitors. Therefore, the image brightness and/or color is nonuniform.”)
Consider Claim 2:
Lee discloses the method for adjusting the backlight according to claim 1, wherein the method further comprises: determining, based on a refresh rate of the current image, backlight brightness of a next frame image of the current image. (Lee, [0023], “To address the problem shown in FIG. 3, please refer to FIG. 4. FIG. 4 is a timing diagram according to an embodiment of the present invention. As shown in FIG. 4, the backlight control circuit 228 determines whether to change the brightness of the backlight module 238 in the vertical front porch region according to the frame rate of the current image frame, to compensate for the decrease of the average image brightness due to the longer vertical front porch region of the image frame F1. Specifically, when the image processing circuit 224 receives the image data from the GPU 210, the image processing circuit 224 delays for a period of time before generating an output image data to the display panel 230, wherein the output image data includes an image data, a vertical sync signal, a horizontal sync signal, etc. If the image processing circuit 224 determines that the image frame F1 has a lower frame rate (e.g. the image frame F2 is not received in a period of time), the control signal Vc (e.g. the PWM signal) generated by the backlight control circuit 228 has a longer duty cycle. That is, the backlight module 238 has a higher brightness in the vertical front porch region of the image frame F1, to make the average brightness displayed by the display panel 230 consistent.”)
Consider Claim 3:
Lee discloses the method for adjusting the backlight according to claim 2, wherein the method further comprises: when a refresh rate of a picture of the current image is updated, compensating the backlight data of the current image, and using the compensated backlight data of the current image as backlight data of the next frame image of the current image. (Lee, [0023-0029], [0023], “To address the problem shown in FIG. 3, please refer to FIG. 4. FIG. 4 is a timing diagram according to an embodiment of the present invention. As shown in FIG. 4, the backlight control circuit 228 determines whether to change the brightness of the backlight module 238 in the vertical front porch region according to the frame rate of the current image frame, to compensate for the decrease of the average image brightness due to the longer vertical front porch region of the image frame F1. Specifically, when the image processing circuit 224 receives the image data from the GPU 210, the image processing circuit 224 delays for a period of time before generating an output image data to the display panel 230, wherein the output image data includes an image data, a vertical sync signal, a horizontal sync signal, etc. If the image processing circuit 224 determines that the image frame F1 has a lower frame rate (e.g. the image frame F2 is not received in a period of time), the control signal Vc (e.g. the PWM signal) generated by the backlight control circuit 228 has a longer duty cycle. That is, the backlight module 238 has a higher brightness in the vertical front porch region of the image frame F1, to make the average brightness displayed by the display panel 230 consistent.”)
Consider Claim 6:
Lee discloses the method for adjusting the backlight according to claim 3, wherein determining, based on the refresh rate of the current image, the backlight brightness of the next frame image of the current image comprises: acquiring the refresh rate of the picture; updating a frequency of a pulse width modulation signal based on the refresh rate of the picture; and determining, based on the updated frequency of the pulse width modulation signal, the backlight brightness of the next frame image of the current image. (Lee, [0023-0029], [0020], “FIG. 2 is a diagram illustrating a display 200 according to an embodiment of the present invention. As shown in FIG. 2, the display 200 includes a control circuit 220 and a display panel 230. A graphics processing unit (GPU) 210 of an image source (e.g., a computer) is coupled to the control circuit 220 of display 200. In this embodiment, the control circuit 220 includes a receiving interface 222, an image processing circuit 224, a transmitting interface 226, and a backlight control circuit 228, wherein the receiving interface 222 is arranged to receive an image data from the GPU 210 , and then transmit the received image data to image processing circuit 224 for image processing, and the image processing circuit 224 may adjust brightness, color, or format of the received image data to generate and output an output image data to the transmitting interface 226 that transmits the output image data to the display panel 230 for displaying. In addition, the backlight control circuit 228 is arranged to generate a control signal Vc to control the brightness of the display panel 230, wherein the control signal Vc may be a pulse-width modulation (PWM) signal. In an embodiment of the present invention, the control circuit 220 is a scaler integrated circuit. The display panel 230 includes a timing controller 232, a gate driver 233, a source driver 234, a pixel array 236, and a backlight module 238, wherein the timing controller 232 receives an image data from the control circuit 220 and then generates corresponding gate driving signal and source driving signal to the gate driver 233 and the source driver 234, for controlling the pixel array 236 to display an image frame. In addition, the backlight module 238 receives the control signal Vc to illuminate with the corresponding brightness.”)
Consider Claim 7:
Lee discloses the method for adjusting the backlight according to claim 6, wherein when the refresh rate of the picture of the current image is updated, compensating the backlight data of the current image and using the compensated backlight data of the current image as the backlight data of the next frame image of the current image comprises: when the refresh rate of the picture changes, saving a frequency of a pulse width modulation signal of the current image, and setting a flag for updating the frequency of the pulse width modulation signal; when backlight of the current image is interrupted, updating, based on the flag, the frequency of the pulse width modulation signal of the current image; (Lee, [0023-0029], [0020], “FIG. 2 is a diagram illustrating a display 200 according to an embodiment of the present invention. As shown in FIG. 2, the display 200 includes a control circuit 220 and a display panel 230. A graphics processing unit (GPU) 210 of an image source (e.g., a computer) is coupled to the control circuit 220 of display 200. In this embodiment, the control circuit 220 includes a receiving interface 222, an image processing circuit 224, a transmitting interface 226, and a backlight control circuit 228, wherein the receiving interface 222 is arranged to receive an image data from the GPU 210 , and then transmit the received image data to image processing circuit 224 for image processing, and the image processing circuit 224 may adjust brightness, color, or format of the received image data to generate and output an output image data to the transmitting interface 226 that transmits the output image data to the display panel 230 for displaying. In addition, the backlight control circuit 228 is arranged to generate a control signal Vc to control the brightness of the display panel 230, wherein the control signal Vc may be a pulse-width modulation (PWM) signal. In an embodiment of the present invention, the control circuit 220 is a scaler integrated circuit. The display panel 230 includes a timing controller 232, a gate driver 233, a source driver 234, a pixel array 236, and a backlight module 238, wherein the timing controller 232 receives an image data from the control circuit 220 and then generates corresponding gate driving signal and source driving signal to the gate driver 233 and the source driver 234, for controlling the pixel array 236 to display an image frame. In addition, the backlight module 238 receives the control signal Vc to illuminate with the corresponding brightness.”)
determining the backlight data corresponding to the current image based on the frequency of the pulse width modulation signal of the current image, updating stored backlight data corresponding to the current image, and clearing the flag after processing is completed; and when backlight of the next frame image of the current image is interrupted, sending the backlight data corresponding to the current image. (Lee, [0023-0029], [0020], [0026], “To address the problem shown in FIG. 5, please refer to FIG. 6. FIG. 6 is a timing diagram according to an embodiment of the present invention. As shown in FIG. 6, the backlight control circuit 228 determines whether to change the brightness of the backlight module 238 in the vertical front porch region according to the frame rate of the current image frame, to compensate for the increase of the average image brightness due to the longer vertical front porch region of the image frame F1. Specifically, if the image processing circuit 224 determines that the image frame F1 has a lower frame rate, the control signal Vc (e.g. the PWM signal) generated by the backlight control circuit 228 has a longer duty cycle. That is, the backlight module 238 has a lower brightness in the vertical front porch region of the image frame F1, to make the average brightness displayed by the display panel 230 consistent.”)
Consider Claim 12:
Lee discloses a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements: (Lee, See Abstract.)
when rendering a current image, determining backlight data corresponding to the current image; (Lee, [0020-0027], [0023], “Specifically, when the image processing circuit 224 receives the image data from the GPU 210, the image processing circuit 224 delays for a period of time before generating an output image data to the display panel 230, wherein the output image data includes an image data, a vertical sync signal, a horizontal sync signal, etc. If the image processing circuit 224 determines that the image frame F1 has a lower frame rate (e.g. the image frame F2 is not received in a period of time), the control signal Vc (e.g. the PWM signal) generated by the backlight control circuit 228 has a longer duty cycle. That is, the backlight module 238 has a higher brightness in the vertical front porch region of the image frame F1, to make the average brightness displayed by the display panel 230 consistent.”)
when transmitting the current image, updating, upon transmitting the current image for a first preset duration, the backlight data corresponding to the current image to a backlight driver chip; and (Lee, [0020-0027], [0020], “wherein the receiving interface 222 is arranged to receive an image data from the GPU 210 , and then transmit the received image data to image processing circuit 224 for image processing, and the image processing circuit 224 may adjust brightness, color, or format of the received image data to generate and output an output image data to the transmitting interface 226 that transmits the output image data to the display panel 230 for displaying. In addition, the backlight control circuit 228 is arranged to generate a control signal Vc to control the brightness of the display panel 230, wherein the control signal Vc may be a pulse-width modulation (PWM) signal.”)
when the updating of the backlight data corresponding to the current image is completed, controlling the backlight driver chip to turn on a backlight source, and adjusting backlight brightness based on the backlight data of the current image. (Lee, [0020-0027], [0025], “FIG. 5 is a diagram illustrating image brightness and/or color nonuniformity according to the prior art. In FIG. 5, it is assumed that the display panel 230 is a normally white LCD panel, the displayed image frames F0, F1, and F2 have a same content, the backlight brightness remains the same, and the frame rate of the image frame F1 is lower than that of the image frame F0. Similar to the case as discussed in the related description of FIG. 3, the image frame F1 in FIG. 5 has a lower frame rate (i.e. the image frame F1 has a longer vertical front porch region). As a result, the average image brightness generated by the display panel 230 in the vertical front porch region of the image frame F1 will gradually increase due to a longer current leakage time of the pixel capacitors. Therefore, the image brightness and/or color is nonuniform.”)
Consider Claim 13:
Lee discloses a electronic device, comprising: (Lee, See Abstract.)
a processor; and a memory configured to store executable instructions of the processor; wherein the processor is configured to execute: (Lee, [0020], “A graphics processing unit (GPU) 210 of an image source (e.g., a computer) is coupled to the control circuit 220 of display 200. In this embodiment, the control circuit 220 includes a receiving interface 222, an image processing circuit 224, a transmitting interface 226, and a backlight control circuit 228, wherein the receiving interface 222 is arranged to receive an image data from the GPU 210 , and then transmit the received image data to image processing circuit 224 for image processing, and the image processing circuit 224 may adjust brightness, color, or format of the received image data to generate and output an output image data to the transmitting interface 226 that transmits the output image data to the display panel 230 for displaying.”)
when rendering a current image, determining backlight data corresponding to the current image; (Lee, [0020-0027], [0023], “Specifically, when the image processing circuit 224 receives the image data from the GPU 210, the image processing circuit 224 delays for a period of time before generating an output image data to the display panel 230, wherein the output image data includes an image data, a vertical sync signal, a horizontal sync signal, etc. If the image processing circuit 224 determines that the image frame F1 has a lower frame rate (e.g. the image frame F2 is not received in a period of time), the control signal Vc (e.g. the PWM signal) generated by the backlight control circuit 228 has a longer duty cycle. That is, the backlight module 238 has a higher brightness in the vertical front porch region of the image frame F1, to make the average brightness displayed by the display panel 230 consistent.”)
when transmitting the current image, updating, upon transmitting the current image for a first preset duration, the backlight data corresponding to the current image to a backlight driver chip; and (Lee, [0020-0027], [0020], “wherein the receiving interface 222 is arranged to receive an image data from the GPU 210 , and then transmit the received image data to image processing circuit 224 for image processing, and the image processing circuit 224 may adjust brightness, color, or format of the received image data to generate and output an output image data to the transmitting interface 226 that transmits the output image data to the display panel 230 for displaying. In addition, the backlight control circuit 228 is arranged to generate a control signal Vc to control the brightness of the display panel 230, wherein the control signal Vc may be a pulse-width modulation (PWM) signal.”)
when the updating of the backlight data corresponding to the current image is completed, controlling the backlight driver chip to turn on a backlight source, and adjusting backlight brightness based on the backlight data of the current image. (Lee, [0020-0027], [0025], “FIG. 5 is a diagram illustrating image brightness and/or color nonuniformity according to the prior art. In FIG. 5, it is assumed that the display panel 230 is a normally white LCD panel, the displayed image frames F0, F1, and F2 have a same content, the backlight brightness remains the same, and the frame rate of the image frame F1 is lower than that of the image frame F0. Similar to the case as discussed in the related description of FIG. 3, the image frame F1 in FIG. 5 has a lower frame rate (i.e. the image frame F1 has a longer vertical front porch region). As a result, the average image brightness generated by the display panel 230 in the vertical front porch region of the image frame F1 will gradually increase due to a longer current leakage time of the pixel capacitors. Therefore, the image brightness and/or color is nonuniform.”)
Consider Claim 14:
Lee discloses the electronic device according to claim 13, wherein the electronic device further comprises a display driver chip and a backlight driver chip; the display driver chip is configured to receive the current image and display the current image on a display screen; and the backlight driver chip is configured to receive the backlight data corresponding to the current image. (Lee, [0020-0027], [0020], “wherein the receiving interface 222 is arranged to receive an image data from the GPU 210 , and then transmit the received image data to image processing circuit 224 for image processing, and the image processing circuit 224 may adjust brightness, color, or format of the received image data to generate and output an output image data to the transmitting interface 226 that transmits the output image data to the display panel 230 for displaying. In addition, the backlight control circuit 228 is arranged to generate a control signal Vc to control the brightness of the display panel 230, wherein the control signal Vc may be a pulse-width modulation (PWM) signal.”)
Consider Claim 16:
Lee discloses the electronic device according to claim 13, wherein the processor is further configured to: determine, based on a refresh rate of the current image, backlight brightness of a next frame image of the current image. (Lee, [0023], “To address the problem shown in FIG. 3, please refer to FIG. 4. FIG. 4 is a timing diagram according to an embodiment of the present invention. As shown in FIG. 4, the backlight control circuit 228 determines whether to change the brightness of the backlight module 238 in the vertical front porch region according to the frame rate of the current image frame, to compensate for the decrease of the average image brightness due to the longer vertical front porch region of the image frame F1. Specifically, when the image processing circuit 224 receives the image data from the GPU 210, the image processing circuit 224 delays for a period of time before generating an output image data to the display panel 230, wherein the output image data includes an image data, a vertical sync signal, a horizontal sync signal, etc. If the image processing circuit 224 determines that the image frame F1 has a lower frame rate (e.g. the image frame F2 is not received in a period of time), the control signal Vc (e.g. the PWM signal) generated by the backlight control circuit 228 has a longer duty cycle. That is, the backlight module 238 has a higher brightness in the vertical front porch region of the image frame F1, to make the average brightness displayed by the display panel 230 consistent.”)
Consider Claim 17:
Lee discloses the electronic device according to claim 16, wherein the processor is further configured to: when a refresh rate of a picture of the current image is updated, compensate the backlight data of the current image, and use the compensated backlight data of the current image as backlight data of the next frame image of the current image. (Lee, [0023], “To address the problem shown in FIG. 3, please refer to FIG. 4. FIG. 4 is a timing diagram according to an embodiment of the present invention. As shown in FIG. 4, the backlight control circuit 228 determines whether to change the brightness of the backlight module 238 in the vertical front porch region according to the frame rate of the current image frame, to compensate for the decrease of the average image brightness due to the longer vertical front porch region of the image frame F1. Specifically, when the image processing circuit 224 receives the image data from the GPU 210, the image processing circuit 224 delays for a period of time before generating an output image data to the display panel 230, wherein the output image data includes an image data, a vertical sync signal, a horizontal sync signal, etc. If the image processing circuit 224 determines that the image frame F1 has a lower frame rate (e.g. the image frame F2 is not received in a period of time), the control signal Vc (e.g. the PWM signal) generated by the backlight control circuit 228 has a longer duty cycle. That is, the backlight module 238 has a higher brightness in the vertical front porch region of the image frame F1, to make the average brightness displayed by the display panel 230 consistent.”)
Consider Claim 20:
Lee discloses the electronic device according to claim 17, wherein the processor is further configured to: acquire the refresh rate of the picture; update a frequency of a pulse width modulation signal based on the refresh rate of the picture; and determine, based on the updated frequency of the pulse width modulation signal, the backlight brightness of the next frame image of the current image. (Lee, [0020], “FIG. 2 is a diagram illustrating a display 200 according to an embodiment of the present invention. As shown in FIG. 2, the display 200 includes a control circuit 220 and a display panel 230. A graphics processing unit (GPU) 210 of an image source (e.g., a computer) is coupled to the control circuit 220 of display 200. In this embodiment, the control circuit 220 includes a receiving interface 222, an image processing circuit 224, a transmitting interface 226, and a backlight control circuit 228, wherein the receiving interface 222 is arranged to receive an image data from the GPU 210 , and then transmit the received image data to image processing circuit 224 for image processing, and the image processing circuit 224 may adjust brightness, color, or format of the received image data to generate and output an output image data to the transmitting interface 226 that transmits the output image data to the display panel 230 for displaying. In addition, the backlight control circuit 228 is arranged to generate a control signal Vc to control the brightness of the display panel 230, wherein the control signal Vc may be a pulse-width modulation (PWM) signal. In an embodiment of the present invention, the control circuit 220 is a scaler integrated circuit. The display panel 230 includes a timing controller 232, a gate driver 233, a source driver 234, a pixel array 236, and a backlight module 238, wherein the timing controller 232 receives an image data from the control circuit 220 and then generates corresponding gate driving signal and source driving signal to the gate driver 233 and the source driver 234, for controlling the pixel array 236 to display an image frame. In addition, the backlight module 238 receives the control signal Vc to illuminate with the corresponding brightness.”)
Consider Claim 21:
Lee discloses the electronic device according to claim 20, wherein the processor is further configured to: when the refresh rate of the picture changes, save a frequency of a pulse width modulation signal of the current image, and set a flag for updating the frequency of the pulse width modulation signal; when backlight of the current image is interrupted, update, based on the flag, the frequency of the pulse width modulation signal of the current image; (Lee, [0023-0029], [0020], “FIG. 2 is a diagram illustrating a display 200 according to an embodiment of the present invention. As shown in FIG. 2, the display 200 includes a control circuit 220 and a display panel 230. A graphics processing unit (GPU) 210 of an image source (e.g., a computer) is coupled to the control circuit 220 of display 200. In this embodiment, the control circuit 220 includes a receiving interface 222, an image processing circuit 224, a transmitting interface 226, and a backlight control circuit 228, wherein the receiving interface 222 is arranged to receive an image data from the GPU 210 , and then transmit the received image data to image processing circuit 224 for image processing, and the image processing circuit 224 may adjust brightness, color, or format of the received image data to generate and output an output image data to the transmitting interface 226 that transmits the output image data to the display panel 230 for displaying. In addition, the backlight control circuit 228 is arranged to generate a control signal Vc to control the brightness of the display panel 230, wherein the control signal Vc may be a pulse-width modulation (PWM) signal. In an embodiment of the present invention, the control circuit 220 is a scaler integrated circuit. The display panel 230 includes a timing controller 232, a gate driver 233, a source driver 234, a pixel array 236, and a backlight module 238, wherein the timing controller 232 receives an image data from the control circuit 220 and then generates corresponding gate driving signal and source driving signal to the gate driver 233 and the source driver 234, for controlling the pixel array 236 to display an image frame. In addition, the backlight module 238 receives the control signal Vc to illuminate with the corresponding brightness.”)
determine the backlight data corresponding to the current image based on the frequency of the pulse width modulation signal of the current image, update stored backlight data corresponding to the current image, and clear the flag after processing is completed; and when backlight of the next frame image of the current image is interrupted, send the backlight data corresponding to the current image. (Lee, [0023-0029], [0020], [0026], “To address the problem shown in FIG. 5, please refer to FIG. 6. FIG. 6 is a timing diagram according to an embodiment of the present invention. As shown in FIG. 6, the backlight control circuit 228 determines whether to change the brightness of the backlight module 238 in the vertical front porch region according to the frame rate of the current image frame, to compensate for the increase of the average image brightness due to the longer vertical front porch region of the image frame F1. Specifically, if the image processing circuit 224 determines that the image frame F1 has a lower frame rate, the control signal Vc (e.g. the PWM signal) generated by the backlight control circuit 228 has a longer duty cycle. That is, the backlight module 238 has a lower brightness in the vertical front porch region of the image frame F1, to make the average brightness displayed by the display panel 230 consistent.”)
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 4-5 and 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. U.S. Patent Application Publication No. 2022/0262324 A1 as applied to claim 3 and 17, respectively above, and further in view of Sun et al. U.S. Patent Application Publication No. 2022/0328015 A1 hereinafter Sun.
Consider Claim 4:
Lee discloses the method for adjusting the backlight according to claim 3, wherein determining, based on the refresh rate of the current image, the backlight brightness of the next frame image of the current image comprises: acquiring the refresh rate of the picture; (Lee, [0020-0027], [0023], “Specifically, when the image processing circuit 224 receives the image data from the GPU 210, the image processing circuit 224 delays for a period of time before generating an output image data to the display panel 230, wherein the output image data includes an image data, a vertical sync signal, a horizontal sync signal, etc. If the image processing circuit 224 determines that the image frame F1 has a lower frame rate (e.g. the image frame F2 is not received in a period of time), the control signal Vc (e.g. the PWM signal) generated by the backlight control circuit 228 has a longer duty cycle. That is, the backlight module 238 has a higher brightness in the vertical front porch region of the image frame F1, to make the average brightness displayed by the display panel 230 consistent.”)
and determining the backlight brightness of the next frame image of the current image based on the compensated backlight data of the current image. (Lee, [0023], “. As shown in FIG. 4, the backlight control circuit 228 determines whether to change the brightness of the backlight module 238 in the vertical front porch region according to the frame rate of the current image frame, to compensate for the decrease of the average image brightness due to the longer vertical front porch region of the image frame F1.”)
Lee however does not specify determining a compensation coefficient of the current image based on the refresh rate of the picture and a preset first correspondence, wherein the first correspondence is a correspondence between different refresh rates and different compensation coefficients; compensating the backlight data of the current image based on the compensation coefficient of the current image.
Sun however teaches that it was a known technique to those having ordinary skill in the art before the effective filing date of the invention to provide determining a compensation coefficient of the current image based on the refresh rate of the picture and a preset first correspondence, wherein the first correspondence is a correspondence between different refresh rates and different compensation coefficients; compensating the backlight data of the current image based on the compensation coefficient of the current image. (Sun, [0028], [0033], [0036], “An embodiment of the present application further provides a display control method, including: acquiring a refresh rate corresponding to to-be-displayed video data; determining an adjustment coefficient according to the refresh rate; performing pixel processing on each frame video data corresponding to the refresh rate according to the adjustment coefficient; and outputting processed video data to a panel driving board, so as to enable the panel driving board to drive a display panel to display the video data.”)
It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to provide correspondence between different refresh rates and different compensation coefficients as this was a known technique in view of Sun and would have been utilized for the purpose of to display the video data according to the display parameters, so as to adjust the brightness stability of a picture displayed on the display panel, thereby avoiding flickering of the display picture. (Sun, [0055])
Consider Claim 5:
Lee in view of Sun disclose the method for adjusting the backlight according to claim 4, wherein when the refresh rate of the picture of the current image is updated, compensating the backlight data of the current image and using the compensated backlight data of the current image as the backlight data of the next frame image of the current image comprises: when the refresh rate of the picture changes, saving an updated compensation coefficient of the current image, and setting a flag for updating the compensation coefficient; when backlight of the current image is interrupted, updating the compensation coefficient of the current image based on the flag; (Sun, [0115-0134], [0101], [0118], “FIG. 14 is a schematic structural diagram of a display apparatus according to an embodiment of the present application. As shown in FIG. 14, in some embodiments, the backlight adjusting unit 730 includes: an adjustment coefficient determination subunit 731 and a signal adjustment subunit 732. The adjustment coefficient determination subunit 731 determines an adjustment coefficient according to the refresh rate; and the signal adjusting subunit 732 obtains an adjusted duty cycle by adjusting a duty cycle of a default backlight control signal according to the adjustment coefficient, and generates the backlight control signal corresponding to the refresh rate according to the adjusted duty cycle. The default backlight control signal is a control signal preset for a default refresh rate. The backlight driving unit 810 drives backlight of the display panel to realize the required backlight brightness according to the backlight control signal, so as to compensate the dark display brightness when the refresh rate is high, or suppress the bright display brightness when the refresh rate is low.”)
determining the backlight data corresponding to the current image based on the compensation coefficient of the current image, and updating stored backlight data corresponding to the current image, and clearing the flag when processing is completed; and when backlight of the next frame image of the current image is interrupted, sending the backlight data corresponding to the current image. (Sun, [0115-0134], [0101], [0118], “FIG. 14 is a schematic structural diagram of a display apparatus according to an embodiment of the present application. As shown in FIG. 14, in some embodiments, the backlight adjusting unit 730 includes: an adjustment coefficient determination subunit 731 and a signal adjustment subunit 732. The adjustment coefficient determination subunit 731 determines an adjustment coefficient according to the refresh rate; and the signal adjusting subunit 732 obtains an adjusted duty cycle by adjusting a duty cycle of a default backlight control signal according to the adjustment coefficient, and generates the backlight control signal corresponding to the refresh rate according to the adjusted duty cycle. The default backlight control signal is a control signal preset for a default refresh rate. The backlight driving unit 810 drives backlight of the display panel to realize the required backlight brightness according to the backlight control signal, so as to compensate the dark display brightness when the refresh rate is high, or suppress the bright display brightness when the refresh rate is low.”)
Consider Claim 18:
Lee discloses the electronic device according to claim 17, however does not specify wherein the processor is further configured to: acquire the refresh rate of the picture; determine a compensation coefficient of the current image based on the refresh rate of the picture and a preset first correspondence, wherein the first correspondence is a correspondence between different refresh rates and different compensation coefficients; compensate the backlight data of the current image based on the compensation coefficient of the current image; and determine the backlight brightness of the next frame image of the current image based on the compensated backlight data of the current image.
Sun however teaches that it was a known technique to those having ordinary skill in the art before the effective filing date of the invention to provide wherein the processor is further configured to: acquire the refresh rate of the picture; determine a compensation coefficient of the current image based on the refresh rate of the picture and a preset first correspondence, wherein the first correspondence is a correspondence between different refresh rates and different compensation coefficients; compensate the backlight data of the current image based on the compensation coefficient of the current image; and determine the backlight brightness of the next frame image of the current image based on the compensated backlight data of the current image. (Sun, [0028], [0033], [0036], “An embodiment of the present application further provides a display control method, including: acquiring a refresh rate corresponding to to-be-displayed video data; determining an adjustment coefficient according to the refresh rate; performing pixel processing on each frame video data corresponding to the refresh rate according to the adjustment coefficient; and outputting processed video data to a panel driving board, so as to enable the panel driving board to drive a display panel to display the video data.”)
It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to provide correspondence between different refresh rates and different compensation coefficients as this was a known technique in view of Sun and would have been utilized for the purpose of to display the video data according to the display parameters, so as to adjust the brightness stability of a picture displayed on the display panel, thereby avoiding flickering of the display picture. (Sun, [0055])
Consider Claim 19:
Lee in view of Sun disclose the electronic device according to claim 18, wherein the processor is further configured to: when the refresh rate of the picture changes, save an updated compensation coefficient of the current image, and set a flag for updating the compensation coefficient; when backlight of the current image is interrupted, update the compensation coefficient of the current image based on the flag; (Sun, [0115-0134], [0101], [0118], “FIG. 14 is a schematic structural diagram of a display apparatus according to an embodiment of the present application. As shown in FIG. 14, in some embodiments, the backlight adjusting unit 730 includes: an adjustment coefficient determination subunit 731 and a signal adjustment subunit 732. The adjustment coefficient determination subunit 731 determines an adjustment coefficient according to the refresh rate; and the signal adjusting subunit 732 obtains an adjusted duty cycle by adjusting a duty cycle of a default backlight control signal according to the adjustment coefficient, and generates the backlight control signal corresponding to the refresh rate according to the adjusted duty cycle. The default backlight control signal is a control signal preset for a default refresh rate. The backlight driving unit 810 drives backlight of the display panel to realize the required backlight brightness according to the backlight control signal, so as to compensate the dark display brightness when the refresh rate is high, or suppress the bright display brightness when the refresh rate is low.”)
determine the backlight data corresponding to the current image based on the compensation coefficient of the current image, and update stored backlight data corresponding to the current image, and clear the flag when processing is completed; and when backlight of the next frame image of the current image is interrupted, send the backlight data corresponding to the current image. (Sun, [0115-0134], [0101], [0118], “FIG. 14 is a schematic structural diagram of a display apparatus according to an embodiment of the present application. As shown in FIG. 14, in some embodiments, the backlight adjusting unit 730 includes: an adjustment coefficient determination subunit 731 and a signal adjustment subunit 732. The adjustment coefficient determination subunit 731 determines an adjustment coefficient according to the refresh rate; and the signal adjusting subunit 732 obtains an adjusted duty cycle by adjusting a duty cycle of a default backlight control signal according to the adjustment coefficient, and generates the backlight control signal corresponding to the refresh rate according to the adjusted duty cycle. The default backlight control signal is a control signal preset for a default refresh rate. The backlight driving unit 810 drives backlight of the display panel to realize the required backlight brightness according to the backlight control signal, so as to compensate the dark display brightness when the refresh rate is high, or suppress the bright display brightness when the refresh rate is low.”)
Claim Rejections - 35 USC § 103
Claim(s) 8-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. U.S. Patent Application Publication No. 2022/0262324 A1 as applied to claim 1 above, and further in view of Shi et al. U.S. Patent Application Publication No. 2024/0393874 A1 hereinafter Shi.
Consider Claim 8:
Lee discloses the method for adjusting the backlight according to claim 1, wherein when rendering the current image, determining the backlight data corresponding to the current image however does not further appear to teach that the device further comprises: acquiring a captured image of an eye, and determining a gaze area of the eye from the captured image; defining a gaze area in the current image as a high-definition area, and a remaining area other than the gaze area in the current image as a non-high-definition area, using different layers for the high-definition area and the non-high-definition area, and using different rendering resolutions for rendering different layers; and calculating backlight data of the rendered layers respectively to obtain two backlight data groups, and combining the two backlight data groups into one backlight data group.
Shi however teaches that it was a known technique to those having ordinary skill in the art before the effective filing date of the invention for further acquiring a captured image of an eye, and determining a gaze area of the eye from the captured image; defining a gaze area in the current image as a high-definition area, and a remaining area other than the gaze area in the current image as a non-high-definition area, using different layers for the high-definition area and the non-high-definition area, and using different rendering resolutions for rendering different layers; and calculating backlight data of the rendered layers respectively to obtain two backlight data groups, and combining the two backlight data groups into one backlight data group. (Shi, [0088-0092], [0155-0185], [0070], “In view of this, embodiments of the present disclosure provide a solution for adaptive refresh rate switching, which may be applied to electronic devices. In the embodiments of the present disclosure, the electronic device may divide the display region of the display screen into a high-definition region and a low-definition region based on the gaze of the user, and render images in the high-definition region and images in the low-definition region by using different resolutions to achieve the adaptive switching of resolution. Moreover, in the embodiments of the present disclosure, the electronic device may determine the complexity of image processing in the current scene based on the current performance of the processor of the electronic device and the rotation speed of user's head, so that the refresh rate may be flexibly adjusted to improve the smoothness of the image and reduce the power consumption of electronic device. Reference may be made to the solution of Embodiment 2 below.”)
It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to provide gaze determination as taught by Shi and would have been utilized for the purpose of compared with rendering the image by using a fixed resolution, the solution is capable of flexibly adjusting the resolution based on the image processing complexity of the image, thereby improving the smoothness of the display of the image. (Shi, [0185])
Consider Claim 9:
Lee discloses the method for adjusting the backlight according to claim 1, however does not further specify wherein the method further comprises: acquiring a rotation speed of a display device; and determining a refresh rate of the current image based on the rotation speed and a second correspondence, wherein the second correspondence is a correspondence between a refresh rate level and a rotation speed range.
Shi however teaches that it was a known technique to those having ordinary skill in the art before the effective filing date of the invention to acquiring a rotation speed of a display device; and (Shi, [0150], “Based on these embodiments, the electronic device may render the image based on the preset resolution and frame rate. Since the resolution is related to the head rotation speed of the user, and the frame rate is related to the plurality of frame rates in the previous time period, the electronic device may render the image based on the resolution and refresh rate, which is flexible and convenient.”)
determining a refresh rate of the current image based on the rotation speed and a second correspondence, wherein the second correspondence is a correspondence between a refresh rate level and a rotation speed range. (Shi, [0141] Furthermore, the electronic device may also be configured with more preset resolutions and a head rotation speed range corresponding to each preset resolution. In this way, the electronic device may determine a head rotation speed range that matches the head rotation speed based on the head rotation speed of the user, and determine a corresponding preset resolution based on the head rotation speed range.”)
It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to provide sensing the rotation speed of a display device as taught by Shi and would have been utilized for the purpose of the electronic device may flexibly adjust the resolution of the gazing region based on the head rotation speed of the user. (Shi, [0198])
Consider Claim 10:
Shi in view of Lee disclose the method for adjusting the backlight according to claim 9, wherein the method further comprises: determining a rendering resolution of the current image based on the rotation speed and a third correspondence, wherein the third correspondence is a correspondence between a rotation speed range and a reduction ratio of the rendering resolution. (Shi, [0141] Furthermore, the electronic device may also be configured with more preset resolutions and a head rotation speed range corresponding to each preset resolution. In this way, the electronic device may determine a head rotation speed range that matches the head rotation speed based on the head rotation speed of the user, and determine a corresponding preset resolution based on the head rotation speed range.”)
Consider Claim 11:
Shi in view of Lee disclose the method for adjusting the backlight according to claim 10, wherein the rotation speed range in the second correspondence is the same as or different from the rotation speed range in the third correspondence. (Shi, [0141] Furthermore, the electronic device may also be configured with more preset resolutions and a head rotation speed range corresponding to each preset resolution. In this way, the electronic device may determine a head rotation speed range that matches the head rotation speed based on the head rotation speed of the user, and determine a corresponding preset resolution based on the head rotation speed range.”)
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Prior art made of record and not relied upon which is still considered pertinent to applicant's disclosure is cited in a current or previous PTO-892. The prior art cited in a current or previous PTO-892 reads upon the applicants claims in part, in whole and/or gives a general reference to the knowledge and skill of persons having ordinary skill in the art before the effective filing date of the invention. Applicant, when responding to this Office action, should consider not only the cited references applied in the rejection but also any additional references made of record.
In the response to this office action, the Examiner respectfully requests support be shown for any new or amended claims. More precisely, indicate support for any newly added language or amendments by specifying page, line numbers, and/or figure(s). This will assist The Office in compact prosecution of this application. The Office has cited particular columns, paragraphs, and/or line numbers in the applied rejection of the claims above for the convenience of the applicant. Citations are representative of the teachings in the art and are applied to the specific limitations within each claim, however other passages and figures may apply. Applicant, in preparing a response, should fully consider the cited reference(s) in its entirety and not only the cited portions as other sections of the reference may expand on the teachings of the cited portion(s).
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/Michael J Jansen II/ Primary Examiner, Art Unit 2626