Prosecution Insights
Last updated: October 02, 2026
Application No. 18/994,536

DISPLAY SUBSTRATE AND DISPLAY DEVICE

Non-Final OA §103
Filed
Jan 14, 2025
Priority
Sep 15, 2023 — WO PCT/CN2023/119009 +1 more
Examiner
HALEY, JOSEPH R
Art Unit
2621
Tech Center
2600 — Communications
Assignee
BOE Technology Group Co., Ltd.
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
905 granted / 1143 resolved
+17.2% vs TC avg
Moderate +7% lift
Without
With
+7.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
25 currently pending
Career history
1172
Total Applications
across all art units

Statute-Specific Performance

§101
3.0%
-37.0% vs TC avg
§103
57.6%
+17.6% vs TC avg
§102
23.8%
-16.2% vs TC avg
§112
6.5%
-33.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1143 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 5 and 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xi et al. (CN 107505795, machine translation provided for examination purposes) in view of Ye (US 2021/0168585) further considered with Kim et al. (US 2017/0003786). In regard to claim 1, Xi et al. teaches a display substrate (fig. 11), comprising a display region (fig. 11, see display area), and the display substrate further comprises: a base substrate (fig. 2A SUB); a second electrode layer provided on the base substrate (PE fig. 2A and page 13 “the electronic paper display panel working respectively exerting different voltage signals to the pixel electrode PE”); a first conductive layer and a second conductive layer provided on the base substrate (fig. 2A elements M1 and M2), wherein the first conductive layer and the second conductive layer are located between the base substrate and the second transparent electrode layer (fig. 2A elements M1 and M2 are between SUB and PE); a sub-pixel provided on the base substrate and located in the display region, wherein the sub-pixel comprises a second electrode in the second electrode layer (element PE); and M first touch line groups and N second touch line groups provided on the base substrate (Rx and Ry), wherein the M first touch line groups are arranged in the second direction, the N second touch line groups are arranged in the first direction (fig. 1, Rx and Ry are arranged in the x and y directions. See English translation page 4 “wherein the data line and the first induction RX y extending along the first direction, the scanning line and the second induction RY x extending along the second direction, the first direction y and the second direction x intersect each other.”), each of the M first touch line groups comprises at least one first touch line, the first touch lines in one and same first touch line group are connected in parallel, each of the N second touch line group comprises at least one second touch line, the second touch lines in one and same second touch line group are connected in parallel (see fig. 5 where the lines are connected in parallel in the x and y directions), the first touch lines are located in the first conductive layer, the second touch lines are located in the second conductive layer, and the first touch lines are insulated and spaced apart from the second touch lines (fig. 2B, RX is in the top layer and RY is in the layer below. In page 4, Xi et al. each the signal and data lines being insulated from each other “a plurality of data lines and a plurality of scanning wires in insulating intersect to form a plurality of pixels”. The signal and data lines are on the same layers as the touch lines; consequentially the touch lines must be insulated) but does not teach a peripheral region at least partially surrounding the display region, wherein the peripheral region comprises a binding region and a binding opposite region opposite to each other in a first direction and two side regions opposite to each other in a second direction intersecting with the first direction; a transparent electrode layer; a third common signal line provided on the base substrate and located in the peripheral region; wherein in an outermost first touch line group among the M first touch line groups, a part of the first touch lines is located in the display region, the second part of the first touch lines is located in of the side regions, and the first touch lines and the third common signal line are arranged such that: the first touch lines and a part of the third common signal line in at least one of the side regions are arranged in the same layer and spaced apart from each other, or the first touch lines and the part of the third common signal line in at least one of the side regions are arranged in different layers, where M and N are positive integers. Ye teaches a peripheral region at least partially surrounding the display region, wherein the peripheral region comprises a binding region and a binding opposite region opposite to each other in a first direction and two side regions opposite to each other in a second direction intersecting with the first direction (fig. 6, Ye teaches a display area AA and a peripheral area NA. Ye shows two binding areas in the X direction); a third common signal line provided on the base substrate and located in the peripheral region (paragraph 47 and element 218); wherein in an outermost first touch line group among the M first touch line groups, a part of the first touch lines is located in the display region, the second part of the first touch lines is located in of the side regions, and the first touch lines and the third common signal line are arranged such that: the first touch lines and a part of the third common signal line in at least one of the side regions are arranged in the same layer and spaced apart from each other, or the first touch lines and the part of the third common signal line in at least one of the side regions are arranged in different layers, where M and N are positive integers (paragraph 47, three insulation films between the common electrode trace and peripheral touch trace). The two are analogous art because they both deal with the same field of invention of touch displays. Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Xi et al. with the display and touch line arrangement of Ye. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Xi et al. with the display and touch line arrangement of Ye because insulating the area between the touch line and common line would prevent parasitic capacitance and would ensure proper display and touch operations. Kim et al. teach a transparent electrode layer (element PXL and paragraph 44). The three are analogous art because they all deal with the same field of invention of touch displays. Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Xi et al. and Ye with the transparent electrode of Kim et al. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Xi et al. and Ye with the transparent electrode of Kim et al. because providing a transparent electrode would allow for the use of a backlight and would provide brighter display operations than the reflective light of Xi et al. In regard to claim 5, Xi et al. teach wherein in the M first touch line groups, the outermost first touch line group has a same resistance as other first touch line groups (fig. 1, part of the outermost touch line groups extends into the peripheral region. The other part is in the display region and is identical to the other touch lines). In regard to claim 28, Xi et al. teach a display device (fig. 11). Allowable Subject Matter Claims 2-4, 6-15, 17, 19, 21 and 23 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for allowance: In regard to claim 2, the prior art fails to teach or make obvious wherein the first pattern is between the third pattern and the second pattern. Ye shows the common electrode below the touch pattern but not between two touch patterns. In regard to claims 3 and 4, the prior art fails to teach or make obvious the first wire distance being greater than the second line distance. In regard to claim 6, the prior art fails to teach or make obvious the first pattern of the common electrode overlapping the fourth pattern of the first touch lines. In regard to claims 7-15, 17, 19, 21 and 23, the prior art fails to teach or make obvious the first, second and third common signal lines and their arrangement on the device. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSEPH R HALEY whose telephone number is (571)272-0574. The examiner can normally be reached 7:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amr Awad can be reached at 571-272-7764. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSEPH R HALEY/Primary Examiner, Art Unit 2621
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Prosecution Timeline

Jan 14, 2025
Application Filed
Jul 23, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
86%
With Interview (+7.3%)
2y 5m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1143 resolved cases by this examiner. Grant probability derived from career allowance rate.

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