Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 8 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adachi (US 2022/0390800) in view of Kim et al. (US 2015/0029434).
In regard to claim 1, Adachi teaches a dimming panel having a display region and a peripheral region surrounding the display region (fig. 1 DA and area surrounding DA), wherein the dimming panel comprises: a first substrate and a second substrate that are arranged opposite to each other (elements 10 and 20); a frame sealant connecting the first substrate and the second substrate, wherein the frame sealant is located in the peripheral region and surrounds the display region (SE and fig. 1 where SE surrounds DA); a first liquid crystal layer disposed in a cavity enclosed by the first substrate, the frame sealant and the second substrate (LC); a functional electrode layer disposed on a side of the first substrate proximate to the first liquid crystal layer, wherein the functional electrode layer includes a control electrode located in the peripheral region (E1) and a driving electrode located in the display region (PE), and the control electrode is located on a side of the frame sealant proximate to the display region, and surrounds at least a portion of the display region (fig. 1, E1); a conductive layer disposed between the first substrate and the functional electrode layer, wherein the conductive layer includes a control signal line (fig. 5 SC connected to E1) and at least one driving signal line (PC), a first control signal line and the first control signal line is located on the side of the frame sealant proximate to the display region (see SC); the first control signal line is electrically connected to the control electrode (SC connected to E1); and a portion of a driving signal line is located in the display region, and the driving signal line is electrically connected to the driving electrode (fig. 1 see Source line S); and a common electrode layer, wherein the common electrode layer is disposed between the conductive layer and the functional electrode layer or disposed on a side of the second substrate proximate to the first liquid crystal layer (CE), wherein there is a voltage difference between a control voltage transmitted to the control electrode from the first control signal line and a common voltage transmitted in the common electrode layer (paragraph 48, Adachi describes a potential difference between the shield and common electrode) but does not teach the control signal line includes a second control signal line that are connected to each other and the second control signal line is located on a side of the frame sealant away from the display region.
Kim et al. teach the control signal line includes a second control signal line that are connected to each other and the second control signal line is located on a side of the frame sealant away from the display region. (fig. 1, GL, DL and element 140 seal line. Kim et al. show the control line are both inside the seal line and outside the seal line).
The two are analogous art because they both deal with the same field of invention of displays.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Adachi with the control line placement of Kim et al. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Adachi with the control line placement of Kim et al. because the control lines to be outside the seal line would allow for connection of the control lines to the control circuits and allow for proper display output.
In regard to claim 2, Adachi teaches wherein an orthographic projection of the first control signal line on the first substrate is located between an orthographic projection of the frame sealant on the first substrate and an orthographic projection of the display region on the first substrate (fig. 2, SC between SE and DA), and the orthographic projection of the first control signal line on the first substrate at least partially overlaps with an orthographic projection of the control electrode on the first substrate (fig. 2, SC overlaps E1); and/or a wiring shape of the first control signal line is same as that of the control electrode.
In regard to claim 8, Adachi teaches wherein at least a portion of the first control signal line is in a shape of a grid (see fig. 3, control lines SC), and/or at least a portion of the second control signal line is in a shape of a grid: and/or a minimum distance between an orthographic projection of the control electrode on the first substrate and an orthographic projection of the frame sealant on the first substrate is greater than or equal to 0.2 mm.
In regard to claim 20, Adachi teaches A display device, comprising: a backlight module; a dimming panel disposed on a light-exit side of the backlight module, wherein the dimming panel is the dimming panel according to claim 1; and a display panel disposed on a side of the dimming panel away from the backlight module.
Claim(s) 3 and 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adachi in view of Kim et al. further considered with Luo et al. (US 2020/0371627).
In regard to claim 3, Adachi and Kim et al. teach all the elements of claim 3 wherein the peripheral region includes a first bonding region; and the dimming panel further comprises at least one target pin located in the first bonding region, and the second control signal line is electrically connected to a target pin in the at least one target pin.
Luo et al. teach wherein the peripheral region includes a first bonding region (element 200); and the dimming panel further comprises at least one target pin located in the first bonding region, and the second control signal line is electrically connected to a target pin in the at least one target pin (see fig. 4 where the control lines are connected to the pins 201).
The three are analogous art because they all deal with the same field of invention of displays.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Adachi and Kim et al. with the pins and binding region of Luo et al. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Adachi and Kim et al. with the pins and binding region of Luo et al. because pins in the binding region are notoriously well-known and would work predictably. One of ordinary skill in the art would recognize the structure of Luo et al. would allow for the connection of the display to the drivers and would provide accurate display control.
In regard to claim 4, Luo et al. teach wherein an access end of the second control signal line is spaced apart from the first bonding region (fig. 4 where control line 203 leaves display area); the conductive layer further includes a connection line, a first end of the connection line is bonded to the target pin (fig. 4 where element 203 is connected to pin 201), and a second end of the connection line and the access end of the second control signal line constitute a one-piece structure (see fig. 4 where control line bends at a 90 degree angle); or the conductive layer further includes a connection line, a first end of the connection line is bonded to the target pin, and a second end of the connection line is spaced apart from the access end of the second control signal line; and the functional electrode layer further includes a bridge pattern located on the second end of the connection line and the access end of the second control signal line, and the second end of the connection line is electrically connected to the access end of the second control signal line through the bridge pattern.
Claim(s) 10 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adachi in view of Kim et al. further considered with Ikeda et al. (US 2021/0397051).
In regard to claim 10, Adachi and Kim et al. teach all the elements of claim 10 except wherein the functional electrode layer further includes a transfer electrode located in the peripheral region, and the transfer electrode is disposed on a surface of the frame sealant proximate to the first substrate; the conductive layer further includes a common voltage signal line located in the peripheral region; in a case where the common electrode layer is located between the conductive layer and the functional electrode layer, the transfer electrode is electrically connected to the common electrode layer, and the transfer electrode is further electrically connected to the common voltage signal line; and in a case where the common electrode layer is located on a side of the second substrate proximate to the first liquid crystal layer, the common electrode layer is in contact with the frame sealant, and the frame sealant has conductive particles; and the transfer electrode is electrically connected to the common voltage signal line.
Ikeda et al. teach wherein the functional electrode layer further includes a transfer electrode located in the peripheral region (fig. 16 element PD and paragraph 90), and the transfer electrode is disposed on a surface of the frame sealant proximate to the first substrate (PD disposed on SE); the conductive layer further includes a common voltage signal line located in the peripheral region (CE1); in a case where the common electrode layer is located between the conductive layer and the functional electrode layer, the transfer electrode is electrically connected to the common electrode layer, and the transfer electrode is further electrically connected to the common voltage signal line; and in a case where the common electrode layer is located on a side of the second substrate proximate to the first liquid crystal layer, the common electrode layer is in contact with the frame sealant, and the frame sealant has conductive particles (fig. 16 CN1 connected to SE and CM. see paragraph 89 where CM is described as a conductive member); and the transfer electrode is electrically connected to the common voltage signal line (paragraph 90).
The three are analogous art because they all deal with the same field of invention of displays.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Adachi and Kim et al. with the common electrode connection of Ikeda et al. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Adachi and Kim et al. with the common electrode connection of Ikeda et al. because connecting the common electrode to the power supply through the sealant would reduce the area required for the connections.
In regard to claim 12, Ikeda et al. teach wherein an orthographic projection of the transfer electrode on the first substrate at least partially overlaps with an orthographic projection of the frame sealant on the first substrate (fig. 16, SE and PD are connected).
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adachi in view of Kim et al. further considered with Ma et al. (US 2024/0404443).
In regard to claim 13, Adachi and Kim et al. teach all the elements of claim 13 except wherein a minimum distance between an orthographic projection of the driving electrode on the first substrate and an orthographic projection of the control electrode on the first substrate is greater than or equal to 0.13 mm; and/or the driving signal line is polyline-shaped.
Ma et al. teach wherein a minimum distance between an orthographic projection of the driving electrode on the first substrate and an orthographic projection of the control electrode on the first substrate is greater than or equal to 0.13 mm; and/or the driving signal line is polyline-shaped (paragraph 124).
The three are analogous art because they all deal with the same field of invention of displays.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Adachi and Kim et al. with the polyline shape line of Ma et al. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Adachi and Kim et al. with the polyline shape line of Ma et al. because the polyline shape data line would prevent overlapping between the data line and the anode.
Claim(s) 20, 23 and 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adachi in view of Kim et al. further considered with Chung et al. (US 2024/0369868).
In regard to claim 20, Adachi and Kim et al. teach the dimming panel is the dimming panel according to claim 1 (see claim 1 rejection above) but do not teach a display device, comprising: a backlight module; a dimming panel disposed on a light-exit side of the backlight module; and a display panel disposed on a side of the dimming panel away from the backlight module.
Chung et al. teach a display device, comprising: a backlight module (fig. 28 element 41); a dimming panel disposed on a light-exit side of the backlight module (element 20), and a display panel disposed on a side of the dimming panel away from the backlight module (fig. 23).
The three are analogous art because they all deal with the same field of invention of displays.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Adachi and Kim et al. with the backlight structure of Chung et al. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Adachi and Kim et al. with the backlight structure of Chung et al. because providing a backlight would improve the brightness of the display.
In regard to claim 23, Chung et al. teach a first polarizer disposed between the backlight module and the dimming panel (fig. 28 element 31); a second polarizer disposed between the dimming panel and the display panel, wherein a transmission axis of the second polarizer is parallel to a transmission axis of the first polarizer (element 32 and paragraph 81); and a third polarizer disposed on the display panel, wherein a transmission axis of the third polarizer is perpendicular to the transmission axis of the first polarizer (element 33 and paragraph 81).
In regard to claim 24, Chung et al. teach a privacy film disposed between the backlight module and the dimming panel (fig. 28 element 43); a fourth polarizer disposed between the dimming panel and the display panel (element 32); and a fifth polarizer disposed on the display panel (element 31).
Claim(s) 21 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adachi in view of Kim et al. further considered with Chung et al. and Luo et al.
In regard claim 21, Adachi, Kim et al. and Chung et al. teach all the elements of claim 21 except wherein the peripheral region includes a first bonding region; and the dimming panel further includes at least one target pin located in the first bonding region, and the second control signal line is electrically connected to a target pin in the at least one target pin; and the display device further comprises a flexible circuit board bonded to the target pin in the first bonding region of the dimming panel.
Luo et al. teach wherein the peripheral region includes a first bonding region (fig. 4); and the dimming panel further includes at least one target pin located in the first bonding region, and the second control signal line is electrically connected to a target pin in the at least one target pin (elements 201 and 203 shows the control lines connected to the pin); and the display device further comprises a flexible circuit board bonded to the target pin in the first bonding region of the dimming panel (fig. 3 see FPCB).
The four are analogous art because they all deal with the same field of invention of displays.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Adachi, Kim et al. and Chung et al. with the pins and binding region of Luo et al. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Adachi, Kim et al. and Chung et al. with the pins and binding region of Luo et al. because pins in the binding region are notoriously well-known and would work predictably. One of ordinary skill in the art would recognize the structure of Luo et al. would allow for the connection of the display to the drivers and would provide accurate display control.
In regard to claim 22, Adachi wherein in the dimming panel, the driving electrode in the functional electrode layer includes a plurality of driving electrode blocks, and the at least one driving signal line includes a plurality of driving signal sub-lines (fig. 1 see driving lines for the pixels).
Kim et al. teach the plurality of driving signal sub-lines extend out of a region defined by the frame sealant and extend to the second bonding region (fig. 2, the signal leads go from the display area through the sealant to the non-display area)
Luo et al. teach the peripheral region of the dimming panel further includes a second bonding region, and the second bonding region is located between the first bonding region and the frame sealant of the dimming panel (see fig. 4, the region with signal leads 203 is outside of the display area); and the display device further comprises a driving chip bonded to the second bonding region, and the driving chip is electrically connected to the plurality of driving signal sub-lines (element 300).
Allowable Subject Matter
Claims 6, 7, 11 and 15-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance: In regard to claims 6 and 7, the prior art fails to teach or make obvious the first-fourth sub-lines and the opening arranged opposite the first bonding region in combination with the claim’s other features.
In regard to claim 11, the prior art fails to teach or make obvious the distance between the orthographic projection of the control electrode and transfer electrode.
In regard to claims 15-18, the prior art fails to teach or make obvious the driving signal line and via holes in combination with the claim’s other features.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
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/JOSEPH R HALEY/ Primary Examiner, Art Unit 2621
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