DETAILED ACTION
This Office action is in response to the preliminary amendment filed on January 16, 2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Inventorship
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on January 16, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings were filed on January 16, 2025. These drawings are accepted by the Examiner.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 26, 28-30, 32-41and 48-50 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ikriannikov (U.S. Pat. No. 8, 716, 991 B1).
In re claim 26, Ikriannikov discloses (Fig. 4) a voltage-to-current or current-to-voltage conversion system (400), comprising input terminals and output terminals, and between the input terminals and the output terminals:
a first set and a second set (402(1) and 402(2)), each of the first set and the second set comprising at least one switching cell (Fig. 4), and wherein: the system further comprises a common control device (416) for the first set and the second set, each switching cell comprising:
first switch (404(1)), which can be in an on state or in an off state, and comprising a transistor (Col. 5, lines 15-31), and
a second switch (404(2)), which can be in an on state or an off state, and comprising a transistor and/or a diode (Col. 5, lines 15-31),
so that, for each switching cell, this switching cell oscillates between two states, a first state in which its first switch is on when its second switch is off, and a second state in which its first switch is off when its second switch is on (Col. 5, lines 50-67 and Col. 6, lines 1-38),
the number of switching cells in the system being even (Fig. 4),
each of the first set and the second set comprises the same number of switching cell(s) the at least one switching cell of the first set and the at least one switching cell of the second set being associated in pairs so that each switching cell of the first set is associated with a single switching cell of the second set, and each switching cell of the second set is associated with a single switching cell of the first set (Col. 5, lines 50-67 and Col. 6, lines 1-38),
the control device being arranged and/or programmed to send to the switches of the switching cells a signal arranged to switch the switches between their on state and their off state at a same switching frequency all the switches so that, for each pair of switching cells, the first switch of the switching cell of the first set of the pair is off when the first switch of the switching cell of the second set of the pair is on, and the first switch of the switching cell of the first set of the pair is on when the first switch of the switching cell of the second set of the pair is off (Col. 5, lines 50-67 and Col. 6, lines 1-38).
In re claim 28, Ikriannikov discloses wherein the two sets are connected in parallel between the input terminals and the output terminals: the first set comprising a main converter, each switching cell of the first set being a switching cell of the main converter, and the second set comprising an switched-mode active compensator, each switching cell of the second set being a switching cell of the switched-mode active compensator (Fig. 4).
In re claim 29, Ikriannikov discloses wherein the at least one switching cell of the main converter have a series chopper structure and the at least one switching cell of the compensator have a series chopper structure (Fig. 4).
In re claim 30, Ikriannikov discloses wherein the at least one switching cell of the main converter have a two-quadrant chopper structure and the at least one switching cell of the compensator have a two-quadrant chopper structure (Fig. 4).
In re claim 32, Ikriannikov discloses wherein the second set is arranged to generate a current ripple of the same amplitude but in phase opposition to that generated by the first set (Col. 5, lines 50-67 and Col. 6, lines 1-38).
In re claim 33, Ikriannikov discloses wherein the two first switches of the same pair of switching cells are connected to the same input terminal(s) and output terminal(s) without passing through a transistor or switch (Fig. 4).
In re claim 34, Ikriannikov discloses wherein the two second switches of the same pair of switching cells are connected to the same input terminal(s) and output terminal(s) without passing through a transistor or switch (Fig. 4).
In re claim 35, Ikriannikov discloses (Fig. 4) wherein no switching cell is connected to an input terminal via a transistor (Col. 5, lines 50-67 and Col. 6, lines 1-38).
In re claim 36, Ikriannikov discloses (Fig. 4) wherein no switching cell is connected to an output terminal via a transistor (Col. 5, lines 50-67 and Col. 6, lines 1-38).
In re claim 37, Ikriannikov discloses (Fig. 4) wherein each switching cell is connected to the two input terminals without any intermediate element (Col. 5, lines 50-67 and Col. 6, lines 1-38).
In re claim 38, Ikriannikov discloses (Fig. 4) wherein each switching cell is connected to one of the output terminals without any intermediate element (Col. 5, lines 50-67 and Col. 6, lines 1-38).
In re claim 39, Ikriannikov discloses (Fig. 4) wherein each switching cell is connected to one of the output terminals via an inductor (202(1) and 202(2)).
In re claim 40, Ikriannikov discloses (Fig. 4) wherein each switching cell of the first set is connected to one of the output terminals via an inductor only (Col. 5, lines 50-67 and Col. 6, lines 1-38).
In re claim 41, Ikriannikov discloses (Fig. 4) wherein switching cell of the second set is connected to one of the output terminals via an inductor and a capacitor (Col. 5, lines 50-67 and Col. 6, lines 1-38).
In re claim 48, Ikriannikov discloses (Fig. 4) wherein the transistors of the switching cells comprise MOSFET and/or IGBT and/or GaN FET transistors (Col. 5, lines 15-31).
In re claim 49, Ikriannikov discloses (Fig. 4) a method of controlling the system according to claim 26 (See rejection of claim 26 as explained above), comprising a common control (416), by the control device, of the first set and of the second set, by sending the switches of the switching cells a signal toggling the switches between their on state and their off state at the same switching frequency for all the switches (Col. 5, lines 50-67 and Col. 6, lines 1-38) so that:
for each switching cell, this switching cell oscillates between two states, a first state in which its first switch is on when its second switch is off, and a second state in which its first switch is off when its second switch is on (Col. 5, lines 50-67 and Col. 6, lines 1-38)
for each pair of switching cells, the first switch of the switching cell of the first set of the pair is off when the first switch of the switching cell of the second set of the pair is on, and the first switch of the switching cell of the first set of the pair is on when the first switch of the switching cell of the second set of the pair is off (Col. 5, lines 50-67 and Col. 6, lines 1-38).
In re claim 50, Ikriannikov discloses (Fig. 4) wherein the second set generates a current ripple of the same amplitude but in phase opposition to that generated by the first set (Col. 5, lines 50-67 and Col. 6, lines 1-38).
Allowable Subject Matter
Claims 27, 31 and 42-27 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding to claim 27, the prior art of record fails to disclose or suggest “wherein the switching cells of the first set and of the second set together form a four-quadrant chopper structure” in combination with other limitations of the claim.
Regarding to claim 31, the prior art of record fails to disclose or suggest “wherein the at least one switching cell of the main converter have a four-quadrant chopper structure and the at least one switching cell of the compensator have a four-quadrant chopper structure” in combination with other limitations of the claim.
Regarding to claim 42, the prior art of record fails to disclose or suggest “wherein each switching cell is connected to the two output terminals without any intermediate element” in combination with other limitations of the claim. Claims 43-47 depend directly or indirectly from claim 42 and are, therefore, are also objected at least for the same reasons set above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RAFAEL O. DE LEON DOMENECH whose telephone number is (571)270-0517. The examiner can normally be reached on 8:00 a.m. - 5:00 p.m..
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/RAFAEL O DE LEON DOMENECH/Primary Examiner, Art Unit 2838
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