Prosecution Insights
Last updated: October 01, 2026
Application No. 18/997,101

SOLID-STATE IMAGING ELEMENT, IMAGING SYSTEM, AND METHOD FOR CONTROLLING SOLID-STATE IMAGING ELEMENT

Non-Final OA §103
Filed
Jan 20, 2025
Priority
Jul 26, 2022 — JP 2022-118366 +1 more
Examiner
AGGARWAL, YOGESH K
Art Unit
Tech Center
Assignee
Sony Group Corporation
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
1026 granted / 1144 resolved
+29.7% vs TC avg
Moderate +7% lift
Without
With
+6.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
15 currently pending
Career history
1164
Total Applications
across all art units

Statute-Specific Performance

§101
4.5%
-35.5% vs TC avg
§103
52.4%
+12.4% vs TC avg
§102
36.8%
-3.2% vs TC avg
§112
3.8%
-36.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1144 resolved cases

Office Action

§103
CTNF 18/997,101 CTNF 79985 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 07-30-03-h AIA CLAIM INTERPRETATION 07-30-03 AIA The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. 07-30-05 The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. 07-30-06 This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “a detection processing unit” in claims 6, 8-10. This is described in the specification at Paragraph 129 and fig. 4. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 1, 2, 6-9, 11, 13 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Hashizume et al. (WO2021182190, cited in IDS) {Published on September 16, 2021. US PGPUB 20230098440 is being used as a translation} in view of Beck et al. (US PGPUB 20050200731) . [Claim 1] Hashizume teaches a solid-state imaging element comprising a pixel array unit having an array of a plurality of pixels (figs. 1 and 3, pixel array unit 2), each of the plurality of pixels being configured to generate a pixel signal (Paragraph 48). a vertical scanning circuit (fig. 3, clipping driving unit 4) that drives each of a plurality of rows in the pixel array unit to output the pixel signal (Paragraph 71, fig. 5, First, based on the first control information generated by the first processing unit 25 , the reading range in the vertical line direction for clipping the first pixel region 12 from the effective pixel region 11 is calculated (step S 1 ). The process of step S 1 is performed, for example, by the first processing unit 25 or the clipping driving unit 4 of FIG. 3) ; a signal processing circuit (21) that reads the pixel signal and performs predetermined signal processing on the pixel signal (Paragraph 76, On the other hand, predetermined digital signal processing is performed on the pixel data in the first pixel region 12 output in step S 2 (step S 6 ). The specific content of the predetermined digital signal processing is arbitrary, but noise reduction processing, brightness adjustment, and the like may be performed, for example); and a control circuit (22) that controls at least one of the vertical scanning circuit (4) or the signal processing circuit (Paragraph 69, The external control unit 22 inputs control information and setting information for performing various controls on the imaging device 1 to the imaging device 1 ) to generate compressed data by compressing image data containing an array of the pixel signals (Paragraph 74, The reason for performing the pixel data thinning process in step S 3 is that high-resolution image data is not required for detecting whether or not a moving object is present in the first pixel region 12 , and the moving object can be detected quickly by performing the moving object detection process after the resolution is decreased), and controls at least one of the vertical scanning circuit or the signal processing circuit on a basis of a result of processing the compressed data to output cutout data, the cutout data corresponding to a predetermined region cut out from the image data (Paragraph 48, The pixel array unit 2 has a plurality of pixel circuits 2 a, clips a first pixel region which is a part of an effective pixel region, and outputs pixel data in the first pixel region. The signal processing unit 3 detects and tracks a moving object in the first pixel region based on the pixel data output from the pixel array unit 2 , clips a second pixel region which is a part of the first pixel region, and outputs the pixel data in the second pixel region. The second pixel region is a region of interest (ROI). And Paragraph 75, When a moving object is detected in step S 4 , ROI information including the position where the moving object is detected is output (step S 5 ) ). Hashizume fails to teach and sample and hold the pixel signal. However Beck teaches a sample and hold circuit which may be employed to advantage in active pixel sampling array systems which avoid the source-follower transistor mismatch, current source mismatch, sampling error mismatch, and signal dependent charge injection (Paragraph 6). Therefore taking the combined teachings of Hashizume and Beck, it would be obvious to one skilled in the art before the effective filing date of the invention to have been motivated to have a sample and hold circuit for the pixel signal in order to avoid the source-follower transistor mismatch, current source mismatch, sampling error mismatch, and signal dependent charge injection. [Claim 2] Hashizume teaches wherein the control circuit generates data by thinning out the image data on at least one of a row-by-row basis or a column-by- column basis as the compressed data (Paragraph 51, The thinning unit 6 thins out the pixel data in the first pixel region and outputs low-resolution data. The reason why the thinning unit 6 thins out the pixel data in the first pixel region is to quickly detect and track a moving object. It will be obvious that any pixels that are thinned out will be either in the row or column direction). [Claim 6] Hashizume teaches a detection processing unit that performs predetermined detection processing on the compressed data (Paragraph 74, The reason for performing the pixel data thinning process in step S 3 is that high-resolution image data is not required for detecting whether or not a moving object is present in the first pixel region 12 , and the moving object can be detected quickly by performing the moving object detection process after the resolution is decreased). [Claim 7] Hashizume teaches wherein the signal processing circuit outputs the result of the processing to an outside of the solid-state imaging element (In fig. 4, ROI data is outputted to the outside in step S9). [Claim 8] Hashizume teaches wherein the detection processing unit detects whether or not a face is present (Paragraph 144, For example, the technology according to the present disclosure may be realized as an apparatus mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility , an airplane, a drone, a ship, and a robot). [Claim 9] Hashizume teaches wherein the detection processing unit detects whether or not a person is present (Paragraph 144, For example, the technology according to the present disclosure may be realized as an apparatus mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility , an airplane, a drone, a ship, and a robot). [Claim 11] Hashizume teaches a communication interface that receives the result of the processing and supplies the result to the control circuit (Paragraph 62, The first processing unit 25 performs processing operations of the thinning unit 6 , the moving object detection unit 7 , the clipping control unit 8 , and the coordinate calculation unit 10 in FIG. 2 . More specifically, the first processing unit 25 performs thinning-out of pixel data in the first pixel region 12 , detection of moving objects, and tracking of moving objects. Further, the first processing unit 25 outputs control information (hereinafter referred to as first control information) for performing a second stage of pixel clipping to the second processing unit 2) . [Claim 13] This claim is similar to claim 1 except for a host that performs processing different from the processing on a basis of the cutout data. teaches The signal processing chip 21 performs various types of signal processing on the pixel data in the second pixel region 13 output from the imaging device 1 . The specific content of the signal processing is not limited, but includes, for example, brightness adjustment, noise reduction processing, and the like (Paragraph 66). [Claim 14] This is a method claim corresponding to apparatus claim 1 and is therefore analyzed and rejected based upon apparatus claim 1 . 07-21-aia AIA Claim (s) 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Hashizume et al. (WO2021182190) {Published on September 16, 2021. US PGPUB 20230098440 is being used as a translation}, Beck et al. (US PGPUB 20050200731) and in further view of Sato et al. (US PGPUB 20160205336) . [Claim 3] Hashizume in view of Beck fails to teach wherein the signal processing circuit includes a compression processing unit that generates the compressed data by pixel addition. However Sato teaches an addition data compressor 106 compresses the digital signals obtained through conversion performed by the ADC 105 . More specifically, the addition data compressor 106 compresses the digital signals by using information representing the number of pixels for which pieces of electric charge information are added in the plurality of analog addition patterns, and thereby generates compressed digital signals, Paragraph 97). Therefore taking the combined teachings of Hashizume, Beck and Sato, it would be obvious to one skilled in the art before the effective filing date of the invention to have been motivated to have the signal processing circuit includes a compression processing unit that generates the compressed data by pixel addition in order to transmit the data to the outside more efficiently. [Claim 4] Sato teaches wherein the signal processing circuit further includes a plurality of analog to digital converters that each converts the pixel signal into a digital signal (Paragraph 122, column type ADC), the pixel signal includes an analog signal, and the compression processing unit generates the compressed data by adding the digital signals (Paragraph 97) in order to transmit the data to the outside more efficiently. [Claim 5] Sato teaches wherein the signal processing circuit further includes a plurality of analog to digital converters that each converts the pixel signal into a digital signal (Paragraph 122, column type ADC), the pixel signal includes an analog signal, and the compression processing unit generates the compressed data by adding the pixel signals (Paragraph 121, The analog selective adder 104 performs analog selective addition processing on the electric charge signals of all the pixels held by the electric charge holder 102 on the basis of the multiple sampling information set by the multiple sampling information setter 103 , and thereby generates and outputs new signals (step S 104 ) in order to transmit the data to the outside more efficiently . 07-21-aia AIA Claim (s) 10 is rejected under 35 U.S.C. 103 as being unpatentable over Hashizume et al. (WO2021182190) {Published on September 16, 2021. US PGPUB 20230098440 is being used as a translation}, Beck et al. (US PGPUB 20050200731) and in further view of Crotty et al. (US PGPUB 10090074055) . [Claim 10] Hashizume in view of Beck fails to teach wherein the detection processing unit detects a difference between the compressed data and predetermined background data. However Crotty teaches that at a subsequent time, after this initial part, differences between the original movie and the background field are compressed separately, using the remainder of the available bit budget. These differences are referred to as the correction field. The background field and correction field are produced separately (Paragraph 23). Therefore taking the combined teachings of Hashizume, Beck and Crotty, it would be obvious to one skilled in the art before the effective filing date of the invention to have been motivated to have the detection processing unit detects a difference between the compressed data and predetermined background data in order to send data over different networks with fixed bandwidths. Allowable Subject Matter Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art fails to teach or suggest “each of the plurality of pixels includes: first and second capacitor elements; a pre-stage circuit that sequentially generates the reset level and the signal level and causes the first and second capacitor elements to hold the reset level and the signal level, respectively; a selection circuit that sequentially performs control to connect one of the first and second capacitor elements to a predetermined post-stage node, control to disconnect both of the first and second capacitor elements from the post-stage node, and control to connect another one of the first and second capacitor elements to the post-stage node; a post-stage reset transistor that initializes a level of the post-stage node when both of the first and second capacitor elements are disconnected from the post-stage node; and a post-stage circuit that sequentially reads the reset level and the signal level from the first and second capacitor elements via the post-stage node and outputs the reset level and the signal level”. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to YOGESH K AGGARWAL whose telephone number is (571)272-7360. The examiner can normally be reached Monday - Friday 9:30-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sinh Tran can be reached at 5712727564. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YOGESH K AGGARWAL/Primary Examiner, Art Unit 2637 Application/Control Number: 18/997,101 Page 2 Art Unit: 2637 Application/Control Number: 18/997,101 Page 3 Art Unit: 2637 Application/Control Number: 18/997,101 Page 4 Art Unit: 2637 Application/Control Number: 18/997,101 Page 5 Art Unit: 2637 Application/Control Number: 18/997,101 Page 6 Art Unit: 2637 Application/Control Number: 18/997,101 Page 7 Art Unit: 2637 Application/Control Number: 18/997,101 Page 8 Art Unit: 2637 Application/Control Number: 18/997,101 Page 9 Art Unit: 2637 Application/Control Number: 18/997,101 Page 10 Art Unit: 2637 Application/Control Number: 18/997,101 Page 11 Art Unit: 2637 Application/Control Number: 18/997,101 Page 12 Art Unit: 2637
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Prosecution Timeline

Jan 20, 2025
Application Filed
May 11, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
97%
With Interview (+6.9%)
2y 5m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1144 resolved cases by this examiner. Grant probability derived from career allowance rate.

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