Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 11 and 17 objected to because of the following informalities:
Claim 11 on line 3, the phrase “a second computing element” should be --the second computing element--.
Claim 17 objected due to its dependency.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 10-12, 17 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1).
Re claim 1. STAFFORD discloses (abstract) a control unit [0003, 0020] for a maritime vessel configurable to monitor integrity of an operation and/or data used by a system of the maritime vessel (FIG.1-2 – claim does not explicitly require any water vessel – this phrase interpreted as intended use of control unit), comprising:
a first computing element (i.e. either primary path 102 or reference path 104) configured to process a first input signal to generate a first output; and [0004, 0020] (claim 1)
a second computing element (i.e. either primary path 102 or reference path 104) configured to process a second input signal to generate a second output; [0004, 0020] (claim 1)
wherein the (smart comparator 106 – which could be considered part of the secondary or reference path) is configured to compare the first output with the second output [0004, 0020], and if the first output and the second output do not match within a predetermined tolerance then the first computing element is configured to initiate and/or perform a preventive action (i.e. remedial action).
[0004] In one aspect, an embodiment of an integrated circuit (IC) chip for providing a safety critical value is disclosed. The IC chip includes a first processing path comprising a first processing element, the first processing path coupled to receive a first input signal on a first input pin and to provide a first output signal on an output pin, the first output signal providing the safety-critical value; a second processing path comprising a second processing element, the second processing path coupled to receive a second input signal and to provide a second output signal, the first processing path and the second processing path being independent of each other; and a smart comparator that receives the first output signal and the second output signal and initiates a remedial action responsive to a difference between the first output signal and the second output signal reaching a first threshold, the first threshold being configurable.
[0020] Referring now to FIG. 1, a high-level view of an IC chip 100 for providing a safety-critical value is depicted. IC chip 100 contains both a primary path 102, which is able to receive input 122 from sensor 114 on input pin 108 and provide a control signal 118, which is output on output pin 112 as control signal 126, and a secondary or reference path 104, which is able to receive input signal 124 from sensor 116 on input pin 110 and provide a second control signal 120. IC chip 100 also contains a comparator 106, which receives the control signals 118, 120 from both primary path 102 and reference path 104 to ensure reliability of control signal 118. If the outputs from primary path 102 and reference path 104 do not match within an acceptable range, comparator 106 is able to initiate a remedial action to ensure safety. In the disclosed architecture, instead of redundancy in only specific elements, with buses and other elements shared by the two pathways, the complete signal chain is redundant and the PWM outputs are verified by the hardware-based comparator 106. In one embodiment, this comparison occurs for every PWM transition and results in a lock-stepped PWM output, although it will be understood that the comparison can be based on triggers other than every PWM transition without deviating from the disclosed embodiments. In one embodiment, both primary path 102, reference path 104, and comparator are implemented in hardware.
[0025] Each of the outputs of controllers 206, 226 represents the functionality of the entire signal chain for the respective path. If any of the sub-systems that are a part of the signal chain are faulty, the output will reflect this failure and will be detected with comparison logic. Upon detecting the fault, the comparison logic puts the system into a safe state and reports the error to the CPUs and externally to the system. When the outputs are PWMs, all PWMs will be disabled without requiring software involvement.
However, STAFFORD fails to explicitly disclose:
wherein the first computing element is configured to compare the first output with the second output, and
if the first output and the second output do not match within a predetermined tolerance then the first computing element is configured to initiate and/or perform a preventive action, and
wherein the second computing element is configured to compare the second output with the first output, and
if the first output and the second output do not match within the predetermined tolerance then the second computing element is configured to initiate and/or perform the preventive action.
STEINER teaches (abstract) in similar field of invention, [0016, 0018-0019, 0023, 0030] a processing system in which two distinct processing units, simultaneously compare received first and second sensor data to verify if such data matches. If compared data does not match, the response data is judged as erroneous.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to try having both first and second computing elements of STAFFORD instead of a single comparator, compare first and second output data for a match in order to properly verify the data or determine if another action should be performed, such as an error report.
2. STEINER discloses [0018-0019] The control unit according to claim 1, wherein if the first output and the second output match within the predetermined tolerance then the control unit
the first output, the second output, or both the first output and the second output.
3. STAFFORD [0016] and STEINER [0019] discloses The control unit according to claim 1, wherein the first computing element is configured to:
transmit the first output; and
wrap back the transmitted first output to the second computing element for a comparison, so as to allow the second computing element to compare the second output with the transmitted first output; and
if the second output and the transmitted first output do not match within the predetermined tolerance then the second computing element is configured to initiate and/or perform the preventive action.
4. STAFFORD [0020] and STEINER [0019] discloses The control unit according to claim 1, wherein the preventive action comprises one or more of:
providing a notification that that is indicative of accumulated occurrence of errors; increasing value of a counter, wherein the counter is indicative of accumulated occurrence of errors; disabling transmission of an output of the control unit; transferring control over to another control unit; transferring control over to an alternative control system; providing degraded or limited functionality for users; providing a warning message to the users; monitoring and removing failed redundant input signals; and reporting status of the control unit and integrity of the operation and/or the data to the users.
Re claim 10. As applied for claim 1, a computer-implemented method for monitoring integrity of an operation and/or data used by a system of the maritime vessel, the method comprising:
processing, by a first computing element, a first input signal to generate a first output;
processing, by a second computing element, a second input signal to generate a second output;
comparing, by the first computing element, the first output with the second output; and
initiating and/or performing a preventive action if the first output and the second output do not match within predetermined tolerance.
11. STAFFORD discloses [0003, 0020] The computer-implemented method according to claim 10, comprising:
comparing, by a second computing element, the second output with the first output, and initiating and/or performing the preventive action if the first output and the second output do not match within predetermined tolerance.
12. STAFFORD [0016] and STEINER [0019] discloses The computer-implemented method according to claim 10, comprising:
transmitting the first output;
wrapping back the transmitted first output;
comparing, by the second computing element, the second output with the transmitted first output; and
initiating and/or performing the preventive action if the second output and the transmitted first output do not match within the predetermined tolerance.
17. STAFFORD [0016] and STEINER [0019] discloses The computer-implemented method according to claim 11, comprising:
transmitting the first output;
wrapping back the transmitted first output;
comparing, by the second computing element, the second output with the transmitted first output; and
initiating and/or performing the preventive action if the second output and the transmitted first output do not match within the predetermined tolerance.
Re claim 20. As for claim 1, a control unit for a maritime vessel, the control unit configurable to monitor integrity of an operation and/or data used by a system of the maritime vessel, the control unit comprising:
a first computing element configured to process a first input signal to generate a first output; and
a second computing element configured to process a second input signal to generate a second output;
wherein the first computing element is configured to compare the first output with the second output, and if the first output and the second output do not match within a predetermined tolerance then the first computing element is configured to initiate a preventive action; and
wherein the second computing element is configured to compare the second output with the first output, and if the first output and the second output do not match within the predetermined tolerance then the second computing element is configured to initiate the preventive action;
wherein if the first output and the second output match within the predetermined tolerance then the control unit is configured to transmit a control unit output, wherein the control unit output comprises at least one of the first output, the second output, or both the first output and the second output. [0020]
Claim(s) 5-8 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) further in view of CLINE (US 6658349 B2).
However, STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) fails to explicitly disclose:
5. The control unit according to claim 1, wherein the control unit is configured to monitor and/or control a localised system of the maritime vessel.
6. The control unit according to claim 1, wherein the control unit is configured to monitor and/or control an overall system of the maritime vessel.
7. A computing system for a maritime vessel the computing system comprising: one or more of the control unit according to claim 1.
8. (Currently Amended) The computing system according to claim 7 wherein the one or more of the control unit includes a first control unit and a second control unit, wherein the first control unit is configured to:
perform the operation;
communicate with the second control unit; and
monitor and/or control a localised system of the maritime vessel, such that the first control unit provides data indicative of the localised system to the second control unit.
13. The computer-implemented method according to claim 10, comprising:
monitoring and controlling a localised system of the maritime vessel, and/or an overall system of the maritime vessel.
CLINE (US 6658349 B2) teaches (abstract) in similar field of invention, using a control system for use as part of marine vessel tracking, wherein data signals are monitored for comparison during operation (c.2, l.43-67).
A person of ordinary skill in the art would have recognized that applying the known technique of using a control unit capable of comparing data signal inputs for a maritime vessel would have yielded predictable results and would have improved the performance maritime vessel.
Claim(s) 9 and 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) further in view of CLINE (US 6658349 B2) further in view of KUMAR et al. (US 20260087932 A1).
However, STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) further in view of CLINE (US 6658349 B2) fails to explicitly disclose:
9. (Currently Amended) The computing system according to claim 8 wherein the one or more of the control unit includes a third control unit, wherein the third control unit is configured to:
receive a low integrity input signal; and
transmit the low integrity input signal as a low integrity output to the second control unit and/or the first control unit.
KUMAR et al. (US 20260087932 A1) teaches (abstract) a data processing system including processing a low integrity input signal and transmitting such signal. [0047, 0057-0058, 0067-0068]
A person of ordinary skill in the art would have recognized that applying the known technique of processing low integrity data signals would have yielded predictable results and would have improved the performance maritime vessel.
However, STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) fails to explicitly disclose:
15. (New) The computing system according to claim 8, wherein the one or more of the control unit includes a third control unit, wherein the third control unit is configured to:
communicate with a vehicle plant of the maritime vessel independent of the second control unit and/or the first control unit; and
communicate with a user interface of the maritime vessel independent of the second control unit and the first control unit.
16. (New) The computing system according to claim 9, wherein the one or more of the control unit includes a fourth control unit, wherein the fourth control unit is configured to:
communicate with a vehicle plant of the maritime vessel independent of the second control unit and/or the first control unit; and
communicate with a user interface of the maritime vessel independent of the second control unit and the first control unit.
CLINE further teaches (abstract) other control units to communicate with vehicle plant of maritime vessel (FIG.1-2) which are independent of control unit and communicate with user interface (i.e. communication unit 154).
A person of ordinary skill in the art would have recognized that applying the known technique of using a control unit capable of communication with vehicle plant and user interface would have yielded predictable results and would have improved tracking of maritime vessel.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) further in view of KUMAR et al. (US 20260087932 A1).
However, STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) fails to explicitly disclose:
14. (Currently Amended) The computer-implemented method according to claim 10, comprising:
receiving a low integrity input signal; and
transmitting the low integrity input signal as a low integrity output.
KUMAR et al. (US 20260087932 A1) teaches (abstract) a data processing system including processing a low integrity input signal and transmitting such signal. [0047, 0057-0058, 0067-0068]
A person of ordinary skill in the art would have recognized that applying the known technique of processing low integrity data signals would have yielded predictable results and would have improved the performance maritime vessel.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) further in view of ANDERSON (US 20100094481 A1).
However, STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) fails to explicitly disclose:
18. (New) The computer-implemented method according to claim 10, comprising:
activating an alternative control system, wherein the alternative control system is interlocked with high integrity data and is configured to monitor and/or control a vehicle plant of the maritime vessel independent of the first and second processing elements; and
communicate with a user interface of the maritime vessel independent of the first and second processing elements.
ANDERSON (US 20100094481 A1) teaches (abstract) in similar field of invention, a high integrity control unit, [0053, 0073] of a specific system of the vehicle.
A person of ordinary skill in the art would have recognized that applying the known technique of using an alternative control system with high integrity data with the control system of maritime vessel would have yielded predictable results and would have improved the performance maritime vessel in case higher integrity is needed for specific control functions of vessel.
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) further in view of KUMAR et al. (US 20260087932 A1) further in view of ANDERSON (US 20100094481 A1).
However, STAFFORD et al. (US 20180321305 A1) in view of STEINER et al. (US 20190116105 A1) further in view of KUMAR et al. (US 20260087932 A1) fails to explicitly disclose:
19. (New) The computer-implemented method according to claim 14, comprising:
activating an alternative control system, wherein the alternative control system is interlocked with high integrity data and is configured to monitor and/or control a vehicle plant of the maritime vessel independent of the first and second processing elements; and
communicate with a user interface of the maritime vessel independent of the first and second processing elements.
ANDERSON (US 20100094481 A1) teaches (abstract) in similar field of invention, a high integrity control unit, [0053, 0073] of a specific system of the vehicle.
A person of ordinary skill in the art would have recognized that applying the known technique of using an alternative control system with high integrity data with the control system of maritime vessel would have yielded predictable results and would have improved the performance maritime vessel in case higher integrity is needed for specific control functions of vessel.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CARLOS E GARCIA whose telephone number is (571)270-1354. The examiner can normally be reached M-Th 9-6pm F 9-5pm.
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CARLOS E. GARCIA
Primary Examiner
Art Unit 2686
/Carlos Garcia/Primary Examiner, Art Unit 2686 5/4/2026
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