DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Priority
Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d). The certified copy of Japanese patent application number 2022-131496, filed on August 22, 2022, has been received and made of record.
Response to Arguments
Applicant's arguments filed July 17, 2026 have been fully considered but they are not persuasive.
Applicant argues, with respect to claim 1, that “Neither Seo nor Sugawa teaches or suggests modifying Ikuma such that the first and second overflow-storage capacitive elements are implemented as first and second MIM capacitive elements having different capacitances and further disposed between different wiring layers.” And to support this argument, Applicant states that “[t]he Action identifies where Seo allegedly teaches placement between different wiring layers and where Sugawa allegedly teaches different capacitances, but does not explain why a person of ordinary skill would have combined those teachings to arrive at Applicant's specific two-stage overflow-storage structure. The claim is directed to a particular integrated arrangement in which the charge overflow path extends through first and second MIM capacitive elements that both possess different capacitances and are distributed across different wiring layers. The cited references do not disclose that arrangement and the Office has not established a sufficient rationale for modifying Ikuma to arrive at it.”
In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). In this case, Seo was relied upon for teaching that the use of capacitive elements that are arranged as a stacked layer with respect to other components of the pixel is preferred in order to allow for efficient placement of a signal line (paragraph 0031), and Sugawa was relied upon for teaching that the use of first and second capacitive elements having different capacitances is preferred in order to further widen the dynamic range while efficiently utilizing the pixel area (paragraphs 0090, 0100). Therefore, a person of ordinary skill would have combined those teachings to arrive at Applicant's specific two-stage overflow-storage structure, in order to stack pixel components for efficient placement of a signal line, and to widen the dynamic range while efficiently utilizing the pixel area, as taught by Seo and Sugawa.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4-7, and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Ikuma et al. (US Pub. 2022/0053152), in view of Seo et al. (US Pub. 2020/0260025), and further in view of Sugawa et al. (US Pub. 2009/0045319).
In regard to claim 1, note Ikuma discloses a solid-state imaging device comprising a plurality of pixels that each include a photoelectric conversion element and a plurality of wiring capacitive elements (paragraphs 0154-0155, 0170-0173, 0265, figure 1: 3, 10, and figures 3A & 24A: PD, C1, C2), and a read-out circuit that reads out signals from the plurality of pixels (paragraph 0154, and figure 1: 12, 14, 20), wherein the solid-state imaging device has a structure that a charge having overflown from the photoelectric conversion element is stored in a first wiring capacitive element, and the charge having overflown from the first wiring capacitive element is stored in a second wiring capacitive element (paragraphs 0178-0181, 0267-0270, and figures 3A & 24A: PD, C1, C2; the charge of the photodiode overflows into both capacitive elements C1 and C2), and the read-out circuit individually reads out a signal of each of the photoelectric conversion element, the first wiring capacitive element, and the second wiring capacitive element (paragraphs 0314-0321, and figures 27-28; the photoelectric conversion element and the capacitive elements C1 and C2 are individually read out as HCG-S, MCG-S, and LCG-S), and wherein the first wiring capacitive element and the second wiring capacitive element are a first MIM capacitive element and a second MIM capacitive element (paragraphs 0173 and 0191).
Therefore, it can be seen that the primary reference fails to explicitly disclose that the first wiring capacitive element and the second wiring capacitive element are disposed between different wiring layers, and that the first and second capacitive elements have different capacitances.
In analogous art, Seo discloses an imaging device that includes the use of wiring capacitive elements that are arranged as a stacked layer with respect to other components of the pixel (paragraphs 0031, 0035-0036, and figure 2: Cdr). Seo teaches that the use of capacitive elements that are arranged as a stacked layer with respect to other components of the pixel is preferred in order to allow for efficient placement of a signal line (paragraph 0031). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference such that the first wiring capacitive element and the second wiring capacitive element are disposed between different wiring layers, in order to allow for efficient placement of a signal line, as suggested by Seo.
Also in analogous art, Sugawa discloses an imaging device, with each pixel having first and second capacitive elements, and wherein each of the first and second capacitive elements have different capacitances (paragraphs 0090, 0100). Sugawa teaches that the use of first and second capacitive elements having different capacitances is preferred in order to further widen the dynamic range while efficiently utilizing the pixel area (paragraphs 0090, 0100). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference such that the first and second capacitive elements have different capacitances, in order to further widen the dynamic range while efficiently utilizing the pixel area, as suggested by Sugawa.
In regard to claim 4, note Ikuma discloses that the first and second capacitive elements are MIM capacitors (paragraphs 0173, 0191), and Sugawa discloses that first and second capacitive elements have different capacitances (paragraphs 0090, 0100). Furthermore, the Examiner notes that based on the properties of a capacitor, it is considered inherent that at least one of the film types, thicknesses, and areas of dielectrics would have to be different, in order to vary the capacitance between the first and second capacitive elements (i.e., at least one of these characteristics would have to be different in order to have two capacitors of different capacity).
In regard to claim 5, note Ikuma discloses that the first MIM capacitive element and the second MIM capacitive element have three-dimensional structures (paragraphs 0173, 0191; each of the capacitive elements is considered to be a three-dimensional MIM capacitor).
In regard to claim 6, note Ikuma discloses that the solid-state imaging device is structured such that the charge having overflown from the photoelectric conversion element overflows to the first wiring capacitive element from an overflow path different from a path of a transfer gate that transfers the charge stored in the photoelectric conversion element (paragraphs 0177-0181, 0267-0270, and figures 8A & 24A: OF1, OF2, TG; the overflow path is considered to be formed through the overflow transistors OF1 and OF2, which form a path different than the path through transfer gate TG).
In regard to claim 7, note Ikuma discloses a solid-state imaging device comprising a plurality of pixels that each include a plurality of photoelectric conversion elements and a plurality of wiring capacitive elements (paragraphs 0154-0155, 0170-0173, 0265, figure 1: 3, 10, and figures 3A & 24A: PD, C1, C2; each pixel cell includes two photoelectric conversion elements PD, and plural capacitive elements C1 and C2), and a read-out unit that reads out signals from the plurality of pixels (paragraph 0154, and figure 1: 12, 14, 20), wherein the solid-state imaging device has a structure that a first wiring capacitive element and a second wiring capacitive element are respectively connected to floating diffusions of a first photoelectric conversion element and a second photoelectric conversion element, and a charge having overflown from the first photoelectric conversion element is stored in the first wiring capacitive element, and the charge having overflown from the second photoelectric conversion element is stored in the second wiring capacitive element (paragraphs 0178-0181, 0267-0270, and figures 3A & 24A: FD1, PD, C1, C2; the charge from each photoelectric conversion element overflows into both respective capacitive elements C1 and C2), and the read-out unit individually reads out a signal of each of the first photoelectric conversion element, the second photoelectric conversion element, the first wiring capacitive element, and the second wiring capacitive element (paragraphs 0314-0321, and figures 27-28; signals HCG-S is considered to be readout for each photoelectric conversion element and signals MCG-S and LCG-S are considered to be read out from the capacitive elements), and wherein the first wiring capacitive element and the second wiring capacitive element are a first MIM capacitive element and a second MIM capacitive element (paragraphs 0173 and 0191).
Therefore, it can be seen that the primary reference fails to explicitly disclose that the first wiring capacitive element and the second wiring capacitive element are disposed between different wiring layers, and that the first and second capacitive elements have different capacitances.
In analogous art, Seo discloses an imaging device that includes the use of wiring capacitive elements that are arranged as a stacked layer with respect to other components of the pixel (paragraphs 0031, 0035-0036, and figure 2: Cdr). Seo teaches that the use of capacitive elements that are arranged as a stacked layer with respect to other components of the pixel is preferred in order to allow for efficient placement of a signal line (paragraph 0031). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference such that the first wiring capacitive element and the second wiring capacitive element are disposed between different wiring layers, in order to allow for efficient placement of a signal line, as suggested by Seo.
Also in analogous art, Sugawa discloses an imaging device, with each pixel having first and second capacitive elements, and wherein each of the first and second capacitive elements have different capacitances (paragraphs 0090, 0100). Sugawa teaches that the use of first and second capacitive elements having different capacitances is preferred in order to further widen the dynamic range while efficiently utilizing the pixel area (paragraphs 0090, 0100). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference such that the first and second capacitive elements have different capacitances, in order to further widen the dynamic range while efficiently utilizing the pixel area, as suggested by Sugawa.
In regard to claim 10, note Ikuma discloses that the first and second capacitive elements are MIM capacitors (paragraphs 0173, 0191), and Sugawa discloses that first and second capacitive elements have different capacitances (paragraphs 0090, 0100). Furthermore, the Examiner notes that based on the properties of a capacitor, it is considered inherent that at least one of the film types, thicknesses, and areas of dielectrics would have to be different, in order to vary the capacitance between the first and second capacitive elements (i.e., at least one of these characteristics would have to be different in order to have two capacitors of different capacity).
In regard to claim 11, note Ikuma discloses that the first MIM capacitive element and the second MIM capacitive element have three-dimensional structures (paragraphs 0173, 0191; each of the capacitive elements is considered to be a three-dimensional MIM capacitor).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Ikuma et al. (US Pub. 2022/0053152), in view of Seo et al. (US Pub. 2020/0260025), and Sugawa et al. (US Pub. 2009/0045319), and further in view of Qiao et al. (US Pub. 2025/0247635).
In regard to claim 12, note the primary reference of Ikuma in view of Seo and Sugawa discloses a solid-state imaging device, as discussed with respect to claim 1 above. Therefore, it can be seen that the primary reference fails to explicitly disclose that the first photoelectric conversion element and the second photoelectric conversion element have different sensitivities.
In analogous art, Qiao discloses the use of an imaging device that includes a pixel array in which each pixel includes a first photoelectric conversion element and a second photoelectric conversion element having different sensitivities (paragraphs 0007-0011, and figure 1: SPD, LPD). Qiao teaches that the use of a first photoelectric conversion element and a second photoelectric conversion element having different sensitivities is preferred in order to obtain signals with different levels of conversion gain for dynamic range expansion (paragraphs 0007-0011). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference such that the first photoelectric conversion element and the second photoelectric conversion element have different sensitivities, in order to obtain signals with different levels of conversion gain for dynamic range expansion, as suggested by Qiao.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/C.Y./Examiner, Art Unit 2638
/LIN YE/Supervisory Patent Examiner, Art Unit 2638
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