Prosecution Insights
Last updated: October 02, 2026
Application No. 18/998,158

POWER SOURCE CONTROL DEVICE, POWER SOURCE CONTROL SYSTEM, POWER SOURCE CONTROL METHOD, AND POWER SOURCE CONTROL PROGRAM

Non-Final OA §103
Filed
Jan 24, 2025
Priority
Jul 27, 2022 — nonprovisional of PCTJP2022029035
Examiner
NGUYEN, PHIL K
Art Unit
2176
Tech Center
2100 — Computer Architecture & Software
Assignee
Nippon Telegraph and Telephone Corporation
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
453 granted / 549 resolved
+27.5% vs TC avg
Moderate +14% lift
Without
With
+14.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
19 currently pending
Career history
567
Total Applications
across all art units

Statute-Specific Performance

§101
7.3%
-32.7% vs TC avg
§103
52.7%
+12.7% vs TC avg
§102
19.9%
-20.1% vs TC avg
§112
12.0%
-28.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 549 resolved cases

Office Action

§103
DETAILED ACTION Claims 1-7 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 7 is objected for improper dependent form. Appropriate action required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3-7 are rejected under 35 U.S.C. 103 as being unpatentable over Bernat (US 20200073464 A1) and in view of Miyoshi (US 20130246679 A1). Regarding claim 1, Bernat discloses a power source control device [Figs. 1, 6, 8 and 9] comprising: a power source supply unit that individually supplies power source to each accelerator; a controller that selects the accelerator to be a target of power control as a target accelerator and selects a power source control method for the target accelerator based on usage status and load status of each accelerator used by each application [0081][0082: set the power utilization limit of each accelerator device 1620, 1622 to ensure that the total power budget for the accelerator sled 1610 is not exceeded and to selectively increase or decrease the power utilization limit for each accelerator device 1620, 1622 (e.g., by increasing the frequency and/or voltage) to enable the corresponding kernel to satisfy the target performance specified in the SLA data (e.g., based on the profile data obtained by the management controller interface logic unit 1700 and based on predictions in power utilizations from the prediction logic unit 1702)][0083-0090]; and Bernat does not explicitly disclose a control instruction unit that instructs the application using the target accelerator to perform processing of releasing the target accelerator, and instructs the power source supply unit to perform power source control of the target accelerator after the application using the target accelerator no longer exists. Miyoshi discloses a control instruction unit that instructs the application using the target accelerator to perform processing of releasing the target accelerator, and instructs the power source supply unit to perform power source control of the target accelerator after the application using the target accelerator no longer exists [0078: the release control unit 28b retrieves the accelerator mounting information DB 24 (S302), and determines whether or not the corresponding accelerator used by the application is present in the expansion I/O box 10 (S303). In other words, the release control unit 28b determines whether or not there is an in use accelerator][0079: Then, when it is determined that the corresponding accelerator is present in the expansion I/O box 10 (Yes in S303), the release control unit 28b generates an interrupt, outputs the interrupt to the processor of the server, and instructs the processor of the server to execute HotRemove (S304) [0080: Next, the release control unit 28b outputs a transition instruction to enter the power saving mode to the accelerator in order to change the state of accelerator which is being used by the server from the in use state to the standby state (S305)][0054][0077-0082]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bernat and Miyoshi together because they both directed to control the power states of the accelerators. Miyoshi’s disclosing of instructing the application using the target accelerator to perform processing of releasing the target accelerator and instructs the power source supply unit to perform power source control of the target accelerator after the application using the target accelerator no longer exists would allow Bernat to avoid interrupting active work while still enabling power saving method safely. Regarding claim 3, Bernat discloses the power source control device according to claim 1, wherein the controller selects an optimum power source control method based on the load status of each of the accelerators and characteristics of each of the power source control methods [0081-0090]. Regarding claim 4, Barnat discloses a power source control device comprising: a power source supply unit that individually supplies power source to each hardware [each accelerator device] used as an offload destination by each application; a controller that selects the hardware to be a target of power control as target hardware based on information obtained from each application and selects a power source control method for the target hardware [0081][0082: set the power utilization limit of each accelerator device 1620, 1622 to ensure that the total power budget for the accelerator sled 1610 is not exceeded and to selectively increase or decrease the power utilization limit for each accelerator device 1620, 1622 (e.g., by increasing the frequency and/or voltage) to enable the corresponding kernel to satisfy the target performance specified in the SLA data (e.g., based on the profile data obtained by the management controller interface logic unit 1700 and based on predictions in power utilizations from the prediction logic unit 1702)][0083-0090]; and Bernat does not explicitly disclose a control instruction unit that instructs the application using the target hardware to perform processing of releasing the target hardware, and instructs the power source supply unit to perform power source control of the target hardware after the application using the target hardware no longer exists. Miyoshi discloses a control instruction unit that instructs the application using the target hardware to perform processing of releasing the target hardware, and instructs the power source supply unit to perform power source control of the target hardware after the application using the target hardware no longer exists [0078: the release control unit 28b retrieves the accelerator mounting information DB 24 (S302), and determines whether or not the corresponding accelerator used by the application is present in the expansion I/O box 10 (S303). In other words, the release control unit 28b determines whether or not there is an in use accelerator][0079: Then, when it is determined that the corresponding accelerator is present in the expansion I/O box 10 (Yes in S303), the release control unit 28b generates an interrupt, outputs the interrupt to the processor of the server, and instructs the processor of the server to execute HotRemove (S304) [0080: Next, the release control unit 28b outputs a transition instruction to enter the power saving mode to the accelerator in order to change the state of accelerator which is being used by the server from the in use state to the standby state (S305)][0054][0077-0082]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bernat and Miyoshi together because they both directed to control the power states of the accelerators. Miyoshi’s disclosing of instructing the application using the target accelerator to perform processing of releasing the target accelerator and instructs the power source supply unit to perform power source control of the target accelerator after the application using the target accelerator no longer exists would allow Bernat to avoid interrupting active work while still enabling power saving method safely. Regarding claim 5, Barnet discloses a power source control system comprising a power source control device and an accelerator accommodation device, wherein the accelerator accommodation device includes a power source supply unit that individually supplies power source to each accelerator accommodated by the accelerator accommodation device, and the power source control device includes: a controller that selects the accelerator to be a target of power control as a target accelerator and selects a power source control method for the target accelerator based on usage status and load status of each of the accelerators used by each application [0081][0082: set the power utilization limit of each accelerator device 1620, 1622 to ensure that the total power budget for the accelerator sled 1610 is not exceeded and to selectively increase or decrease the power utilization limit for each accelerator device 1620, 1622 (e.g., by increasing the frequency and/or voltage) to enable the corresponding kernel to satisfy the target performance specified in the SLA data (e.g., based on the profile data obtained by the management controller interface logic unit 1700 and based on predictions in power utilizations from the prediction logic unit 1702)][0083-0090]; and Barnat does not explicitly disclose a control instruction unit that instructs the application using the target accelerator to perform processing of releasing the target accelerator, and instructs the power source supply unit to perform power source control of the target accelerator after the application using the target accelerator no longer exists. Miyoshi discloses a control instruction unit that instructs the application using the target accelerator to perform processing of releasing the target accelerator, and instructs the power source supply unit to perform power source control of the target accelerator after the application using the target accelerator no longer exists [0078: the release control unit 28b retrieves the accelerator mounting information DB 24 (S302), and determines whether or not the corresponding accelerator used by the application is present in the expansion I/O box 10 (S303). In other words, the release control unit 28b determines whether or not there is an in use accelerator][0079: Then, when it is determined that the corresponding accelerator is present in the expansion I/O box 10 (Yes in S303), the release control unit 28b generates an interrupt, outputs the interrupt to the processor of the server, and instructs the processor of the server to execute HotRemove (S304) [0080: Next, the release control unit 28b outputs a transition instruction to enter the power saving mode to the accelerator in order to change the state of accelerator which is being used by the server from the in use state to the standby state (S305)][0054][0077-0082]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bernat and Miyoshi together because they both directed to control the power states of the accelerators. Miyoshi’s disclosing of instructing the application using the target accelerator to perform processing of releasing the target accelerator and instructs the power source supply unit to perform power source control of the target accelerator after the application using the target accelerator no longer exists would allow Bernat to avoid interrupting active work while still enabling power saving method safely. Regarding claim 6, Barnet discloses a power source control method wherein implemented by a power source control device includes including a power source supply unit, a controller, and a control instruction unit, the method comprising: the power source supply unit individually supplies supplying power source individually to each accelerator, the supplying executed by the power source supply unit, the controller selects selecting the accelerator to be a target of power control as a target accelerator and selects selecting a power source control method for the target accelerator based on usage status and load status of each accelerator used by each application, the selecting both executed by the controller [0081][0082: set the power utilization limit of each accelerator device 1620, 1622 to ensure that the total power budget for the accelerator sled 1610 is not exceeded and to selectively increase or decrease the power utilization limit for each accelerator device 1620, 1622 (e.g., by increasing the frequency and/or voltage) to enable the corresponding kernel to satisfy the target performance specified in the SLA data (e.g., based on the profile data obtained by the management controller interface logic unit 1700 and based on predictions in power utilizations from the prediction logic unit 1702)][0083-0090], and Miyoshi discloses the control instruction unit instructs instructing the application using the target accelerator to perform processing of releasing the target accelerator, and instructs instructing the power source supply unit to perform power source control of the target accelerator after no application uses the target accelerator, the instructing both executed by the control instruction unit [0078: the release control unit 28b retrieves the accelerator mounting information DB 24 (S302), and determines whether or not the corresponding accelerator used by the application is present in the expansion I/O box 10 (S303). In other words, the release control unit 28b determines whether or not there is an in use accelerator][0079: Then, when it is determined that the corresponding accelerator is present in the expansion I/O box 10 (Yes in S303), the release control unit 28b generates an interrupt, outputs the interrupt to the processor of the server, and instructs the processor of the server to execute HotRemove (S304) [0080: Next, the release control unit 28b outputs a transition instruction to enter the power saving mode to the accelerator in order to change the state of accelerator which is being used by the server from the in use state to the standby state (S305)][0054][0077-0082]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bernat and Miyoshi together because they both directed to control the power states of the accelerators. Miyoshi’s disclosing of instructing the application using the target accelerator to perform processing of releasing the target accelerator and instructs the power source supply unit to perform power source control of the target accelerator after the application using the target accelerator no longer exists would allow Bernat to avoid interrupting active work while still enabling power saving method safely. Regarding claim 7, this claim is rejected for the same reasons as set forth in claim 1. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Bernat (US 20200073464 A1) and in view of Miyoshi (US 20130246679 A1) in further view of Bernat (US 20180150343 A1) hereinafter referred to as Bernat_2nd. Regarding claim 2, Miyoshi and Bernat do not explicitly disclose the power source control device according to claim 1, wherein the power source supply unit is configured to individually supply power source to each power domain obtained by grouping a plurality of the accelerators, instead of a configuration in which the power source supply unit individually supplies power source to each accelerator; and the controller selects the plurality of the accelerators belonging to a same power domain as the target accelerators to be targets of the power source control simultaneously. However, Bernat_2nd discloses wherein the power source supply unit is configured to individually supply power source to each power domain obtained by grouping a plurality of the accelerators, instead of a configuration in which the power source supply unit individually supplies power source to each accelerator; and the controller selects the plurality of the accelerators belonging to a same power domain as the target accelerators to be targets of the power source control simultaneously [0048: the system 1200 may include a different number of power domains and each power domain may include a different number of compute sleds 1204, storage sleds 1206, memory sleds 1208, resource sleds 1210, and/or other sleds (e.g., accelerator sleds)... The resource manager server 1202 may support a cloud operating environment, such as OpenStack, and the compute sled 1204, the storage sled 1206, the memory sled 1208, and the other resource sled 1210 may execute one or more applications or processes (i.e., workloads), such as in virtual machines or containers, on behalf of a user of the client device 1214][0049][0064][0084]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bernat, Miyoshi together for the same reasons disclosed above. It would have further been obvious before the effective filing date of the claimed invention to combine the teachings of Bernat_2nd into the disclosure of Bernat and Miyoshi to increase the integrity and efficient by controlling multiple accelerators in group simultaneously. Conclusion Examiner's note: Examiner has cited particular paragraphs and columns and line numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner (see MPEP § 2123). Any inquiry concerning this communication or earlier communications from the examiner should be directed to PHIL K NGUYEN whose telephone number is (571)270-3356. The examiner can normally be reached 9:30 a.m - 5 p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jaweed Abbaszadeh can be reached at (571)270-1640. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PHIL K NGUYEN/Primary Examiner, Art Unit 2176
Read full office action

Prosecution Timeline

Jan 24, 2025
Application Filed
Aug 25, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
97%
With Interview (+14.2%)
2y 8m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 549 resolved cases by this examiner. Grant probability derived from career allowance rate.

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