Prosecution Insights
Last updated: October 26, 2026
Application No. 18/998,242

POWER MODULE AND METHOD FOR PRODUCING THE POWER MODULE

Non-Final OA §102§103
Filed
Jan 24, 2025
Priority
Jul 28, 2022 — DE 10 2022 207 767.9 +1 more
Examiner
BUI, HUNG S
Art Unit
2841
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Magna Powertrain GmbH & Co. Kg
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
1457 granted / 1667 resolved
+19.4% vs TC avg
Moderate +10% lift
Without
With
+10.1%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
23 currently pending
Career history
1702
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
56.1%
+16.1% vs TC avg
§102
37.9%
-2.1% vs TC avg
§112
1.8%
-38.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1667 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. 10-2022207767.9, filed on 07/28/2022 in Germany. Information Disclosure Statement The IDS filed on 01/24/2025 has been considered and made of record. Oath/Declaration The oath/declaration filed on 09/25/2026 is acceptable. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2, 4 and 11-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Taya et al. [US 2022/0173583]. Regarding claim 1, Taya et al., disclose a power module (101, figures 1-11) comprising: at least two mutually parallel conductor rails (1a//1b, figures 2-3D and 7), an insulating foil (2, figures 2-3D and 7) which lies flat along a longitudinal direction (a horizontal direction of figures 2-3D and 7) of the conductor rails, wherein the conductor rails are separated from one another by the insulating foil and wherein the conductor rails are overmolded with an insulating injection molding material in an overmold (3, figures 2-3D and 7), wherein the insulating foil has a projection (at least one projection of the insulating foil 2 is extended over the two conductor ends 1a and/or 1b, figures 2-3D and 7) along the longitudinal direction that forms a fused connection with the injection molding material of the overmold in an overlapping region (a central portion which is closed to a hole 20h, figures 2-3D and 7, paragraph 0027). Regarding claim 2, Taya et al., further disclose wherein the insulating foil (2, figures 2-3D and 7) is arranged between the conductor rails. Regarding claim 4, Taya et al., further disclose wherein the insulating foil has a projection (at least one projection of the insulating foil 2 is extended over the two conductor ends 1a and/or 1b along the transverse, figures 4-5) along the transverse direction of the conductor rails, which overhangs the end faces of the conductor rails in a contact region. Regarding claim 11, Taya et al., further disclose wherein a region (a central portion which is closed to a hole 20h, figures 2-3D and 7, paragraph 0027) of the conductors rails extend out of the overmold in the longitudinal direction. Regarding claim 12, Taya et al., further disclose wherein a portion of the projection (at least one projection of the insulating foil 2 is extended over the two conductor ends 1a and/or 1b, figures 2-3D and 7) extends out from the overmold in the longitudinal direction and is not fused with the overmold material. Regarding claim 13, Taya et al., further disclose wherein a further projection (at least one projection of the insulating foil 2 is extended over the two conductor ends 1a and/or 1b along the transverse, figures 4-5) extends in a transverse direction of the conductor rails outside of the overmold and is not fused with the overmold material. Regarding claim 14, Taya et al., further disclose wherein overmold material (3, figures 2-3D) is not disposed between the conductor rails (1a & 1b, figures 2-3D). Regarding claim 15, Taya et al., further disclose wherein the conductor rails are spaced apart at a distance that is smaller than a thickness of the overmold (figures 2-3D and 7). Regarding claim 16, Taya et al., further disclose wherein the overmold has a thickness that is greater in the overlapping region relative to its thickness across a face of the conductor rails (figures 2-3D and 7). Regarding claim 17, Taya et al., further disclose wherein the overmold extends fully around the insulating foil and the conductor rails in the lateral direction (figures 2-3D and 7). Regarding claim 18, Taya et al., further disclose wherein the insulating foil (2, figures 2-3D and 7) is defined by an insulating layer that coats of at least one of the conductor rails (1a, figures 2-3D and 7). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3 and 6-10 are rejected under 35 U.S.C. 103 as being unpatentable over Taya et al., in view of Schneider et al. [US 2018/0049310]. Regarding claim 3, Taya et al., disclose the claimed invention except for wherein the insulating foil between the conductor rails is adhesively bonded to at least one of the two conductor rails. Schneider et al., disclose a multilayer bus board (figure 7B) comprising two conductor rails (471 & 472, figure 7B) arranged in a parallel each other, and at least one insulating layer (473, figure 7B) is sandwiched between the two conductor rails, and wherein the insulating layer between the two conductor rails is adhesively bonded to at least one of the two conductor rails (475, paragraph 0085). It would have been to one of ordinary skill in the art at the time the invention was made to use an adhesive material to glue between an insulating foil and at least one conductor rail(s) in an electronic module of Taya et al., as suggested by Schneider et al., in order to secure a conductor rail on an insulating foil of an electronic module. Regarding claim 6, Taya et al., disclose a method for producing a power module as claimed in claim 1, the method comprising introducing the conductor rails (1a//1b, figures 2-3D and 7), and the insulating foil (2, figures 2-3D and 7), which is arranged between the conductor rails, and retaining the insulating foil in the one of the conductor rails (figures 2-3D and 7). Taya et al., disclose the claimed invention except for introducing the conductor rails, and the insulating foil, which is arranged between the conductor rails, into an injection-molding tool, and overmolding the conductor rails with the overmold material, and bonding the insulating foil to the overmold material by fusion in the overlapping region. Schneider et al., further disclose a method for an electronic device, wherein the method comprises an introducing the conductor rails (310, figures 4A-4C), and the insulating foil (320, figures 4A-4C), which is arranged between the conductor rails (figure 4A), into an injection-molding tool (paragraph 0096), and overmolding (330, figures 4A-4C) the conductor rails with the overmold material (PolyOne PPA35GF, paragraph 0076), and bonding the insulating foil to the overmold material by fusion in the overlapping region (paragraph 0085). It would have been to one of ordinary skill in the art at the time the invention was made to use the method steps of Schneider et al., in an electronic device of Taya et al., in order to provide permanently bonding two or more materials into a single integrated component. Regarding claim 7, Taya et al., in view of Scheider et al., further disclose wherein the insulating foil is mechanically retained in the injection molding tool or on one of the conductor rails (2, figures 2-3D and 7; paragraphs 0027-0028). Regarding claim 8, Taya et al., disclose the claimed invention except for wherein the insulating foil is at least partially adhesively bonded by an adhesive material to one of the conductor rails. Schneider et al., disclose a multilayer bus board (figure 7B) comprising two conductor rails (471 & 472, figure 7B) arranged in a parallel each other, and at least one insulating layer (473, figure 7B) is sandwiched between the two conductor rails, and wherein the insulating foil is at least partially adhesively bonded by an adhesive material to one of the conductor rails (475, paragraph 0085). It would have been to one of ordinary skill in the art at the time the invention was made to use an adhesive material to glue a portion of the insulating foil and at least one conductor rail(s) in an electronic module of Taya et al., as suggested by Schneider et al., in order to secure a conductor rail on an insulating foil of an electronic module. Regarding claim 9, Taya et al., disclose the claimed invention except for wherein the insulating foil is adhesively bonded to at least one of the conductor rails prior to the overmolding. Schneider et al., disclose a multilayer bus board (figure 7B) comprising two conductor rails (471 & 472, figure 7B) arranged in a parallel each other, and at least one insulating layer (473, figure 7B) is sandwiched between the two conductor rails, and wherein the insulating foil is adhesively bonded to at least one of the conductor rails prior to the overmolding (475, paragraph 0085). It would have been to one of ordinary skill in the art at the time the invention was made to use an adhesive material to glue a portion of the insulating foil and at least one conductor rail(s) prior to the overmolding of an electronic module of Taya et al., as suggested by Schneider et al., in order to secure a conductor rail on an insulating foil of an electronic module. Regarding claim 10, Taya et al., in view of Schneider et al., further disclose wherein at least one of the conductor rails (1a, figures 2-3D and 7) is coated with a thin insulating layer (2, figures 2-3D and 7) that defines the insulating foil. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Taya et al. Regarding claim 5, Taya et al., disclose wherein the insulating foil has a gauge that is smaller than a thickness of the overmold by a factor of 1-4 (a thickness of the insulating foil is similar to a thickness 1a, 1b and a top thickness and/or a bottom thickness of the molded 3, figure 2). Taya et al., disclose the claimed invention except for wherein the insulating foil has a gauge that is smaller than a thickness of the overmold by a factor of 10 -20. It would have been to one of ordinary skill in the art at the time the invention was made to set an insulating foil having a gauge that is smaller than a thickness of the overmold by a factor of 10 -20, in an electronic module of Taya et al., in order to maintain flexible component spacing and prevent injection molding defects in an electronic device. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Lietz [US 7,687,721] discloses multi-layered electrical flat strip conductor; Harwath [US 2013/0037299] discloses strip-line RF transmission cable; and Benavides [US 9,979,173] discloses bus bar assembly and method of manufacturing same. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Hung S. Bui whose telephone number is (571)272-2102. The examiner can normally be reached on M-F: 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Allen L. Parker can be reached on (303) 297-4722. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center. for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HUNG S. BUI/ Primary Examiner Art Unit 2841 /HUNG S. BUI/Primary Patent Examiner, 2841/2800
Read full office action

Prosecution Timeline

Jan 24, 2025
Application Filed
Oct 05, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
98%
With Interview (+10.1%)
2y 1m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1667 resolved cases by this examiner. Grant probability derived from career allowance rate.

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