CTNF 18/999,262 CTNF 98976 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1-3 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al (US 20200116435; “Lee” hereinafter), in view of Foster (US 7629674; “Foster” hereinafter), and further in view of Kageyama et al (US 20160021748; “Kageyama” hereinafter) . Regarding claim 1 , Lee teaches: a system (figs. 1-29) comprising: a printed circuit board (910, fig. 9) oriented along a first plane (plane where 910 is oriented) , the printed circuit board having a device (912, fig. 9) that extends in a direction away from the first plane (extending up and away from 910, fig. 9) and is capable of producing a radiated signal or is sensitive to a radiated signal produced by another device (see at least ¶[0137]) ; a component shield (920, fig. 9) having a wall structure (vertical portion of 920) and a cover structure (horizontal portion of 920) , the wall structure oriented perpendicular to the first plane (at 921, fig. 9) , and the cover structure connected to the wall structure and oriented parallel to the first plane (as depicted in fig. 9) ; a housing structure (vertical portion of 940) oriented along a second plane (plane above first plane at 910, fig. 9) , the second plane being substantially parallel to the first plane (fig. 9) , and defining a shielded space (space where 912, 930 and/or 932 occupies) within which the component shield and the device reside (fig. 9) ; a shielding layer (922, fig. 9) oriented along a third plane (plane where 940 is oriented) substantially parallel with the second plane (fig. 9) , the shielding layer being disposed at least partially between the cover structure and the housing structure (fig. 9) and configured to attenuate radiated signals (¶[0137]) . Lee does not explicitly teach: a capacitor spot weld affixing the shielding layer to the cover structure. However, Foster teaches: a spot weld (146, fig. 2, col. 5, line 67-col. 6, line 1 ; the term “spot” is given limited patentable weight to the extent it imparts a further structural limitation to the device as claimed; in the instant case Foster showing specific locations at which the elements are welded is sufficient to be considered a spot or spots ) affixing a shielding layer (144, fig. 2 ) to a cover structure (142, fig. 2) . It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to apply Foster’s teaching into Lee such that a weld affixes the shielding layer to the cover structure, since the claim would have been obvious because the particular known technique was recognized as part of the ordinary capabilities of one skilled in the art, as evidenced by Foster. Therefore, the claimed subject matter would have been no more than a predictable combination of a plurality of known affixing techniques according to their respective purposes within routine skill and creativity (§MPEP 2143). Lee in view of Foster does not explicitly disclose: the weld being a capacitor spot weld. However, Kageyama teaches: a spot weld (¶[0041 ) affixing a shielding layer (50, fig. 1 ) to a cover structure (i.e. bus bar 60, fig. 1) . It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to apply Kageyama’s teaching into Lee as modified by Foster such that the weld affixes the shielding layer to the cover structure is a spot weld, since this type of welding is known and employed in the art, to join thin structures (“Note that spot welding may be employed when the thickness of each of the lid 50 and the busbar 60 is relatively thin, for example, as thin as about 1 mm. Further, when the lid 50 and the busbar 60 are joined together by screwing, it is preferable that multiple spots be screwed as in the case of spot welding”, ¶[0044]) . since the claim would have been obvious because the particular known technique was recognized as part of the ordinary capabilities of one skilled in the art, as evidenced by Kageyama . Therefore, the claimed subject matter would have been no more than a predictable combination of a plurality of known affixing techniques according to their respective purposes within routine skill and creativity (§MPEP 2143). In re Claim 1, Lee in view of Foster and Kageyama discloses the limitations as noted above, notably a spot weld affixing a shielding layer to a cover structure, but does not explicitly disclose the spot weld being a capacitor spot weld . However, in accordance to MPEP 2113, the method of forming the device is not germane to the issue of patentability of the device itself . Therefore, the product by process limitation of “capacitor spot weld” is given limited patentable weight to extent it imparts a further structure limitation to the device as claimed. In the instant case the specific method of welding does not appear to impart structure such that the weld of Foster is considered to meet the limitation. See MPEP §2113. Regarding claim 2 , Lee in view of Foster and Kageyama teaches the limitations of claim 1, and Lee further teaches: wherein the shielding layer comprises a foil (“shield cover 922 may be a plate including a thin metal material and may include a shield film or a shield sheet”, ¶[0137]) . Regarding claim 3 , Lee in view of Foster and Kageyama teaches the limitations of claim 2, and Lee further teaches: wherein the foil comprises copper (¶[0137]) . 07-21-aia AIA Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al (US 20200116435; “Lee” hereinafter), in view of Foster (US 7629674; “Foster” hereinafter), and Kageyama et al (US 20160021748; “Kageyama” hereinafter), and further in view of Higgins, III (US 5639989; “Higgins” hereinafter) . Regarding claim 4 , Lee in view of Foster and Kageyama teaches the limitations of claim 1, but does not explicitly teach: wherein a minimum width in a fourth plane of the cover structure of the component shield is 0.7 mm. However, Higgins teaches: a thickness of a shielding layer (60, 62, 64, fig. 3) which includes a horizontal portion, is between 15-1500 microns (col. 10, lines 5-9) . It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to set the width of the Lee’s cover structure of the component shield is 0.7 mm , in order to provide electromagnetic protection, and structural support to the shielding layer, according to its intended use. Furthermore, it has been held, that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the arts (MPEP §2144.05). The thickness of the cover structure is result-effective at least insofar as the thickness determines how effective the shielding is, and balanced with the amount of weight of material required to provide structural support to the shielding layer . 07-21-aia AIA Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al (US 20200116435; “Lee” hereinafter), in view of Foster (US 7629674; “Foster” hereinafter), Kageyama et al (US 20160021748; “Kageyama” hereinafter), and further in view of Yong et al (US 20170290154; “Yong” hereinafter) . Regarding claim 5 , Lee in view of Foster and Kageyama teaches the limitations of claim 1, but does not explicitly disclose: wherein a plurality of capacitor spot welds including the capacitor spot weld affix the shielding layer to the cover structure around a periphery of an aperture of the component shield. However, Yong teaches: a plurality of spot welds (403, fig. 10, ¶[0038]) affix a periphery of a shield (1000, fig. 10) to a PCB (¶[0039]) . It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to apply Yong’s teaching into Lee as modified by Foster and Kageyama such that a plurality of capacitor spot welds including the capacitor spot weld affix the shielding layer to the cover structure around a periphery of an aperture of the component shield, in order to provide secure joining points between the cover member and the shielding layer. T he claim would have been obvious because the particular known technique was recognized as part of the ordinary capabilities of one skilled in the art, as evidenced by Chen . Therefore, the claimed subject matter would have been no more than a predictable combination of a plurality of known techniques according to their respective purposes within routine skill and creativity (§MPEP 2143) . 07-21-aia AIA Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al (US 20200116435; “Lee” hereinafter), in view of Foster (US 7629674; “Foster” hereinafter), and Kageyama et al (US 20160021748; “Kageyama” hereinafter), and further in view of Chen et al (US 20150271911; “Chen” hereinafter) and Hu (CN107787176A; “Hu” hereinafter) . Regarding claim 6 , Lee in view of Foster and Kageyama teaches the limitations of claim 1, but does not explicitly teach: wherein a thickness of the shielding layer is about 0.04 mm and a thickness of the cover structure is about 0.1 mm. However, Chen teaches: a thickness of the shielding layer (642, fig. 6A) , is between 1-100 microns (see claim 8 and ¶[0055]) . It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to set the thickness of the Lee’s shielding layer is about 0.04 mm, since it has been held, that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the arts (MPEP § 2144.05). The thickness of the shielding layer is result-effective at least insofar as the material thickness determines the effectiveness of the shielding relative to the protection of electronic devices from external electromagnetic waves thereby limiting their penetration into a designated space. Lee in view of Foster and Kageyama and Chen do not explicitly disclose: a thickness of the cover structure is about 0.1 mm. However, Hu teaches: a thickness of a cover structure (13, fig. 1) is about 0.1 mm (¶[01, in page 8 of the disclosure]) . It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to set the thickness of the Lee’s cover structure is about 0.1 mm, since it has been held, that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the arts (MPEP § 2144.05). The thickness of the cover structure is result-effective at least insofar as the material thickness determines the protection effectiveness of electronic devices from external electromagnetic waves thereby limiting their penetration into a designated space . 07-21-aia AIA Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al (US 20200116435; “Lee” hereinafter), in view of Foster (US 7629674; “Foster” hereinafter), Kageyama et al (US 20160021748; “Kageyama” hereinafter), and further in view of English et al (US 20160227679; “English” hereinafter) . Regarding claim 7 , Lee in view of Foster and Kageyama teaches the limitations of claim 1, but does not explicitly teach: wherein a diameter of the capacitor spot weld is from 0.2 to 0.25 mm. However, English teaches: a diameter of a spot weld (132, fig. 2) to attach an EMI shield (100, fig. 2) is from 0.4 to 0.99 mm (“weld spots 132 comprise circular areas having a diameter less than 1 mm (e.g., 0.4 mm, etc.). Alternative embodiments may be configured differently, such as a different attachment method for the internal wall, different weld spots (e.g., non-circular weld spots or areas, larger or smaller weld spots or areas, etc.)”, ¶[0042]) . It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to set the a diameter of the capacitor spot weld is from 0.2 to 0.25 mm in order to securely affix the shielding layer to the cover structure, without compromising the structural performance of said shielding layer and cover structure. Furthermore, it has been held, that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the arts (MPEP § 2144.05). The diameter of the spot weld is a result-effective at least insofar as the material thickness of the elements to be joined, determines the quantity of spot welds relative to its diameter . 07-21-aia AIA Claim s 8 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al (US 20200116435; “Lee” hereinafter), in view of Foster (US 7629674; “Foster” hereinafter), and Kageyama et al (US 20160021748; “Kageyama” hereinafter), and further in view of embodiment of figs. 8A-8C of Lee (“lee8” hereinafter) . Regarding claim 8 , Lee in view of Foster and Kageyama teaches the limitations of claim 1, but does not explicitly teach: wherein the system is disposed in an electronic device. However, Lee8 teaches: a system (812, 820, 830, 850, fig. 8A) , is disposed in an electronic device (800, figs. 8B-8C, ¶[0122]) . It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine Lee8’s teaching into Lee as modified by Foster and Kageyama such that the system is disposed in an electronic device, since the claim would have been obvious because the particular known technique was recognized as part of the ordinary capabilities of one skilled in the art, as evidenced by Lee8 . Therefore, the claimed subject matter would have been no more than a predictable combination of a plurality of known techniques according to their respective purposes within routine skill and creativity (§MPEP 2143). Regarding claim 10 , Lee in view of Foster and Kageyama teaches the limitations of claim 1, but does not explicitly teach: wherein the housing structure is a midframe of an electronic device. However, Lee8 teaches: wherein the housing structure (inner support structure 820, figs. 8A-8C) is a midframe (“which may also be referred to as a mid-plate”, ¶[0131]) of an electronic device (800, figs 8A-8C) . It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine Lee8’s teaching into Lee as modified by Foster and Kageyama such that the housing structure is a midframe of an electronic device, since the claim would have been obvious because the particular known technique was recognized as part of the ordinary capabilities of one skilled in the art, as evidenced by Lee8 . Therefore, the claimed subject matter would have been no more than a predictable combination of a plurality of known affixing techniques according to their respective purposes within routine skill and creativity (§MPEP 2143) . 07-21-aia AIA Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al (US 20200116435; “Lee” hereinafter), in view of Foster (US 7629674; “Foster” hereinafter), and Kageyama et al (US 20160021748; “Kageyama” hereinafter), and further in view of Suthram et al (US 20260068710; “Suthram” hereinafter . Regarding claim 9 , Lee in view of Foster and Kageyama teaches the limitations of claim 1, but does not explicitly teach: wherein the device is a system-on-chip (SoC). However, Suthram teaches: devices (i.e. components) in a system (1800, fig. 11) is a system-on-chip (SoC) (“some or all of these components are fabricated onto a single system-on-a-chip (SoC) die”, ¶[0113]) . It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine Suthram’s teaching into Lee as modified by Foster and Kageyama such that the device is a system-on-chip (SoC), in order to boosts speed, reduces power consumption, and optimize utilization space. The claim would have been obvious because the particular known technique was recognized as part of the ordinary capabilities of one skilled in the art, as evidenced by Suthram . Therefore, the claimed subject matter would have been no more than a predictable combination of a plurality of known affixing techniques according to their respective purposes within routine skill and creativity (§MPEP 2143). Conclusion The prior art made of record and not relied upon is: US 20050221638 A1 Suppressor Device. This invention relates generally to an interference suppression device for an electronic appliance having a plug device, which has at least one plug element and is arranged on an electrically conductive housing of the electronic appliance, having a printed circuit board. US 8110902 B2 Chip Package and Manufacturing Method Thereof. This invention generally relates to a chip package including at least a shielding layer for better electromagnetic interferences shielding. The shielding layer disposed over the top surface of the laminate substrate can protect the chip package from the underneath EMI radiation. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER KRIM whose telephone number is (703)756-1246. The examiner can normally be reached 8:00am -4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Allen L Parker can be reached at (303) 297-4722. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALLEN L PARKER/Supervisory Patent Examiner, Art Unit 2841 /P.K./Examiner, Art Unit 2841 Application/Control Number: 18/999,262 Page 2 Art Unit: 2841 Application/Control Number: 18/999,262 Page 3 Art Unit: 2841 Application/Control Number: 18/999,262 Page 4 Art Unit: 2841
Prosecution Insights