DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required:
The claim term “a compressed sparse source matrix tile” used in claim 1 has no antecedent basis to specification.
The functional claim terms “excluded” and “based on magnitudes” of claim 24 have no antecedent basis to specification.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the
“a compressed sparse source matrix tile” in claim 21,
“matrix processing circuitry … to multiply the decompressed sparse source matrix tile and a second source matrix tile” in claim 22,
“a third subset of 8-bit integer data elements of the corresponding first source matrix are excluded from the compressed sparse source matrix tile based on magnitudes of the third subset of 8-bit integer data elements” in claim 24, and
“the third subset of 8-bit integer data elements comprises zero-value data elements” in claim 25
must be shown or the features canceled from the claims. No new matter should be entered.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 21-38 are rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claims contain subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor at the time the application was filed, had possession of the claimed invention.
In claim 21, the claim requires “the execution circuitry to: read a compressed sparse source matrix tile …, decompress the compressed sparse source matrix tile …, and store the decompressed sparse source matrix tile …” The specification did not disclose the source matrix as “sparse”. The term “sparse source matrix” was never used in the original specification. The meaning of “sparse matrix” has different meanings from “matrix”.
Independent claims 27 and 33 have similar issues. Dependent claims 22-26, 28-32 and 34-38 are rejected for the same reason as above.
In claim 22, the claim requires “matrix processing circuitry … to perform a matrix multiplication operation to multiply the decompressed sparse source matrix tile and a second source matrix tile …” The specification does fairly disclose matrix multiply operations having a first source matrix tile and a second source matrix tile with option of a third data element. For example, as shown in figs. 7-10. However, the specification does not disclose the first source matrix tile and the second source matrix tile are decompressed sparse source matrix tiles.
Claims 28 and 34 have the same issue. Dependent claims 23-26, 30-32 and 35-38 are rejected for the same reason as above.
In claim 24, the specification does not appear to disclose “a third subset of 8-bit integer data elements of the corresponding first source matrix are excluded from the compressed sparse source matrix tile based on magnitude of the third subset of 8-bit integer data elements”. The specification does not clearly disclose the claimed “exclude” and “magnitude” of the data elements. Usages of those terms were not found in specification.
Claims 30 and 36 the similar issue. Dependent claims 25, 31 and 37 are rejected for the same reason as above.
In claims 25, 31 and 37, the specification does not appear to disclose “the third subset of 8-bit integer data elements comprise zero-value data elements”.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 25, 31 and 37 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
In claims 25, 31 and 37, it is unclear on the scope of “a subset of 8-bit integer data elements comprises zero-value data elements”.
Generally, the term “zero-value element” is understood as “0”, and “non-zero-value element” is understood as “1” in the field of art. Such an understanding is consistent with usages throughout the disclosed specification. However, in specification, para.0179, the specification also described “a value of 0 can be used to represent non-zero-valued elements.” Such an example contradicts with usages from rest of specification, and meanings from general understanding. In the claim, it would be unclear the claimed “zero-value element” is a ‘0’ or a ‘1’.
Second, the claim construction of the claim can include 1) a single bit as a subset of 8-bit integer data elements, 2) the single bit is a zero-value data element, and 3) the zero-value data element can be either 0 or 1 such that the subset is not limited in any ways. Therefore, the claim scope is indefinite as the scope of the claimed “third subset of 8-bit integer data elements” cannot be determined.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element is limited by the description in the specification when 35 U.S.C. 112(f) is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f):
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f). The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f). The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f), because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier.
Such claim limitations are:
“execution circuitry to read …, decompress …, and store …” in claims 21 and 27,
“matrix processing circuitry to perform a matrix multiplication operation …” in claims 22, 28 and 34,
“processor to perform a combined load and decompression operation …” in clam 33
Because these claim limitations are being interpreted under 35 U.S.C. 112(f), they are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have these limitations interpreted under 35 U.S.C. 112(f), applicant may:
(1) amend the claim limitation(s) to avoid them being interpreted under 35 U.S.C. 112(f) (e.g., by reciting sufficient structure to perform the claimed function); or
(2) present a sufficient showing that the claim limitations recite sufficient structure to perform the claimed function so as to avoid them being interpreted under 35 U.S.C. 112(f).
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to examiner Cheng-Yuan Tseng whose telephone number is (571)272-9772, and fax number is (571)273-9772. The examiner can normally be reached on Monday through Friday from 09:00 to 17:30 Eastern Time. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alicia Harrington can be reached on (571)272-2330. The fax phone number for the organization where this application or proceeding is assigned is (571)273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at (866)217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call (800)786-9199 (IN USA OR CANADA) or (571)272-1000.
/CHENG YUAN TSENG/Primary Examiner, Art Unit 2615
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