DETAILED ACTION
1. This Office Action is responsive to claims filed for No. 18/999,480 on December 1, 2025. Please note Claims 1-20 are pending and have been examined.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
3. The information disclosure statements (IDS) submitted on February 17, 2025 and September 12, 2025 were filed. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Election/Restrictions
4. Applicant’s election without traverse of Species 3, Figure 6 and Claims 1, 2, 6-11 and 14-19 in the reply filed on December 1, 2025 is acknowledged.
Allowable Subject Matter
5. Claims 6-9 and 14-17 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 6 recites limitations of inputting voltages to end of a metal wire, outputting feedback signals indicating resistance, determining a second proportional relationship and determining a capacitance result. This level of detail, as a whole, is not taught by the prior art. Please note Claims 7-9 depend from Claim 6.
Claim 14 recites similar limitations to Claim 6 and the above reasoning is applied here as well. Also note Claims 15-17 depend from Claim 14.
Claim Rejections - 35 USC § 102
6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
7. Claims 1, 2, 10, 11, 18 and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. ( US 2021/0201784 A1 ).
Kim teaches in Claim 1:
A processing circuit ( Figure 1, [0031] discloses a light emitting display device with a display panel 150 ) comprising:
a load unit comprising a first load value ( Figure 8, [0061] discloses feedback voltage output end FB_EVDD. This is applied at/to feedback end and part of switch circuit unit 155 (read as a load unit) ); and
a detection circuit coupled to the load unit ( Figure 8, [0051] discloses the switch circuit unit 155 which can pass FB_EVDD to power controller 185 for varying the first potential EVdd based on FB_Evdd, as detailed in [0066]. For purposes of examination, please note 185/181 (within 180), as well as 155, as elements of a detection circuit coupled to the display panel 150 ), and configured to:
detect the first load value ( [0067] discloses sensing FB_Evdd and relaying this to 180 );
obtain a first proportional relationship between the first load value and a second load value of a first pixel line of a display unit ( Figure 5, [0046] discloses the impact of IR drop based on distance away from the power supply. To compensate, Figure 16, [0079] discloses a compensation circuit can prevent a current deviation in the sub-pixels from being generated. This is done for every scan line and based on the position (distance away), the amount of compensation is proportional to the position/distance away. This is done to maintain a uniform current, as shown. [0095] also discloses details on the proportional driving current to the driving transition and Figures 8 and 12-14 show it is applied to the scan lines, including the/a first pixel line. The first potential may affect brightness and is compensated for. This compensation comes in the form of EVDD, as shown in Figures 8 and 12-14 ); and
obtain, based on the first proportional relationship and the first load value, the second load value to control the first pixel line. ( Figures 12-14, [0026] disclose the output of EVdd back to the scan/pixel lines which is compensated for the IR drop )
Kim teaches in Claim 2:
The processing circuit of claim 1, further comprising:
a drive current circuit coupled to the first pixel line and configured to provide a drive current to the first pixel line ( Figure 9, [0040] disclose elements such as shift register circuit 131, switch circuit unit 155 which can sense feedback voltages as well as pass on voltages/currents to the shift register circuit ); and
a controller separately coupled to the drive current circuit and the detection circuit and configured to: obtain, based on the first load value, the second load value; and control, based on the second load value, a current value of the drive current. ( Figure 11, [0069] discloses additional details of the power supply 180 which includes components for receiving FB_EVdd, processing this interpreted first load and outputting interpreted second load EVdd )
Kim teaches in Claim 10:
A processing method ( Figure 1, [0031] discloses a light emitting display device with a display panel 150 ) comprising:
detecting a first load value of a load unit ( Figure 8, [0061] discloses feedback voltage output end FB_EVDD. This is applied at/to feedback end and part of switch circuit unit 155 (read as a load unit). Figure 8, [0051] discloses the switch circuit unit 155 which can pass FB_EVDD to power controller 185 for varying the first potential EVdd based on FB_Evdd, as detailed in [0066]. For purposes of examination, please note 185/181 (within 180), as well as 155, as elements of a detection circuit coupled to the display panel 150 );
obtaining a first proportional relationship between the first load value and a second load value of a first pixel line of a display unit ( Figure 5, [0046] discloses the impact of IR drop based on distance away from the power supply. To compensate, Figure 16, [0079] discloses a compensation circuit can prevent a current deviation in the sub-pixels from being generated. This is done for every scan line and based on the position (distance away), the amount of compensation is proportional to the position/distance away. This is done to maintain a uniform current, as shown. [0095] also discloses details on the proportional driving current to the driving transition and Figures 8 and 12-14 show it is applied to the scan lines, including the/a first pixel line. The first potential may affect brightness and is compensated for. This compensation comes in the form of EVDD, as shown in Figures 8 and 12-14 ); and
obtaining, based on the first proportional relationship and the first load value, the second load value to control the first pixel line. ( Figures 12-14, [0026] disclose the output of EVdd back to the scan/pixel lines which is compensated for the IR drop )
Kim teaches in Claim 11:
The processing method of claim 10, further comprising controlling, based on the second load value, a current value of a drive current of the first pixel line. ( Figure 9, [0040] disclose elements such as shift register circuit 131, switch circuit unit 155 which can sense feedback voltages as well as pass on voltages/currents to the shift register circuit. Figure 11, [0069] discloses additional details of the power supply 180 which includes components for receiving FB_EVdd, processing this interpreted first load and outputting interpreted second load EVdd )
Kim teaches in Claim 18:
A display apparatus ( Figure 1, [0031] discloses a light emitting display device with a display panel 150 ) comprising:
a display unit comprising a first pixel line configured to display an image, wherein the first pixel line comprises a second load value ( Figure 1, [0031]+ disclose details on the display panel 150 which has a plurality of scan lines which connect to the pixels ); and
a processing circuit coupled to the display unit and comprising:
a load unit comprising a first load value ( Figure 8, [0061] discloses feedback voltage output end FB_EVDD. This is applied at/to feedback end and part of switch circuit unit 155 (read as a load unit) ); and
a detection circuit coupled to the load unit ( Figure 8, [0051] discloses the switch circuit unit 155 which can pass FB_EVDD to power controller 185 for varying the first potential EVdd based on FB_Evdd, as detailed in [0066]. For purposes of examination, please note 185/181 (within 180), as well as 155, as elements of a detection circuit coupled to the display panel 150 ) and configured to:
detect the first load value ( [0067] discloses sensing FB_Evdd and relaying this to 180 );
obtain a first proportional relationship between the first load value and the second load value ( Figure 5, [0046] discloses the impact of IR drop based on distance away from the power supply. To compensate, Figure 16, [0079] discloses a compensation circuit can prevent a current deviation in the sub-pixels from being generated. This is done for every scan line and based on the position (distance away), the amount of compensation is proportional to the position/distance away. This is done to maintain a uniform current, as shown. [0095] also discloses details on the proportional driving current to the driving transition and Figures 8 and 12-14 show it is applied to the scan lines, including the/a first pixel line. The first potential may affect brightness and is compensated for. This compensation comes in the form of EVDD, as shown in Figures 8 and 12-14 ); and
obtain, based on the first proportional relationship and the first load value, the second load value to control the first pixel line. ( Figures 12-14, [0026] disclose the output of EVdd back to the scan/pixel lines which is compensated for the IR drop )
Kim teaches in Claim 19:
The display apparatus of claim 18, wherein the processing circuit further comprises:
a drive current circuit coupled to the first pixel line and configured to provide a drive current to the first pixel line ( Figure 9, [0040] disclose elements such as shift register circuit 131, switch circuit unit 155 which can sense feedback voltages as well as pass on voltages/currents to the shift register circuit ); and
a controller separately coupled to the drive current circuit and the detection circuit and configured to: obtain, based on the first load value, the second load value; and control, based on the second load value, a current value of the drive current. ( Figure 11, [0069] discloses additional details of the power supply 180 which includes components for receiving FB_EVdd, processing this interpreted first load and outputting interpreted second load EVdd )
Conclusion
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DENNIS P JOSEPH whose telephone number is (571)270-1459. The examiner can normally be reached Monday - Friday 5:30 - 3:30 EST.
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/DENNIS P JOSEPH/Primary Examiner, Art Unit 2621