DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Amendment filed 19 May, 2026 has been entered. Claims 1-14 remain pending in the application. Applicant's amendments to the Claims have precluded the use of reference Wakchuare in rejecting claim 1. As such, the specific rejection is withdrawn. Examiner further acknowledges amendments to the claims which have been rejected on further search and consideration.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2-6 and 8-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhou (U.S. Patent Pub. No. 2023/0385191).
In regard to claim 1, Zhou teaches a method performed by a data storage device comprising a non-persistent memory and a persistent memory (Fig. 1 memory subsystem 110; ¶ 0026 memory device 140 is volatile (non-persistent), memory device 130 is non-volatile (persistent)), the method comprising: receiving, by a controller of the data storage device, a data from a host device (¶ 0040, lines 1-6); detecting, by the controller, a failure in a power support component of the data storage device (¶ 0065, lines 1-2); in response to detecting the failure, creating, by the controller, a block of single level cells (SLC), in the persistent memory (¶ 0065, lines 2-6), based on values of predefined data storage parameters (¶ 0065 SLC blocks are created based on values in a look up table of blocks e.g. parameters); and storing, by the controller, the data received from the host device in the block of SLC (¶ 0068) by transferring the data from the non-persistent memory to the block of SLC (Fig. 1 data must flow through volatile memory device 140 before arriving at non-volatile device 130); wherein the creating the block of SLC comprises: transferring valid data from a first block of multi-level cells (MLC), among a plurality of blocks of MLC in the persistent memory, to a second block of MLC among the plurality of blocks of MLC; erasing the first block of MLC after the valid data is transferred to the second block of MLC; and creating the block of SLC from the erased first block of MLC (¶ 0050 non-volatile memory is made up of MLCs; ¶ 0051 free MLC blocks are then configured to act as SLC; ¶ 0052 free blocks are produced by garbage collection including: (lines 3-11) folding (transferring) valid block data into other blocks; and (lines 14-17) erasing the original block’s invalid pages to return it to free status; normal operation would therefore result in some MLC-MLC garbage collection to produce SLC blocks).
As for claim 2, the previously cited references teach the method of claim 1. Additionally, Zhou teaches converting MLC blocks to SLC based on parameters including: an erasure cycle value of a total number of cells in the data storage device (Zhou ¶ 0053 discloses maintaining a target SLC block amount and ¶ 0076 discloses selecting blocks (e.g. some total number of cells) for SLC conversion based on a program-erase-cycle count), a maximum endurance target value of the host device (according to instant specification ¶ 0046, effectively equivalent to device operational lifetime (i.e. remaining program erase cycles as known in the art) mentioned in Zhou ¶ 0054), endurance of total number of memory cells in the plurality of blocks of MLC to serve the host device (¶ 0054, lines 4-9 target value may be based on endurance of second subset blocks e.g. normal host serving blocks), a maximum erasure cycle (¶ 0054, lines 4-17 disclose that target quantities of SLC may be based on an operational lifetime measured relative to expected average PEC counts, meaning that a maximum erasure cycle for the cells must be factored into such a calculation), a size of each of the plurality of blocks of MLC (¶ 0060, regions are formed based on page size ratio e.g. size of an MLC block will determine the number of SLC blocks), an average erasure cycle (¶ 0054, lines 9-15 average PEC cycle is a consideration), and a total data value written from the host device to the persistent memory of the data storage device before an occurrence of the failure of the power support component (If drawing only from a free block pool as disclosed (¶ 0076), the maintained number of SLC blocks is bound by the total number of currently occupied blocks (i.e. total data written)), achieving the claimed limitation.
As for claim 3, the previously cited references teach the method of claim 1. Additionally, Zhou teaches an embodiment wherein the creating, by the controller, the block of SLC comprises: determining, by the controller, a number of blocks to be extracted from the plurality of blocks of MLC for creating the block of SLC based on endurance of a total number of memory cells in the plurality of blocks of MLC (¶ 0054, lines 1-9 target number of SLC blocks may be based on expected operational lifetime of the device i.e. endurance of all cells); extracting, by the controller, the determined number of blocks from the plurality of blocks of MLC (¶ 0054, lines 30-35 blocks may be garbage collected to permit inclusion in SLC subset); and creating, by the controller, the block of SLC from the extracted number of blocks of MLC (¶ 0054, lines 35-45 the subset is generated and then maintained as needed), achieving the claimed limitation.
As for claim 4, the previously cited references teach the method of claim 1. Additionally, Zhou teaches an embodiment wherein the creating, by the controller, the block of SLC further comprises determining a count of the block of SLC based on a function of a total number of memory blocks in the data storage device and a predetermined number of the plurality of blocks of MLC required in the data storage device. Zhou ¶ 0053 discloses maintaining a target SLC block amount and ¶ 0054 discloses that the amount may be designated based on the operational lifetime of the whole device (i.e. must be some function of the total number of blocks; see lines 1-4). The amount may be additionally based on equalizing the endurance of SLC and MLC regions (lines 4-15), which must result in some ratio of SLC to MLC blocks according to write amplification. This ratio is a function of a predetermined number of MLC blocks, achieving the claimed limitation.
As for claim 5, the previously cited references teach the method of claim 4. Additionally, Zhou teaches an embodiment wherein the predetermined number of the plurality of blocks of MLC required in the data storage device is determined (¶ 0053 discloses maintaining a target SLC block amount and ¶ 0054 discloses that the amount may be designated based on equalizing the endurance of SLC and MLC regions (lines 4-15), which must result in some ratio of SLC to MLC blocks and therefore a predetermined number of MLC blocks) based on at least one of: a Write Amplification Factor (WAF) corresponding to the respective plurality of blocks of MLC (¶ 0054, lines 15-17), a remaining erasure cycle (¶ 0054, lines 4-8 operational lifetime), and a size of the plurality of blocks of MLC (¶ 0060, regions are formed based on page size ratio e.g. size of an MLC block will determine the ratio of SLC blocks vs MLC blocks). Additionally, if drawing only from a free block pool as disclosed (¶ 0076), the maintained number of SLC blocks and therefore the maintained number of MLC blocks are bound by the remaining write capacity of the plurality of blocks of MLC, achieving the claimed limitation.
As for claim 6, the previously cited references teach the method of claim 1. Additionally, Zhou teaches an embodiment further comprising transferring the data from the block of SLC to the plurality of blocks of MLC based on predefined SLC parameters. Zhou ¶ 0070, lines 20-24 disclose transferring blocks from SLC to MLC based on a target value of SLC data i.e. a predefined SLC parameter.
As for claim 8, Applicant is directed to the rejection of claim 1 as the claims include the same limitations and are therefore rejected on the same rationale.
As for claim 9, Applicant is directed to the rejection of claim 2 as the claims include the same limitations and are therefore rejected on the same rationale.
As for claim 10, Applicant is directed to the rejection of claim 3 as the claims include the same limitations and are therefore rejected on the same rationale.
As for claim 11, Applicant is directed to the rejection of claim 4 as the claims include the same limitations and are therefore rejected on the same rationale.
As for claim 12, Applicant is directed to the rejection of claim 5 as the claims include the same limitations and are therefore rejected on the same rationale.
As for claim 13, Applicant is directed to the rejection of claim 6 as the claims include the same limitations and are therefore rejected on the same rationale.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Zhou in view of Pratt (U.S. Patent Pub. No. 2022/0050627).
In regard to claim 7, the previously cited references teach the method of claim 6. Additionally, Zhou teaches an embodiment wherein the predefined SLC parameters comprise data capacity of the block of SLC. Zhou ¶ 0070, lines 20-24 disclose folding blocks from SLC to MLC based on a target value of SLC data written i.e. the number of SLC blocks folded would be based on their data capacity. Zhou does not explicitly teach the remaining limitations of claim 7. However, Pratt teaches folding SLC blocks based on SLC parameters including design (¶ 0055, lines 1-8 number of power cycles needed to avoid an over-temperature state e.g. thermal design power) and a halt state of the block (¶ 0055, lines 14-18 disclose a flag to prevent data transfer out of SLC), achieving the claimed limitation. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Pratt in order to address potential damage caused by higher temperatures during data migration (¶ 0055, lines 1-6). As for claim 14, Applicant is directed to the rejection of claim 7 as the claims include the same limitations and are therefore rejected on the same rationale.
Response to Arguments
Applicant’s arguments (see page 10 of response filed 19 May, 2026) with respect to the rejection of claim 1 using reference Wakchuare have been fully considered and are persuasive. The rejection under 35 USC § 102 of claim 1 which made use of reference Wakchuare has been withdrawn.
Applicant's arguments (see page 10 of response filed 19 May, 2026) with respect to the rejection of independent claims 1 and 8 using reference Zhou have been fully considered but they are not persuasive. Zhou has been found to carry out the amended limitations of MLC-MLC compaction to create SLC blocks via normal operation.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZAKARIA MOHAMMED BELKHAYAT whose telephone number is (571)270-0472. The examiner can normally be reached Monday thru Thursday 7:30AM-5:30PM EST.
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/ZAKARIA MOHAMMED BELKHAYAT/Examiner, Art Unit 2139
/REGINALD G BRAGDON/Supervisory Patent Examiner, Art Unit 2139
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