Prosecution Insights
Last updated: May 29, 2026
Application No. 18/999,934

PAGE-BASED REMOTE MEMORY ACCESS USING SYSTEM MEMORY INTERFACE NETWORK DEVICE

Non-Final OA §DP
Filed
Dec 23, 2024
Priority
Nov 18, 2020 — provisional 63/115,511 +1 more
Examiner
ABAD, FARLEY J
Art Unit
2181
Tech Center
2100 — Computer Architecture & Software
Assignee
Intel Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
812 granted / 943 resolved
+31.1% vs TC avg
Moderate +5% lift
Without
With
+5.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
9 currently pending
Career history
959
Total Applications
across all art units

Statute-Specific Performance

§101
2.4%
-37.6% vs TC avg
§103
80.5%
+40.5% vs TC avg
§102
5.8%
-34.2% vs TC avg
§112
5.9%
-34.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 943 resolved cases

Office Action

§DP
CTNF 18/999,934 CTNF 84080 DETAILED ACTION Status of Application Claims 37-57 are pending in the present application. The Preliminary Amendment filed 03/17/2025 has been entered. Information Disclosure Statement The information disclosure statement (IDS) submitted on 01/23/2026, 12/04/2025, 10/22/2025, 07/25/2025, 07/10/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Priority Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, 365(c), or 386(c) is acknowledged. Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Double Patenting 08-33 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. 08-34 AIA Claim s 37, 45, and 52 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim s 4, 1, and 7, respectively , of U.S. Patent No. 12,381,751 B2 . Although the claims at issue are not identical, they are not patentably distinct from each other because the claims perform the same function but with different terminology . The differences between the claims are highlighted below by italicizing all limitations that differ and bolding limitations that conflict. Please note that in the interest of time, the examiner is selecting only one of the independent claims from the instant application and U.S. Patent, for the table below. Instant Application US 12,381,751 B2 Claim 37. At least one non-transitory computer-readable medium comprising instructions stored thereon, that if executed by one or more processors, cause the one or more processors to: receive a request for a direct memory access (DMA) operation between a source buffer and a destination buffer, wherein: at least one of the source buffer or the destination buffer is stored in a local memory; at least one of the source buffer or the destination buffer is stored in a remote network device; and based on the request, cause: based on the source buffer being stored in the local memory and the destination buffer being stored in the remote network device, the DMA operation causes copying of content from the local buffer and transmission of the copied content in at least one Ethernet packet to the destination buffer in the remote network device; based on the source buffer comprising a second remote buffer in the remote network device and the destination buffer comprising a second local buffer in the local memory, the DMA operation causes: transmission of a request for content stored in the second remote buffer to the remote network device, receipt of the requested content in at least one Ethernet packet, and copying of the requested content from the second remote buffer to the second local buffer; and based on the source buffer comprising a third local buffer in the local memory and the destination buffer comprising a fourth local buffer in the local memory, the DMA operation causes copying of content from the third local buffer to the fourth local buffer. Claim 4. At least one non-transitory computer-readable medium comprising instructions stored thereon, that if executed by one or more processors, cause the one or more processors to: issue a direct memory access (DMA) data access request to a DMA engine, the DMA data access request comprising a source address, destination address, and length, wherein: the source address or destination address correspond to a local or remote memory device; the DMA engine is to determine if the source address corresponds to the remote memory device and based on the source address corresponding to the remote memory device, the DMA engine is to tunnel the DMA data access request by causing a network interface device to transmit a data access request based on the DMA data access request, in one or more Ethernet packets, to the remote memory device; and the DMA engine is to determine if the destination address corresponds to the remote memory device and based on the destination address corresponding to the remote memory device, the DMA engine is to copy data, associated with the DMA data access request, to the remote memory device by causing the network interface device to transmit one or more Ethernet packets with the data to the remote memory device; and wherein: based on the source address corresponding to the local memory device and the destination address corresponding to the remote memory device, generating, using the network interface device, at least one packet for transmission to the remote memory device and comprises generating the at least one packet that includes data stored at the source address, and based on the source address corresponding to the remote memory device and the destination address corresponding to the local memory device, generating, using the network interface device, at least one packet for transmission to the remote memory device and comprises generating the at least one packet with a data read request from the source address and receive data from the remote memory device in response to the at least one packet, and based on the source and destination addresses in the DMA data access request corresponding to the local memory device, the DMA engine is to perform a DMA copy operation for data from the source address to the destination address in the local memory device. Claims 38-39 and 42 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 4, of U.S. Patent No. 12381751 B2. Claims 46-47 and 50 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1, of U.S. Patent No. 12381751 B2. Claims 53-54 and 57 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 7, of U.S. Patent No. 12381751 B2 . 08-36 AIA Claim s 40, 48, and 55 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim s 4, 1, and 7, respectively , of U.S. Patent No. 12,381,751 B2 , in view of Gafni et al (hereinafter Gafni), US 20140269271 A1 . Referring to claims 40, 48, and 55, taking claim 40 as exemplary, ‘751 does not explicitly disclose the computer-readable medium of claim 37, wherein a network interface device is to receive the requested content in at least one Ethernet packet in a manner consistent with InfiniBand. However, Gafni discloses wherein a network interface device is to receive the requested content in at least one Ethernet packet in a manner consistent with InfiniBand [paragraph 43, “NICs of source host 410 may be configured to send and receive Ethernet and/or IP packets that may be encapsulated by an HCA into InfiniBand packets”]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Gafni, in the medium of ‘751 to implement, wherein a network interface device is to receive the requested content in at least one Ethernet packet in a manner consistent with InfiniBand, in order to provide improved network congestion management [Gafni, paragraphs 6-7] . 08-36 AIA Claim s 41, 49, and 56 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim s 4, 1, and 7, respectively , of U.S. Patent No. 12,381,751 B2 , in view of Raman et al (hereinafter Raman), US 20220091754 A1 . Referring to claims 41, 49, and 56, taking claim 41 as exemplary, ‘751 does not explicitly disclose the computer-readable medium of claim 37, wherein a network interface device is to receive the requested content in at least one Ethernet packet in a manner consistent with Non-volatile memory over fabrics (NVMe-oF). However, Raman discloses wherein a network interface device is to receive the requested content in at least one Ethernet packet in a manner consistent with Non- volatile memory over fabrics (NVMe-oF) [paragraphs 51-52]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Raman, in the medium of ‘751 to implement, wherein a network interface device is to receive the requested content in at least one Ethernet packet in a manner consistent with Non- volatile memory over fabrics (NVMe-oF), in order to removes points of failure and reduce bottlenecking of transactions [Raman, paragraph 35] . 08-36 AIA Claim s 43-44 and 51 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim s 4 and 1, respectively , of U.S. Patent No. 12,381,751 B2 , in view of Ying et al (hereinafter Ying), US 20190220384 A1 . Referring to claim 43, ‘751 does not explicitly disclose the computer-readable medium of claim 37, wherein the one or more processors comprise a graphics processing unit (GPU). However, Ying discloses wherein the one or more processors comprise a graphics processing unit (GPU) [paragraphs 26, 46]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Ying, in the medium of ‘751 to implement, wherein the one or more processors comprise a graphics processing unit (GPU), in order to quickly and efficiently run applications and/or save local processing resources [Ying, paragraph 21]. Referring to claims 44 and 51, taking claim 44 as exemplary, ‘751 does not explicitly disclose the computer-readable medium of claim 37, wherein the request comprises a call to an application programming interface (API). However, Ying discloses wherein the request comprises a call to an application programming interface (API) [paragraphs 26, 46]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Ying, in the medium of ‘751 to implement, wherein the request comprises a call to an application programming interface (API), in order to quickly and efficiently run applications and/or save local processing resources [Ying, paragraph 21] . 08-35 Claim s 37, 45, and 52 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim s 21, 34, and 29 , of copending Application No. 19/244,902 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because the claims perform the same function but with different terminology . This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented. Claims 38, 46, and 53, are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 21, 34, and 29, respectively, of the reference application. Claim 39 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 24 of the reference application. Claim 40 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 25 of the reference application. Claim 41 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 26 of the reference application. Claims 42, 50, and 57 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 21, 34, and 29, respectively, of the reference application. Claim 43 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 28 of the reference application. Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure : Pong, US 7571259 B2, discloses RDMA [col. 3, line 64 – col. 4, line 5]. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FARLEY J ABAD whose telephone number is (571)270-3425. The examiner can normally be reached Mon-Fri 8:30 AM - 7 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Idriss Alrobaye can be reached at (571) 270-1023. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Farley Abad/Primary Examiner, Art Unit 2181 Application/Control Number: 18/999,934 Page 2 Art Unit: 2181 Application/Control Number: 18/999,934 Page 3 Art Unit: 2181 Application/Control Number: 18/999,934 Page 4 Art Unit: 2181 Application/Control Number: 18/999,934 Page 5 Art Unit: 2181 Application/Control Number: 18/999,934 Page 6 Art Unit: 2181 Application/Control Number: 18/999,934 Page 7 Art Unit: 2181 Application/Control Number: 18/999,934 Page 8 Art Unit: 2181 Application/Control Number: 18/999,934 Page 9 Art Unit: 2181 Application/Control Number: 18/999,934 Page 10 Art Unit: 2181 Application/Control Number: 18/999,934 Page 11 Art Unit: 2181 Application/Control Number: 18/999,934 Page 12 Art Unit: 2181 Application/Control Number: 18/999,934 Page 13 Art Unit: 2181 Application/Control Number: 18/999,934 Page 14 Art Unit: 2181
Read full office action

Prosecution Timeline

Dec 23, 2024
Application Filed
Mar 06, 2026
Non-Final Rejection mailed — §DP (current)

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
91%
With Interview (+5.1%)
2y 6m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 943 resolved cases by this examiner. Grant probability derived from career allowance rate.

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