Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Introduction
This action responds to the application 19/000,475 filed on 12-23-2024.
Claims 1-13 are pending.
Claim Rejections - 35 USC § 102
3. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
4. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
5. Claims 1-2, 5-6, and 8-13 are rejected under 35 U.S.C. 102a (1) as being anticipated by Ohara et al. (US 2012/0189139).
Consider Claim 1, Ohara teaches a signal generator(see fig. 1), comprising:
a signal output stage circuit(see fig. 1(60)), receiving an operating voltage(see fig. 1(+Vcc) and a negative voltage (see fig. 1(-Vcc) as power supply voltages(see fig. 1), and generating an output voltage to drive a load(see fig. 1(40));
a sensor circuit(see fig. 1(30)), detecting load impedance of the load and the operating voltage; and a negative voltage generator circuit(see fig.1), adjusting(see fig. 1(10)) a driving capability of the negative voltage based on information related to the operating voltage and information related to the load impedance(see figs.1-5 and paragraphs[0009], [0025]-[0037]).
wherein the signal output stage circuit adjusts a driving capability of the output voltage based on the information related to the load impedance(see figs.1-9 and paragraphs [0057]--[0092]).
Consider Claims 2 and 5, Ohara teaches the signal generator wherein the signal output stage circuit comprises a plurality of signal output sub-circuits, the signal output stage circuit adjusts a number of the plurality of enabled signal output sub-circuits based on the information related to the load impedance(see figs.1-5 and paragraphs[0009], [0025]-[0037]); and the signal generator wherein each of the plurality of signal output sub-circuits comprises(see fig. 9): a first transistor, wherein a first terminal of the first transistor receives the operating voltage, a control terminal of the first transistor receives a first input voltage, and a second terminal of the first transistor generates an output voltage; and a second transistor, wherein a first terminal of the second transistor generates the output voltage, a control terminal of the second transistor receives a second input voltage, and a second terminal of the second transistor receives the negative voltage(see figs.1-9 and paragraphs [0165]--[0178]).
Consider Claims 6 and 8, Ohara teaches the signal generator wherein the negative voltage generator circuit comprises a plurality of charge pump circuits, wherein output terminals of the plurality of charge pump circuits are coupled to each other, the negative voltage generator circuit adjusts the number of the plurality of enabled charge pump circuits based on the information related to the load impedance and the information related to the operating voltage(see figs.1-9 and paragraphs [0057]--[0092]); and the signal generator according to claim 6, wherein the negative voltage generator circuit enables the plurality of charge pump circuits in a time-division manner according to a ramp signal. (see figs.1-9 and paragraphs [0140]--[0160]).
Consider Claims 9 and 10, Ohara teaches the signal generator further comprising: a ramp signal generator circuit, coupled to the negative voltage generator circuit, for generating the ramp signal. . (see figs.1-9 and paragraphs [0140]--[0160]).; and the signal generator wherein each of the charge pump circuits comprises: a first capacitor; a first switch, wherein a first terminal of the first switch receives a base voltage, and a second terminal of the first switch is coupled to a first terminal of the first capacitor; a second switch, wherein a first terminal of the second switch is coupled to the first terminal of the first capacitor, and a second terminal of the second switch receives a ground voltage; a third switch, wherein a first terminal of the third switch receives the ground voltage, and a second terminal of the third switch is coupled to a second terminal of the first capacitor; a second capacitor, wherein a first terminal of the second capacitor is coupled to the second terminal of the first capacitor and generates the negative voltage, and a second terminal of the second capacitor receives the ground voltage; and a fourth switch, wherein a first terminal of the fourth switch is coupled to the second terminal of the first capacitor, and a second terminal of the fourth switch is coupled to the first terminal of the second capacitor. (see figs.1-9 and paragraphs [0140]--[0160]).
Consider Claims 11 and 12, Ohara teaches the signal generator wherein the second switch and the third switch are simultaneously conducted, and the first capacitor is discharged. (see figs.1-9 and paragraphs [0140]--[0160]); and the signal generator wherein in a first phase, the first switch and the third switch are simultaneously conducted to charge the first capacitor; in a second phase, the second switch and the fourth switch are conducted to enable charge sharing between the first capacitor and the second capacitor, thereby generating the negative voltage at the first terminal of the second capacitor (see figs.1-9 and paragraphs [0140]--[0160])..
Consider Claim 13, Ohara teaches the signal generator wherein the sensor circuit generates first control signal based on the load impedance, and generates second control signal according to the operating voltage, and the sensor circuit transmits the first control signal and the second control signal to the signal output stage circuit(see figs.1-9 and paragraphs [0165]--[0178])..
Claim Rejections - 35 USC § 103
6. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
7. The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the manner in which the invention was made.
8. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
9. Claims 3-4 and 7 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Ohara et al. (US 2012/0189139). in view of Wu et al. (US PAT. 6,756,838).
Consider Claim 3, Ohara does not explicitly teach the signal generator wherein when the load impedance is greater than a first load impedance threshold, the signal output stage circuit sets the number of the plurality of enabled signal output sub-circuits as a first quantity; when the load impedance is not greater than the first load impedance threshold, the signal output stage circuit sets the number of the plurality of enabled signal output sub-circuits as a second quantity, wherein the first quantity is greater than the second quantity
However, Wu teaches the signal generator wherein when the load impedance is greater than a first load impedance threshold, the signal output stage circuit sets the number of the plurality of enabled signal output sub-circuits as a first quantity; when the load impedance is not greater than the first load impedance threshold, the signal output stage circuit sets the number of the plurality of enabled signal output sub-circuits as a second quantity, wherein the first quantity is greater than the second quantity(see figs. 2-10 and col. 5, line 12-col. 7, line 67).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to combine the teaching of Wu into the teaching of Ohara to provide a charge pump based voltage regulator with smart power regulation employs an architecture that requires that the charge pump current be a linear combination of the load current and a clamp current with a possible offset current. The smart power regulation is based on automatic load activity (or load current) detection using the clamp current. The clamp current and the filtered charge pump current are compared with one another; and the charge pump current is then adjusted accordingly by stepping the frequency of the clock driving the charge pump, optimizing the power consumption of the entire voltage regulator with varying load activity. The negative voltage regulation is independent of the integrated circuit positive supply voltage. In one embodiment, a derivative of the desired output voltage is compared with a reference voltage to generate a clamp current control signal. In another embodiment, the reference voltage is solely positive.
Consider Claim 4, Ohara does not explicitly teach the signal generator wherein when the load impedance is greater than a first load impedance threshold, the signal output stage circuit sets the number of the plurality of enabled signal output sub-circuits as a first quantity; when the load impedance is less than a second load impedance threshold, the signal output stage circuit sets the number of the plurality of enabled signal output sub-circuits as a second quantity; when the load impedance is between the first load impedance threshold and the second load impedance threshold, the signal output stage circuit sets the number of the plurality of enabled signal output sub-circuits as a third quantity, wherein the first load impedance threshold is greater than the second load impedance threshold, the first quantity is greater than the third quantity, and the third quantity is greater than the second quantity
However, Wu teaches the signal generator wherein when the load impedance is greater than a first load impedance threshold, the signal output stage circuit sets the number of the plurality of enabled signal output sub-circuits as a first quantity; when the load impedance is less than a second load impedance threshold, the signal output stage circuit sets the number of the plurality of enabled signal output sub-circuits as a second quantity; when the load impedance is between the first load impedance threshold and the second load impedance threshold, the signal output stage circuit sets the number of the plurality of enabled signal output sub-circuits as a third quantity, wherein the first load impedance threshold is greater than the second load impedance threshold, the first quantity is greater than the third quantity, and the third quantity is greater than the second quantity (see figs. 2-10 and col. 5, line 12-col. 7, line 67).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to combine the teaching of Wu into the teaching of Ohara to provide a charge pump based voltage regulator with smart power regulation employs an architecture that requires that the charge pump current be a linear combination of the load current and a clamp current with a possible offset current. The smart power regulation is based on automatic load activity (or load current) detection using the clamp current. The clamp current and the filtered charge pump current are compared with one another; and the charge pump current is then adjusted accordingly by stepping the frequency of the clock driving the charge pump, optimizing the power consumption of the entire voltage regulator with varying load activity. The negative voltage regulation is independent of the integrated circuit positive supply voltage. In one embodiment, a derivative of the desired output voltage is compared with a reference voltage to generate a clamp current control signal. In another embodiment, the reference voltage is solely positive.
Consider Claim 7, Ohara does not explicitly teach the signal generator wherein when the load impedance is greater than a first load impedance threshold and the operating voltage is greater than a first voltage threshold, the negative voltage generator circuit sets the number of the plurality of enabled charge pump circuits as a first quantity; when the load impedance is greater than the first load impedance threshold and the operating voltage is not greater than the first voltage threshold, the negative voltage generator circuit sets the number of the plurality of enabled charge pump circuits as a second quantity; when the load impedance is not greater than the first load impedance threshold and the operating voltage is greater than the first voltage threshold, the negative voltage generator circuit sets the number of the plurality of enabled charge pump circuits as a third quantity; when the load impedance is not greater than the first load impedance threshold and the operating voltage is not greater than the first voltage threshold, the negative voltage generator circuit sets the number of the plurality of enabled charge pump circuits as a fourth quantity, wherein the second quantity > the fourth quantity = the first quantity > the third quantity.
However, Wu teaches the signal generator wherein when the load impedance is greater than a first load impedance threshold and the operating voltage is greater than a first voltage threshold, the negative voltage generator circuit sets the number of the plurality of enabled charge pump circuits as a first quantity; when the load impedance is greater than the first load impedance threshold and the operating voltage is not greater than the first voltage threshold, the negative voltage generator circuit sets the number of the plurality of enabled charge pump circuits as a second quantity; when the load impedance is not greater than the first load impedance threshold and the operating voltage is greater than the first voltage threshold, the negative voltage generator circuit sets the number of the plurality of enabled charge pump circuits as a third quantity; when the load impedance is not greater than the first load impedance threshold and the operating voltage is not greater than the first voltage threshold, the negative voltage generator circuit sets the number of the plurality of enabled charge pump circuits as a fourth quantity, wherein the second quantity > the fourth quantity = the first quantity > the third quantity (see figs. 2-10 and col. 5, line 12-col. 7, line 67).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to combine the teaching of Wu into the teaching of Ohara to provide a charge pump based voltage regulator with smart power regulation employs an architecture that requires that the charge pump current be a linear combination of the load current and a clamp current with a possible offset current. The smart power regulation is based on automatic load activity (or load current) detection using the clamp current. The clamp current and the filtered charge pump current are compared with one another; and the charge pump current is then adjusted accordingly by stepping the frequency of the clock driving the charge pump, optimizing the power consumption of the entire voltage regulator with varying load activity. The negative voltage regulation is independent of the integrated circuit positive supply voltage. In one embodiment, a derivative of the desired output voltage is compared with a reference voltage to generate a clamp current control signal. In another embodiment, the reference voltage is solely positive.
Conclusion
10. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. Bramadass et al.(US 2020/030411) is cited to show other SIGNAL GENERATOR.
11. Any response to this action should be mailed to:
Mail Stop ____(explanation, e.g., Amendment or After-final, etc.)
Commissioner for Patents
P.O. Box 1450
Alexandria, VA 22313-1450
Facsimile responses should be faxed to:
(571) 273-8300
Hand-delivered responses should be brought to:
Customer Service Window
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401 Dulany Street
Alexandria, VA 22314
Any inquiry concerning this communication or earlier communications from the examiner
should be directed to Lao,Lun-See whose telephone number is (571) 272-7501 The examiner
can normally be reached on Monday-Friday from 8:00 to 5:30.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's
supervisor, Nguyen Duc M, can be reached on (571) 272-7503.
Any inquiry of a general nature or relating to the status of this application or proceeding
should be directed to the Technology Center 2600 whose telephone number is (571) 272-2600.
/LUN-SEE LAO/Primary Examiner,
Art Unit 2651 Patent Examiner
US Patent and Trademark Office
Knox
571-272-7501
Date 08-05-2026
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