DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are presented for examination.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
As per claim 1:
Line 5, the use of “storage” without any further limitation makes it unclear whether “storage” is a separate or a part of the first or second storage media or both media. For the examination purpose, “storage” is interpreted as either a separate or a part of the first or the second or both of the storage media.
Line 7, what does “block” referring to? what is the relationship of the “block” with the storage device and/or first and second storage media? For the purpose of examination, “block” will be interpreted as a memory block within either first or second storage media.
As per claim 6:
Line 2, “metadata” lacks proper antecedent basis.
For claims 2-9:
The claims are also rejected as including the deficiencies in the independent claim 1.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,500,752 Although the claims at issue are not identical, they are not patentably distinct from each other because the patent claims [cited as line numbers in the parentheses] teach the instant claims as follows:
As per claim 1:
The patent claim 1 teaches a storage device [line 1], comprising: a first storage media to store a first data, the first storage media being a first storage type [lines 2-4]; a second storage media to store a second data, the second storage media being a second storage type different from the first storage type [lines 5-8] ; storage to store a first log data for the first storage media and a second log data for the second storage media [lines 10-14]; and a circuit configured to predict a block with a first parameter will perform in a predetermined manner based at least in part on the first log data or the second log data [lines 15-17]. .
The patent claim 1 clearly teaches each of the claimed limitations of the instant claim 1. The instant claim 1, therefore, is anticipated by the patent claim 1.
For claims 2-20:
The claimed limitations in claims 2-20 can also be found in the patent claims 2-20.
Claims1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,229,030. Although the claims at issue are not identical, they are not patentably distinct from each other because the patent claims [cited as line numbers in the parentheses] teach the instant claims as follows:
As per claim 1:
The patent claim 1 teaches a storage device [line 1], comprising: a first storage media to store a first data, the first storage media being a first storage type [lines 2-3]; a second storage media to store a second data, the second storage media being a second storage type different from the first storage type [lines 4-6] ; storage to store a first log data for the first storage media and a second log data for the second storage media [lines 9-10]; and a circuit configured to predict a block with a first parameter will perform in a predetermined manner (i.e., the first property) based at least in part on the first log data or the second log data [lines 11-13]. .
The patent claim 1 clearly teaches each of the claimed limitations of the instant claim 1. The instant claim 1, therefore, is anticipated by the patent claim 1.
For claims 2-20:
The claimed limitations in claims 2-20 can also be found in the patent claims 2-20.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
As per claim 1:
The claim recites “to predict …”, as drafted, is a process that, under its broadest reasonable interpretation, covers a judgement operation but for the recitation of generic computer components. That is, other than reciting “a circuit configured to predict …” nothing in the claim precludes the step from practically being perform by human using pen and paper. If a claim limitation, under its broadest reasonable interpretation, covers observations, evaluations or judgments but for the recitation of generic computer components, then it falls within the “Mental Process” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
This judicial exception is not integrated into a practical application because, in particular, the claim recites the additional elements of a “first storage media”, “second storage media”, a “circuit” and the three “storing” steps . The “first storage media”, “second storage media” and a “circuit” are recited at a high-level of generality such that they amount to no more than mere instructions to apply the exception using generic computer components (see MPEP 2106.05(f)). The three storing steps amount to no more than mere data gathering and output which is insignificant extra-solution activity (see MPEP 2106.05(g)). Accordingly, the additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception because, as discussed above with respect to integration of the abstract idea into a practical application, the additional elements of a “first storage media”, “second storage media” and a “circuit” are generic computer components recited at a high level of generality amount to no more than mere instructions to apply the exception using generic computer components. Mere instructions to apply an exception using generic computer components cannot provide an inventive concept. Additionally, the three “storing” steps are “storing and retrieving information in memory” which the courts have found to be a well-understood, routine, and conventional activity (see MPEP 2106.05(d)(II)(iv)).The claim is not patent eligible.
As per claim 10:
The claim recites “tracking” and predicting” steps, as drafted, is a process that, under its broadest reasonable interpretation, covers an observation, evaluation and judgement operation but for the recitation of generic computer components. That is, other than reciting “tracking parameters on a storage device …” nothing in the claim precludes the step from practically being perform by human using pen and paper. If a claim limitation, under its broadest reasonable interpretation, covers observations, evaluations or judgments but for the recitation of generic computer components, then it falls within the “Mental Process” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
This judicial exception is not integrated into a practical application because, in particular, the claim recites the additional elements of a “storage device” and “storing” step. The “storage device” is recited at a high-level of generality such that they amount to no more than mere instructions to apply the exception using generic computer components (see MPEP 2106.05(f)). Additionally, the “storing” step amount to no more than mere data gathering and output which is insignificant extra-solution activity (see MPEP 2106.05(g)). Accordingly, the additional element does not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception because, as discussed above with respect to integration of the abstract idea into a practical application, the additional elements of a “storage device” is generic computer component recited at a high level of generality amount to no more than mere instructions to apply the exception using generic computer components. Mere instructions to apply an exception using generic computer components cannot provide an inventive concept. Lastly, the “storing” step is “storing and retrieving information in memory” which the courts have found to be a well-understood, routine, and conventional activity (see MPEP 2106.05(d)(II)(iv)). The claim is not patent eligible.
As per claim 17:
The claim recites “tracking” and predicting” steps, as drafted, is a process that, under its broadest reasonable interpretation, covers an observation, evaluation and judgement operation but for the recitation of generic computer components. That is, other than reciting “instructions … executed by a machine…” nothing in the claim precludes the step from practically being perform by human using pen and paper. If a claim limitation, under its broadest reasonable interpretation, covers observations, evaluations or judgments but for the recitation of generic computer components, then it falls within the “Mental Process” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
This judicial exception is not integrated into a practical application because, in particular, the claim recites the additional elements of a “machine”, “storage device” and “storing” step. The “machine” and “storage device” are recited at a high-level of generality such that they amount to no more than mere instructions to apply the exception using generic computer components (see MPEP 2106.05(f)). Additionally, the “storing” step amount to no more than mere data gathering and output which is insignificant extra-solution activity (see MPEP 2106.05(g)). Accordingly, the additional element does not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception because, as discussed above with respect to integration of the abstract idea into a practical application, the additional elements of a “machine” and “storage device” are generic computer component recited at a high level of generality amount to no more than mere instructions to apply the exception using generic computer components. Mere instructions to apply an exception using generic computer components cannot provide an inventive concept. Lastly, the “storing” step is “storing and retrieving information in memory” which the courts have found to be a well-understood, routine, and conventional activity (see MPEP 2106.05(d)(II)(iv)). The claim is not patent eligible.
For claims 2-9, 11-16 and 18-20:
The further claimed limitations appear to only further define certain characteristics of the generic computer components, which limits the claims to a certain field of use and technological environment (see MPEP 2106.05(h). Therefore, the dependent claims are also rejected under 101.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim, US Patent No. 11,481,272 [hereinafter, Kim] in view of Agarwal et al., US, 2018/0217751 [hereinafter, Agarwal].
As per claim 1:
Kim teaches a storage device [figure 1, storage device 50], comprising: a first storage media [memory device 100] to store a first data, the first storage media being a first storage type [col. 4, lines 23-32, the memory device can be either SLC or MLC type]; a second storage media [one of the multiple NVMs 3221, 322 and 3223 of figure 24] to store a second data, col. 5, lines 23-39, device information including information including erase counts, refresh counts and others are provided from the memory device to the flash translation layer]; and a circuit [e.g., the flash translation layer 210 in conjunction with the bad block controller 220] configured to predict a block with a first parameter will perform in a predetermined manner based at least in part on the first log data or the second log data [col. 5, lines 40-60, device health descriptor is generated by the flash translation layer based on the device information and the bad block controller determine whether to recycle bad blocks based on the DHD] .
Kim, however, does not explicitly disclose that the second storage media being a second storage type different from the first storage type.
Agarwal explicitly teaches that SLC and MLC memory blocks are configured in the same storage device for selectively caching write data into SLC blocks prior to folding the data from the SLC to the MLC blocks when the MLC blocks are determined to be unhealthy [see the abstract, figure 6 and para. 0051].
It would have been obvious to one having ordinary skill in the art prior to the effective filing date of the claimed invention to employ both SLC and MLC memories in the Kim memory device, as taught by Agarwal. The tradeoff between speed advantages and more data write failure protection provides sufficient suggestion and motivation to one having ordinary skill in the art to do such memories utilization in the Kim memory device [see Agarwal, para. 0001]. Furthermore, it would have been obvious to one having ordinary skill in the art to configure the Kim-Agarwal memory device to track and determine bad blocks in both SLC and MLC memories, as suggested by Kim [see again Kim col. 4, lines 23-32, the memory device can be either SLC or MLC type].
As per claim 2:
The further claimed limitations of “wherein: the first storage type includes a first parameter; and the second storage type includes a second parameter, wherein the first parameter and the second parameter are different” would follow necessarily when the teaching of Agarwal is incorporated into that of Kim since Agarwal teaches that the memory health designation based on bit error rate (BER) determined for each memory blocks [see Agarwal, abstract and para. 0020]
For claims 3-4, 11 and 18:
The further claimed limitations of “wherein the storage further stores: a first set of properties in the first storage media in the storage device; and a second set of properties in the second storage media in the storage device” and that the first set of properties in the first storage media includes a first number of properties; and the second set of the properties in the second storage media includes a second number of properties” would follow necessarily when the teaching of Agarwal is incorporated into that of the Kim. This is because a set of properties such as SLC, MLC, capacity , number of blocks , etc. would have been included for each of the MLC and SLC memories [see Agarwal figure 6, para. 0020, SLC blocks and MLC blocks are taught].
As per claim 5:
The further claimed limitations of “wherein the first number of properties and the second number of properties are in proportion to a first capacity of the first storage media and a second capacity of the second storage media” would also follow necessarily when he teaching of Agarwal is incorporated into that of Kim. This is because it has been known and common practiced in the art that the numbers of blocks would have been based on the storage capacity of the memory.
As for claims 6 and 12:
The further claimed limitation of “the metadata storage is further configured to store a third data regarding properties in the storage device; and the storage device further comprises a second circuit configured to predict that the block including the first parameter will perform in a predetermined manner based at least in part on the first log data the second log data, or the third data” is also taught by Kim [see again col. 5, lines 23-39; there are more than three type of device information are being stored] .
For claims 7-8, 13-16 and 19-20:
It is common sense to use different model for different storage types such as SLC and MLC in determining bad blocks or predicting blocks to fail . This is because each storage type has different characteristics in term error rates, speed, workload, etc. [official Notice is taken].
Accordingly, it would have been obvious to one having ordinary skill in the art to configure the Kim-Agarwal storage controller to use a different model in predicting block to fail for SLC memory blocks from that of the MLC memory blocks.
As per claim 9:
Agarwal also teaches bit error rate as mentioned above [see again the abstract, para. 0020]. The further claimed limitations of “wherein the circuit is configured to derive an average data based at least in part on the first log data or the second log data for a selected storage type associated with the block” would follow necessarily..
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Nangoh, US 2017/0228161, teaches end-of-life prediction of a memory device using write counts [see para. 0098].
Tuers et al., US 2016/0148708, teaches error logs for SLC and MLC memory blocks [see para. 0098].
Frost et al., US 2012/0166715, teaches a memory system that maintain records of data errors and the physical structures associated with those errors [see para. 0179].
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/HIEP T NGUYEN/Primary Examiner, Art Unit 2137