DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Werner (pub #US 20240428104 A1).
Regarding claim 1, Werner discloses a method (method of operating the system shown in figure 1) comprising: obtaining a first quantum circuit (one of the quantum circuits 110, figure 1); obtaining a second quantum circuit (another of the quantum circuits 110, figure 1; examiner notes that the system includes multiple external devices 101, running quantum jobs that includes one or more quantum circuits 110; paragraph 38); initiating execution of the first quantum circuit on a quantum execution platform (quantum job 109, paragraph 38); during execution of the first quantum circuit, initiating execution of the second quantum circuit on the quantum execution platform in parallel with the first quantum circuit (simultaneous quantum jobs, paragraph 31); and sharing quantum resources between the first quantum circuit and the second quantum circuit during their parallel execution (qubit sharing, paragraph 31), wherein the sharing comprises allocating at least one qubit from the first quantum circuit to the second quantum circuit during execution (sharing qubits across simultaneous quantum jobs, paragraph 82; details of the process explained figures 4-8, paragraphs following paragraph 82)
Regarding claim 2, the above discloses the method of claim 1, wherein the at least one qubit allocated from the first quantum circuit to the second quantum circuit is an idle qubit in the first quantum circuit (sharing qubits reduces idle qubits, paragraph 26).
Regarding claim 3, the above discloses the method of claim 2, wherein the idle qubit is allocated to the second quantum circuit for a predetermined number of cycles (coherence time, a period during which the qubit is used to perform operations; paragraph 42).
Regarding claim 4, the above discloses the method of claim 3, further comprising returning the allocated qubit to the first quantum circuit after the predetermined number of cycles (this is implied because the qubits are shared, and not permanently assigned to a quantum circuit, paragraph 31).
Regarding claim 5, the above discloses the method of claim 1, wherein sharing quantum resources comprises dynamically allocating qubits between the first and second quantum circuits based on real-time availability (for dynamic quantum job execution, paragraph 29; based partially on a qubit coherence time, reset time, execution time paragraph 42, 46).
Regarding claim 6, the above discloses the method of claim 5, further comprising maintaining a qubit pool to track available qubits for allocation between the first and second quantum circuits (identifying qubit groups for dynamic reset and reuse for another computation).
Regarding claim 7, the above discloses the method of claim 6, wherein the qubit pool comprises at least one of: clean qubits, dirty qubits, auxiliary qubits, or non-auxiliary qubits (identify qubits for starting state, quantum gate structure, matched, or overlapping, paragraph 95-97; and store information of the qubits in a quantum system information database, paragraph 98; note these identified qubits traits can be considered clean or dirty, auxiliary or non-auxiliary).
Regarding claims 8-20, examiner notes these claims are substantially similar to claims 1-7 above. The same grounds of rejection are applied.
Conclusion
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/SCOTT C SUN/Primary Examiner, Art Unit 2181