Detailed Action
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . See 35 U.S.C. § 100 (note).
Art Rejections
Obviousness
The following is a quotation of 35 U.S.C. § 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 6 are rejected under 35 U.S.C. § 103 as being unpatentable over the combination of US 2015/0115331 (published 30 April 2015) (“Moon”) and US Patent Application Publication 2005/0169107 (published 04 August 2005) (“Thomenius”).
Claims 2 and 3 are rejected under 35 U.S.C. § 103 as being unpatentable over the combination of Moon, Thomenius and Learn About Electronics, Field Effect Transistors (MOSFETS), Module 4.3, https://web.archive.org/web/20201130022232/https://learnabout-electronics.org/Semiconductors/fet_03a.php (archived 30 November 2020) (last accessed 18 August 2026) (“LAE I”).
Claim 4 is rejected under 35 U.S.C. § 103 as being unpatentable over the combination of Moon, Thomenius, LAE I and Learn About Electronics, Junction Field Effect Transistors (JFETS), Module 4.2, https://web.archive.org/web/20201130022210/https://learnabout-electronics.org/Semiconductors/fet_02a.php (archived 30 November 2020) (last accessed 18 August 2026) (“LAE II”).
Claim 5 is rejected under 35 U.S.C. § 103 as being unpatentable over the combination of Moon; Thomenius; Wikipedia, Buffer Amplifier, https://web.archive.org/web/20211206200248/https://en.wikipedia.org/wiki/Buffer_amplifier (archived 06 December 2021) (last accessed 18 August 2026) (“Wiki)” and Satyajit Mohanty and Mitali Mohapatra, An Overview of CMOS Inverter as Analog Circuit, 31 Int’l J. of Eng’g, Management, Humanities and Social Sciences Paradigms 667 (January 2019) (“Mohanty”).
Claim 1 is drawn to “an acoustic element.” The following table illustrates the correspondence between the claimed acoustic element and the Moon reference.
Claim 1
The Moon Reference
“1. An acoustic element, comprises:
The Moon reference describes a sensor corresponding to the claimed acoustic element. Moon’s sensor is described through multiple embodiments that differ in the type of electrostatic element they employ. In particular, Moon’s first embodiment includes a substrate 100 that includes a FET formed by source 110, drain 120 and channel portion 130. Id. at ¶¶ 40, 41, 45, FIG.1. A membrane 200 is formed on top of substrate 100 and includes a side portion (i.e., plate) 210 and a central portion (i.e., diaphragm) 220. Id. The first embodiment also includes an electret-type electrostatic member 300 on the underside of central portion 220. Id. Moon describes the third embodiment as being substantially the same as the first embodiment, but differing in that it replaces member 300 with a piezoelectric element 500 connected on one end to a transmitting member extending from central portion 220 and connected at the other end to channel portion 130 of the FET. Id. at ¶¶ 70, 71, FIG.3.1 The Moon reference lists several possible applications for its sensors, including sensing pressure, such as pressure from sound waves. Id. at ¶¶ 2, 4, 5, 47, 49, 54, 65, 72, 75.
“a voltage generation part, having a vibrating body and
“a fixed potential electrode in contact with the receiving surface of the vibrating body, and
“at least a piezoelectric layer is provided at a stress concentration position, which is a part of the vibrating body, on the output surface side of the vibrating body opposite to the receiving surface;
Moon’s third embodiment includes a corresponding voltage generation part. In particular, Moon’s third embodiment includes a membrane 200 with a central portion 220 that acts as a vibrating body. Id. at ¶ 71, FIG.3. Covering the top (i.e., receiving surface) of central portion 220 is a shielding member 400 that is grounded (i.e., it is conductively connected to a fixed potential). Id. at ¶ 49, FIGs.1, 3. The bottom side (i.e., output surface side) of central portion 220 includes a piezoelectric member 500, or piezoelectric layer. Id. at ¶ 71, FIG.3. Piezoelectric member 500 is located at a stress concentration position of central portion 220—namely, piezoelectric member 500 is located at the center of transmission member 600, which acts as a stress concentration position by amplifying and transmitting the stress on central portion 220 caused by external signal 2 to piezoelectric member 500. Id. at ¶¶ 71, 74, 75, FIG.3.
“an impedance transformation element, which uses a specific local area corresponding to the stress concentration position of the piezoelectric layer as a potential transmission area, and operates with the potential of the potential transmission area as a control voltage; and
Substrate 100 includes a FET formed by drain 110, source 120 and channel portion 130. Id. at ¶ ¶ 71–73, FIG.3. Like the claimed impedance transformation element, Moon’s FET uses the central stress concentration portion of piezoelectric member 500 (i.e., the portion connected to transmission member 600) as a potential transmission area to transmit the potential created by stress in piezoelectric member 500 to channel portion 130. See id. at ¶¶ 74–75, FIG.3. The FET acts as an impedance transformation element by converting the high output impedance of a miniature sensor to a low output impedance. Id. at ¶¶ 4, 30, 31.
“the pressure of ultrasonic waves applied to the vibrating body is used as the output signal of the impedance transformation element.”
Moon describes converting an input pressure signal 2 into an output from the FET. Id. at ¶¶ 55, 76.
While Moon describes tuning the sensor to a desired frequency range, Moon does not describe configuring its sensor to respond to ultrasonic (acoustic) waves. Id. at ¶ 49.
Table 1
The table above shows that the Moon reference describes a sensor that corresponds closely to the claimed acoustic element. The Moon reference does not anticipate the claimed invention because it does not describe tuning its sensor to detect ultrasonic waves.
The differences between the claimed invention and the Moon reference are such that the invention as a whole would have been obvious to one of ordinary skill in the art at the time this Application was effectively filed. While Moon does not anticipate tuning its sensor to detect ultrasonic acoustic pressure waves, the Moon reference does describe techniques for tuning the sensor to exhibit a desired resonance in order to respond to a desired frequency range. Moon at ¶ 49. One of ordinary skill would have reasonably understood that Moon’s disclosure is drawn to integrated sensors created through MEMS techniques. See id. at ¶¶ 3, 5, 7–9 (describing problems in prior art devices formed through MEMS to create CMOS ICs that are overcome by Moon’s invention).
The Thomenius reference relates to Moon because it too is drawn to MEMS sensors. Thomenius at ¶¶ 3, 9, 14. Thomenius describes a particular arrangement of MEMS sensors known as a micromachined ultrasonic transducer (MUT) array. Id. at ¶¶ 3–5, 14. The MUT array combines multiple, independent MEMS sensor elements 32 into an integrated array formed on a shared substrate that provides a switching layer of corresponding CMOS elements 50. Id. at ¶¶ 40, 46, 53, FIGs.2, 4. Each sensor is tuned to react to ultrasonic acoustic waves in order to produce spatial sensing functions, useful in medical imaging and non-destructive evaluations of materials. Id. at ¶ 40.
In light of Moon’s teachings on sensors and Thomenius’s teachings on MUT arrays, it would have been obvious to create a MUT array formed by Moon’s sensors. See MPEP § 2143(B) (substituting Moon’s sensors into Thomenius’s MUT array); MPEP § 2143(D) (applying known techniques for tuning a sensor for ultrasonic sensing to a sensor ready for ultrasonic sensing in order to operate as an ultrasonic sensor). One of ordinary skill would have modified Moon’s sensors to respond to ultrasonic acoustic waves. To create the array, one of ordinary skill would have integrated Moon’s sensors together in a shared substrate in a similar manner to the way Thomenius teaches integrated multiple MUT sensors 32 into an array. One of ordinary skill would have reasonably expected that the resulting MUT array would allow for ultrasonic imaging. See Thomenius at ¶ 3. Further, one of ordinary skill would have reasonably expected that using Moon’s sensors in the MUT array would also produce benefits associated with Moon’s sensors, including increased sensitivity. See Moon at ¶ 7. For the foregoing reasons, the combination of the Moon and the Thomenius references makes obvious all limitations of the claim.
Claim 2 depends on claim 1, and further requires the following:
“wherein the impedance conversion element comprises:
“a base region, consisting of a semiconductor region of the first conductivity type;
“first and second main electrode regions, consisting of semiconductor regions of the second conductivity type arranged above the base region and spaced apart from each other; and
“a potential transfer region bonded to the upper surface of the base region located between the first main electrode region and the second main electrode region, so that the potential of the potential transfer region controls the height of the potential barrier generated in the channel between the first main electrode region and the second main electrode region.”
The Moon reference similarly describes its sensor as having a FET-type conversion element. Moon at ¶¶ 72, 73, 75, FIG.3. Moon’s FET includes a base region formed by a semiconductor substrate 100. Id. The FET includes source 110 and drain 120 that correspond to the claimed first and second main electrode regions since they are arranged on the upper surface of base 100 and are spaced from each other by channel 130. Id. The FET further includes channel portion 130 that corresponds to the potential transfer region since it is bonded to the upper surface of substrate 110 and is positioned between source 110 and drain 120. Id. In operation, the potential across piezoelectric member 500 acts like a gate by inducing a channel to form in channel region 130, allowing current to flow from source 110 to drain 120. Id.
One of ordinary skill would have understood Moon’s FET as closely resembling a MOSFET with piezoelectric 500 and the surface of channel region 130 forming the gate in place of a standard metal-oxide-semiconductor configuration. Compare Moon at FIG.3 with LAE at FIG.4.3.1. While Moon does not describe the conductivity type of substrate 100 and sources 110 and drain 120, it is well-known in the field of transistors to from a MOSFET with a drain and a source that are doped to have a conductivity that is opposite to that of the channel to form PN-junctions that prevent current flow when the device is shut off. See LAE at § MOSFET (IGFET Construction), FIG.4.3.1. Accordingly, it would have been obvious to implement Moon’s source 110 and drain 120 with one type of conductivity (e.g., N-type) while the substrate 100 exhibits another type of conductivity (e.g., P-type). See MPEP § 2143(I)(C) (use of the known technique of doping a FET’s sources and drains oppositely to the substrate in a similar FET in the same way). For the foregoing reasons, the combination of the Moon, the Thomenius and the LAE references makes obvious all limitations of the claim.
Claim 3 depends on claim 1, and further requires the following:
“wherein the impedance transformation element comprises:
“a base region composed of a semiconductor region of a first conductivity type;
“first and second main electrode regions composed of semiconductor regions of a second conductivity type arranged above the base region and spaced apart from each other;
“a gate dielectric film in contact with the upper surface of the base region located between the first main electrode region and the second main electrode region, and having a wider bandgap than the base region; and
“a control electrode arranged on the gate dielectric film and connected to the potential transfer region, so that the potential of the potential transfer region controls the height of the potential barrier generated in the channel between the first main electrode region and the second main electrode region.”
The Moon reference similarly describes its sensor as having a FET-type conversion element. Moon at ¶¶ 72, 73, 75, FIG.3. Moon’s FET includes a base region formed by a semiconductor substrate 100. Id. The FET includes source 110 and drain 120 that correspond to the claimed first and second main electrode regions since they are arranged on the upper surface of base 100 and are spaced from each other by channel 130. Id. The FET further includes channel portion 130 that corresponds to the potential transfer region since it is bonded to the upper surface of substrate 110 and is positioned between source 110 and drain 120. Id. In operation, the potential across piezoelectric member 500 acts like a gate by inducing a channel to form in channel region 130, allowing current to flow from source 110 to drain 120. Id.
Moon’s FET, however, does not anticipate the claimed FET because Moon’s FET does not include the claimed gate dielectric that is in contract with the upper surface of a base region between the source and drain and has a wider bandgap than the base region. Moon also does not describe a control electrode arranged on the gate dielectric film and connected to the potential transfer region as claimed.
One of ordinary skill would have understood Moon’s FET as closely resembling a MOSFET with piezoelectric 500 and the surface of channel region 130 forming the gate in place of a standard metal-oxide-semiconductor configuration. Compare Moon at FIG.3 with LAE at FIG.4.3.1. While Moon does not describe the conductivity type of substrate 100 and sources 110 and drain 120, it is well-known in the field of transistors to from a MOSFET with a drain and a source that are doped to have a conductivity that is opposite to that of the channel to form PN-junctions that prevent current flow when the device is shut off. See LAE at § MOSFET (IGFET Construction), FIG.4.3.1. Accordingly, it would have been obvious to implement Moon’s source 110 and drain 120 with one type of conductivity (e.g., N-type) while the substrate 100 exhibits another type of conductivity (e.g., P-type). See MPEP § 2143(I)(C) (use of the known technique of doping a FET’s sources and drains oppositely to the substrate in a similar FET in the same way).
Further, while Moon does not describe forming a gate with a gate dielectric film and a control electrode as claimed, those are both typical elements of a MOSFET. See LAE at § MOSFET (IGFET Construction), FIG.4.3.1. This known MOSFET configuration would have reasonably suggested modifying the FET of Moon’s sensor to similarly include a silicon dioxide insulating layer and aluminum electrode between substrate 100 and piezoelectric member 500. See MPEP § 2143(I)(C) (applying a known MOSFET configuration (metal-oxide-semiconductor gate) to a similar FET in the same way). For the foregoing reasons, the combination of the Moon, the Thomenius and the LAE references makes obvious all limitations of the claim.
Claim 4 depends on claim 1, and further requires the following:
“wherein the impedance transformation element comprises:
“a base region, composed of a semiconductor region of the first conductivity type;
“first and second main electrode regions, composed of semiconductor regions of the first conductivity type arranged in the base region and spaced apart from each other, with a higher impurity density than the base region;
“a surface control electrode region, composed of a semiconductor region of the second conductivity type arranged above the base region between the first main electrode region and the second main electrode region, forming a p-n junction with the base region;
“an auxiliary control electrode region, composed of a semiconductor region of the second conductivity type arranged below the surface control electrode region opposite the base region, defining a channel region between the first main electrode region and the second main electrode region sandwiched therebetween; and
“a control electrode, metallurgically connected to the surface control electrode region and connected to the potential transfer region, so that the potential barrier height generated in the channel is controlled by the potential of the potential transfer region.”
The Moon reference describes its sensor as having a FET-type conversion element, or as a voltage-controlled transistor. Moon at ¶¶ 72, 73, 75, FIG.3. Moon’s FET includes a base region formed by a semiconductor substrate 100. Id. The FET includes source 110 and drain 120 that correspond to the claimed first and second main electrode regions since they are arranged on the upper surface of base 100 and are spaced from each other by channel 130. Id. The FET further includes channel portion 130 that corresponds to the potential transfer region since it is bonded to the upper surface of substrate 110 and is positioned between source 110 and drain 120. Id. In operation, the potential across piezoelectric member 500 acts like a gate by inducing a channel to form in channel region 130, allowing current to flow from source 110 to drain 120. Id. One of ordinary skill would have understood Moon’s FET as closely resembling a MOSFET with piezoelectric 500 and the surface of channel region 130 forming the gate in place of a standard metal-oxide-semiconductor configuration. Compare Moon at FIG.3 with LAE at FIG.4.3.1. Because Moon’s FET resembles a MOSFET, it is not a JFET as claimed and does not reflect the configuration of parts presented in this claim.
The structure of a JFET and the use of a JFET as an alternative type of voltage-controlled transistor in place of a MOSFET are well known. See LAE II at § Operation Below Pinch Off, FIG.4.2.1, FIG.4.2.1. A JFET includes a base region, such as an N-type material in which an N-type channel will be formed. Id. Within the N-type base channel region, a JFET also includes a first source main electrode spaced apart from a second drain main electrode doped more than the N-type base as N+ regions. Id. The JFET further includes a surface control electrode region of P-type semiconductor material formed on top of the N-type channel and between the N+-type source and drain (i.e., first and second main electrodes). Id. An auxiliary control electrode region is formed by a P-type substrate below the N-type material in order to define the N-type channel between the source and drain based on the thickness of the depletion layer formed between the auxiliary control electrode and the N-type material in which the channel exists. Id. The JFET includes a control electrode on top of the P-type gate. Id.
Moon’s FET resembles a conventional MOSFET. While Moon does not describe forming its FET as the claimed JFET the use of a JFET in place of a MOSFET is a known prior art technique. See LAE I at § The Insulated Gate FET; LAE II at § Operation Below Pinch Off, FIG.4.2.1. This known JFET configuration would have reasonably suggested modifying the FET of Moon’s sensor to similarly include the claimed JFET elements. See MPEP § 2143(I)(C) (applying a known JFET configuration to a similar FET in the same way). Moon’s sensor would then connect piezoelectric element 500 to the gate electrode of the JFET so the potential on the piezoelectric would be used as a control for the height of the JFET’s channel. For the foregoing reasons, the combination of the Moon, the Thomenius, the LAE I and the LAE II references makes obvious all limitations of the claim.
Claim 5 depends on claim 1, and further requires the following:
“wherein the impedance transformation element is a CMOS inverter, and the input electrode of the CMOS inverter is connected to the potential transfer region, whereby the potential barrier height generated in the respective channels of the p-type active element and n-type active element of the CMOS inverter is controlled by the potential of the potential transfer region.”
The Moon reference similarly teaches and suggests integrating its sensor with a FET that acts as an impedance converter by converting the high output impedance of a piezoelectric device into a low output impedance element. Moon at ¶¶ 30, 31. One of ordinary skill would have recognized that the FET is being used a buffer to provide a desirable low output impedance. See Wiki at 1, 2, FIG.2. The Mohanty reference further teaches the use of a CMOS inverter as an amplifier with gain and output impedance chosen through resistive feedback. Mohanty at 671–673, FIGs.4, 5. Thus, by understanding that Moon’s FET is operating as a buffer, and understanding that a buffer may be made by configuring a known inverter with unity gain and a low output impedance, it would have been obvious to have replaced the FET with other known amplifiers used for converting the high impedance of a sensor into a low output impedance. In particular, it would have been obvious to use a known CMOS inverter as Moon’s integrated amplifier in order to provide the impedance conversion effects of a buffer amplifier. See MPEP § 2143(I)(B), (C) (simple substitution of Moon’s FET with a known CMOS amplifier configured in a known way (unity gain) to become a known buffer amplifier). In this way, Moon’s piezoelectric member 500 would be connected to the gates of both the P-FET and N-FET of the CMOS inverter to control the potential barrier heigh of each element’s channel. For the foregoing reasons, the combination of the Moon, the Thomenius, the Wiki and the Mohanty references makes obvious all limitations of the claim.
Claim 6 depends on claim 1, and further requires the following:
“wherein the impedance transformation element is a semiconductor integrated circuit, and the potentials of a specific plurality of the potential transfer regions of the voltage generation section are independently transmitted as independent control voltages for a plurality of active elements included in the semiconductor integrated circuit, and the plurality of active elements are individually controlled.”
As shown in the obviousness rejection of claim 1, incorporated herein, it would have been obvious to modify Moon’s sensors to respond to ultrasonic frequencies and to use the modified sensors as independent sensors in a MUT array. The teachings of Moon further suggest implementing the sensor FET in a substrate 100 so that it can be integrated into a CMOS circuit. See Moon at ¶¶ 5, 71. Further, the Thomenius reference suggests using a substrate to integrate a FET with other elements of a CMOS unit 50 to create a switchable MUT array. See Thomenius at ¶¶ 53, 55, 63, FIGs.4, 10. The resulting MUT array would operate each of Moon’s sensors independently. See Thomenius at ¶ 46. Accordingly, the potential induced across each of Moon’s piezoelectric elements 500 will act as an independent control voltage for a corresponding FET in one of Thomenius’s CMOS units 50. See Moon at ¶ 72.
Summary
Claims 1–6 are rejected under at least one of 35 U.S.C. §§ 102 and 103 as being unpatentable over the cited prior art. In the event the determination of the status of the application as subject to AIA 35 U.S.C. §§ 102 and 103 (or as subject to pre-AIA 35 U.S.C. §§ 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. § 102(b)(2)(C) for any potential 35 U.S.C. § 102(a)(2) prior art against the later invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WALTER F BRINEY III whose telephone number is (571)272-7513. The examiner can normally be reached M-F 8 am-4:30 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Carolyn Edwards can be reached at 571-270-7136. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Walter F Briney III/
Walter F Briney IIIPrimary ExaminerArt Unit 2692
8/18/2026
1 It should be understood from Moon’s statement in ¶ 71 that Moon’s various descriptions of the first embodiment apply also to the third embodiment unless they are inconsistent with the differences concerning with use of a different type of electrostatic member.
Prosecution Insights