DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Dupraz (US Publication No. 20180019583).
Regarding claim 1, Dupraz discloses a solid-state circuit breaker (i.e., such as solid-state circuit breaker 10; see for example fig. 2 as shown below, para. [0014]- [0045]), comprising: a first input end (11) and a second input end (12) for receiving a power input (U-1); a first output end (13) and a second output end (14) for providing a power supply output (V-out); a first On-Off unit (15) comprising a first switching device (B-in) and a second switching device (B-out) connected in series between the first input end (11) and the first output end (13); a capacitor (C-PG), a first end (16) of the capacitor (C-PG) being connected to a node (16) between the first switching device (B-in) and the second switching device (B-out), and a second end (17) of the capacitor (C-PG) being connected to a node (17) between the second input end (12) and the second output end (14); and a bidirectional transient voltage suppression diode (T-PG) connected in parallel with the capacitor (C-PG).
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Allowable Subject Matter
Claims 2-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2, Dupraz teaches the invention set forth above. However, Dupraz does not particularly teach wherein the solid-state circuit breaker further comprises a switching unit comprising a first isolation switch and a second isolation switch, a first end of the first isolation switch being connected to the first input end, and a first end of the second isolation switch being connected to the second input end.
Hence claim 2 will be deemed allowable if rewritten in an independent form.
Claims 3-5 depend on objected claim 2, consequently claims 3-5 will also be deemed allowable.
Regarding claim 6, Dupraz teaches the invention set forth above. However, Dupraz does not particularly teach wherein the first On-Off unit further comprises a third diode and a fourth diode, the third diode being connected in parallel with the first switching device, and the fourth diode being connected in parallel with the second switching device.
Hence claim 6 will be deemed allowable if rewritten in an independent form.
Regarding claim 7, Dupraz teaches the invention set forth above. However, Dupraz does not particularly teach wherein the solid-state circuit breaker further comprises a second On-Off unit comprising a third switching device and a fourth switching device connected in series between the second input end and the second output end.
Hence claim 7 will be deemed allowable if rewritten in an independent form.
Claims 8-9 depend on objected claim 7, consequently claims 8-9 will also be deemed allowable.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUAAMAR Q AL-TAWEEL whose telephone number is (571)270-0339. The examiner can normally be reached 0730-1700.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V Tran can be reached at (571) 270- 1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MUAAMAR QAHTAN AL-TAWEEL/Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838