Prosecution Insights
Last updated: August 17, 2026
Application No. 19/003,882

FAULT DETECTION

Non-Final OA §102§103
Filed
Dec 27, 2024
Priority
Jan 11, 2024 — EU 24151445.4
Examiner
MCANDREW, CHRISTOPHER P
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Trane Technologies plc
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
844 granted / 982 resolved
+17.9% vs TC avg
Moderate +14% lift
Without
With
+13.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
29 currently pending
Career history
1000
Total Applications
across all art units

Statute-Specific Performance

§101
2.2%
-37.8% vs TC avg
§103
50.5%
+10.5% vs TC avg
§102
28.4%
-11.6% vs TC avg
§112
15.8%
-24.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 982 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-5, 8-12, & 14 are rejected under 35 U.S.C. 102(a)(1) & (a)(2) as being anticipated by Tang et al (U.S. PGPub # 2024/0003976). Regarding Independent claim 1, Tang teaches: A fault detection system for detecting a fault in a switch of a half-bridge of a circuit (200) in a transport refrigeration system, the fault detection system comprising: a voltage divider (Fig. 1 Elements 130, 166, 168, 170, & 172. See paragraphs 0013, 0017-0019, 0029, & elsewhere.); and processor circuitry (Fig. 1 Element 124. See paragraphs 0013, 0015, 0017, & elsewhere.), wherein: in use of the fault detection system, the voltage divider (Fig. 1 Elements 130, 166, 168, 170, & 172. See paragraphs 0013, 0017-0019, 0029, & elsewhere.) is coupled in parallel with a switch of a half-bridge of the circuit (Fig. 1 Elements 132, 134, 136, 138. See paragraphs 0013, 0017-0019, 0029, & elsewhere.); and an output of the voltage divider (Fig. 1 Elements 130, 166, 168, 170, & 172. See paragraphs 0013, 0017-0019, 0029, & elsewhere.) is coupled to an input of the processor circuitry (Fig. 1 Element 124. See paragraphs 0013, 0015, 0017, & elsewhere.), and wherein the processor circuitry is operative to: compare a detection signal indicative of a voltage at the output of the voltage divider to a reference signal (Fig. 4 -7 See paragraphs 0039-0049.); and responsive to a determination that the detection signal does not correspond to the reference signal, output a fault detection signal (Fig. 4 -7 See paragraphs 0039-0049.). PNG media_image1.png 720 510 media_image1.png Greyscale Regarding claim 2, Tang teaches all elements of claim 1, upon which this claim depends. Tang teaches in use of the fault detection system, the voltage divider is coupled in parallel with a low-side switch of a half-bridge of the circuit (Fig. 1 Elements 132, 134, 136, 138 which are parallel to Elements 130, 174, 176, , 166, 168, 170, & 172. See paragraphs 0013, 0017-0019, 0029, & elsewhere.). Regarding claim 3, Tang teaches all elements of claim 1, upon which this claim depends. Tang teaches the voltage divider is a resistive voltage divider comprising a first resistance connected in series with a second resistance (Fig. 1 Elements 130, 166, 168, 170, & 172 wherein the resistors are in series. See paragraphs 0013, 0017-0019, 0029, & elsewhere.). Regarding claim 4, Tang teaches all elements of claim 3, upon which this claim depends. Tang teaches the first resistance comprises a plurality of resistors connected in series, and the second resistance comprises a single resistor (Fig. 1 Elements 130, 141, 166, 168, 170, & 172 wherein the resistors are in series. See paragraphs 0013, 0017-0019, 0029, & elsewhere.). Regarding claim 5, Tang teaches all elements of claim 3, upon which this claim depends. Tang teaches the plurality of resistors of the first resistance and the single resistor of the second resistance are surface mount devices (Fig. 1 Elements 130, 141, 166, 168, 170, & 172 wherein the resistors are in series. See paragraphs 0013, 0017-0019, 0029, & elsewhere.). Regarding claim 8, Tang teaches all elements of claim 1, upon which this claim depends. Tang teaches the fault is an always-on fault (See paragraphs 0009-0010, 0023-0024, & elsewhere wherein the faults disclosed would need to be fixed, which would mean that once they occurred, they are on until fixed.). Regarding claim 9, Tang teaches all elements of claim 1, upon which this claim depends. Tang teaches the processor circuitry is operative to (Fig. 1 Element 124. See paragraphs 0013, 0015, 0017, & elsewhere.): compare the detection signal indicative of the voltage at the output of the voltage divider to a first reference signal (Fig. 2-7. Paragraphs 0031-0037, 0043, & 0063.); and responsive to a determination that the detection signal is less than the first reference signal, output a first fault detection signal indicative of an always-on fault in a low-side switch of the circuit (Fig. 2-7. Paragraphs 0031-0037, 0043, & 0063.). Regarding claim 10, Tang teaches all elements of claim 1, upon which this claim depends. Tang teaches the processor circuitry is operative to (Fig. 1 Element 124. See paragraphs 0013, 0015, 0017, & elsewhere.): compare the detection signal indicative of the voltage at the output of the voltage divider to a second reference signal (Fig. 2-7. Paragraphs 0031-0037, 0043, & 0063.); and responsive to a determination that the detection signal is greater than the second reference signal, output a second fault detection signal indicative of an always-on fault in a high-side switch of the circuit (Fig. 2-7. Paragraphs 0031-0037, 0043, & 0063.). Regarding claim 11, Tang teaches all elements of claim 1, upon which this claim depends. Tang teaches the circuit is an inverter circuit (Title & paragraphs 0002, 0004, & elsewhere.) or a multi level converter circuit. Regarding Independent claim 12, Tang teaches: A method for detecting a fault in a switch of a half-bridge of a circuit in a transport refrigeration unit, the method comprising: comparing, by processor circuitry (Fig. 1 Element 124. See paragraphs 0013, 0015, 0017, & elsewhere.), a signal indicative of an output voltage of a voltage divider (Fig. 1 Elements 130, 166, 168, 170, & 172. See paragraphs 0013, 0017-0019, 0029, & elsewhere.) coupled in parallel with a switch of a half-bridge of the inverter to a reference voltage (Fig. 1 Elements 130, 166, 168, 170, & 172. See paragraphs 0013, 0017-0019, 0029, & elsewhere.); and responsive to a determination by the processor circuitry that the detected voltage does not correspond to the reference voltage, indicating a fault condition (Title, Abstract, Paragraphs 0002-0003, 0009-0010, 0023-0024, 0032-0033, & elsewhere.). PNG media_image1.png 720 510 media_image1.png Greyscale Regarding claim 14, Tang teaches all elements of claim 1, upon which this claim depends. Tang teaches a machine-readable medium having stored thereon a computer program comprising instructions which, when executed by processing means, cause the processing means to perform the method of claim 12 (Fig. 1 Element 124. See paragraph 0013.). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Tang et al (U.S. PGPub # 2024/0003976). Regarding claim 13, Tang teaches all elements of claim 1, upon which this claim depends. Tang does not explicitly teach a transport refrigeration system comprising a circuit and a fault detection system according to claim 1. But it would have been obvious to one of ordinary skill in the art before the effective time of filing to have the circuit disclosed be used in any device that would require fault detection that works reliably. The end use of the device does not carry patentable weight. Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Tang et al (U.S. PGPub # 2024/0003976) in view of Timmons et al (U.S. PGPub # 2017/0307718). Regarding claim 6, Tang teaches all elements of claim 1, upon which this claim depends. Tang does not explicitly teach the voltage divider is configured to receive an input DC voltage in the range 0 – 900 volts and to output an output DC voltage in the range 0 – 5 volts. Timmons teaches the voltage divider is configured to receive an input DC voltage in the range 0 – 900 volts and to output an output DC voltage in the range 0 – 5 volts (Paragraphs 0004, 0061, 0080, 0087, & elsewhere wherein the ratio of voltage divider is disclosed in relation to the range of possible input voltages of 10V to 1000V.). It would have been obvious to one of ordinary skill in the art before the effective time of filing to apply the teachings of Timmons to the teachings of Tang such that the voltage divider is configured to receive an input DC voltage in the range 0 – 900 volts and to output an output DC voltage in the range 0 – 5 volts because this allows one to use various different circuits for a given task and “different circuits may be employed for different voltages (e.g. 100V, 1 kV, 10 kV) or different powers” reliably and dependably. See paragraph 0004 of Timmons. Regarding claim 7, Tang & Timmons teach all elements of claim 6, upon which this claim depends. Tang does not explicitly teach the voltage divider is configured such that a magnitude of the output DC voltage is approximately 1/300th of a magnitude of the input DC voltage. Timmons teaches the voltage divider is configured such that a magnitude of the output DC voltage is approximately 1/300th of a magnitude of the input DC voltage (Paragraphs 0004, 0061, 0080, 0087, & elsewhere wherein the ratio of voltage divider is disclosed as being anything from 10:1 to 100:1 which would encompass applicants claimed value.). It would have been obvious to one of ordinary skill in the art before the effective time of filing to apply the teachings of Timmons to the teachings of Tang such that the voltage divider is configured such that a magnitude of the output DC voltage is approximately 1/300th of a magnitude of the input DC voltage because this allows one to use various different circuits for a given task and “different circuits may be employed for different voltages (e.g. 100V, 1 kV, 10 kV) or different powers” reliably and dependably. See paragraph 0004 of Timmons. This is also routine optimization as discussed in MPEP Section 2144.05 II A. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The prior art listed but not cited represents the previous state of the art and analogous art that teaches some of the limitations claimed by applicant. The closest prior art found addressing the faults in the high-side or low-side switches is to Lee et al (U.S. PGPub # 2021/0021121). In paragraph 0079 it addresses the state of fault based on a comparison between a reference voltage and a measured value but arrives at the opposite result. If the detection signal is less than the first reference signal then Lee indicates a fault on the high-side. If the detection signal is greater than the second reference signal then Lee indicates a fault on the low-side. This is the opposite conclusion of applicant. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER P MCANDREW whose telephone number is (469)295-9025. The examiner can normally be reached Monday-Thursday 6-4:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak can be reached on 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTOPHER P MCANDREW/Primary Examiner, Art Unit 2858
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Prosecution Timeline

Dec 27, 2024
Application Filed
Jul 27, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
99%
With Interview (+13.9%)
2y 3m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 982 resolved cases by this examiner. Grant probability derived from career allowance rate.

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