Prosecution Insights
Last updated: August 17, 2026
Application No. 19/004,066

CAPACITOR

Non-Final OA §102§103
Filed
Dec 27, 2024
Priority
Jan 16, 2024 — JP 2024-004635
Examiner
DOLE, TIMOTHY J
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Panasonic Holdings Corporation
OA Round
1 (Non-Final)
74%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
204 granted / 274 resolved
+6.5% vs TC avg
Moderate +7% lift
Without
With
+6.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
12 currently pending
Career history
288
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
46.7%
+6.7% vs TC avg
§102
35.2%
-4.8% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 274 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The disclosure is objected to because of the following informalities: The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Appropriate correction is required. Claim Objections Claim 7 is objected to because of the following informalities: claim 7, which depends from claims 6 and 1, recites the limitation: “the insulation member” which lacks antecedent basis. Claim 2 first introduces “an insulation member”, it is suggested that claim 6 be amended to depend from claim 2. Appropriate correction is required. For the purpose of examination, claim 6 will be examined as if it depends on claim 2. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – Claim(s) 1 and 5 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by JP 5320960 (hereinafter referred to as JP ‘960). Regarding claim 1, JP ‘960 discloses a capacitor comprising: a capacitor element (fig, 1 (1)) that includes a first electrode (fig. 1 N-pole (bottom) electrode, page 4, paragraph 4) disposed on one end surface of the capacitor element, a second electrode (fig. 1 P-pole (top) electrode, page 4, paragraph 4) disposed on another end surface of the capacitor element, and a circumferential surface connecting the first electrode to the second electrode (fig. 1); a first bus bar (figs. 1 and 2 (3)) and a second bus bar (figs. 1 and 2 (2)) that are connected to the first electrode and the second electrode, respectively (figs. 1 and 2); a case (fig. 4 (8)) that houses the capacitor element (fig. 4); and a filler resin (page 4, paragraph 4 – resin mold (not shown)) in which the capacitor element, a part of the first bus bar, and a part of the second bus bar are embedded, the filler resin being filled inside the case (fig. 4, see also Background art section and fig. 13 for resin filled case), wherein: the circumferential surface includes a plane face (fig. 1 and 2), the first bus bar includes an opposing portion that has a flat-plate-shape and faces the plane face (fig. 2), and the opposing portion includes a protrusion (fig. 2 (4)) that protrudes toward the plane face and abuts the plane face (fig. 2). Regarding claim 5, JP’ ‘960 discloses the capacitor according to claim 1, wherein the protrusion includes a flat surface that abuts the plane face (figs. 2 and 12b, note the multiple embodiments in JP ‘960 may be used together, where fig. 12 specifically shows a flat surface for the protrusion abutting the plane face of the capacitor element (1)). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 2-4 and 6-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over JP ‘960 in view of Kawahata (US 2021/0343474). Regarding claim 2, JP ‘960 discloses the capacitor according to claim 1, wherein: the opposing portion faces the plane face from the first electrode to the second electrode (fig. 2). JP ‘960 fails to disclose an insulation member is disposed between the plane face and the opposing portion at a side close to the second electrode. Kawahata discloses a similar capacitor arrangement wherein an insulation member (fig. 4A and 6B (400)) is disposed between the plane face (fig. 6B, plane face of capacitor element 100) and the opposing portion (fig. 6B, opposing portion of bus bar 300) at a side close to the second electrode (fig. 6B, note the second electrode is the top electrode of the capacitor connected to bus bar 200). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to use the insulation member of Kawahata, in the invention of JP ‘960 for the purpose of fixing the bus bars together more securely (paragraph [0056]). Regarding claim 3, JP ‘960 discloses the capacitor according to claim 2, wherein the protrusion is provided on the opposing portion at a position closer to the first electrode than to the second electrode (figs. 2 and 5, noting figure 5 shows multiple additional locations for the placement of element 4, with some locations positioned closer to the first electrode than the second electrode). Regarding claim 4, JP’960 discloses the capacitor according to claim 3, wherein: the case includes an opening (fig. 4), a bottom portion facing the opening (fig. 4), and a side wall extending from an end of the bottom portion toward the opening (fig. 4), the capacitor element is arranged inside the case in a manner that the first electrode faces the bottom portion, and the opposing portion extends along the side wall inside the case (fig. 4). Regarding claim 6, JP’ ‘960 discloses the capacitor according to claim 1 (claim 2 based on examiner interpretation, above), wherein the opposing portion is parallel to the plane face (fig. 2). Regarding claim 7, JP ‘960 as modified by Kawahata discloses the capacitor according to claim 6, wherein a thickness of the insulation member is equal to a protrusion length of the protrusion (Kawahata fig. 6B, noting the insulation member is the thickness of the gap between capacitor 100 and bus bar 300, similar to the thickness of element 4 between capacitor 1 and bus bar 3 in JP ‘960). Regarding claim 8, JP ‘960 discloses the capacitor according to claim 6, wherein the opposing portion includes a plurality of protrusions arranged in a direction perpendicular to a direction of arranging the first electrode and the second electrode, the plurality of protrusions including the protrusion (figs. 2 and 5, noting figure 5 shows multiple additional locations for the placement of element 4, e.g. (4d) and (4e), wherein there is an element 4 for each capacitor element 1). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2022/0013298 – includes capacitor elements with bus bars, a case and resin filler. US 2019/0080850 – includes capacitor elements with bus bars, an insulation member, a case and resin filler, wherein the bus bar 400 is held in place by a hook 322 during resin filling. US 9,824,823 - includes capacitor elements with bus bars, a case and resin filler wherein bus bar 2 includes a bend that projects towards the capacitor element 1. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Timothy J Dole whose telephone number is (571)272-2229. The examiner can normally be reached M-F 6:30am-2:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Wellington can be reached at (571)272-4483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Dec 27, 2024
Application Filed
Jul 29, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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MULTILAYER CERAMIC CAPACITOR
1y 11m to grant Granted Jul 21, 2026
Patent 12671034
MULTILAYER CERAMIC CAPACITOR AND METHOD OF FABRICATING THE SAME
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Patent 12658368
MULTILAYER CERAMIC CAPACITOR AND METHOD OF MANUFACTURING THE SAME
2y 2m to grant Granted Jun 16, 2026
Patent 12646655
SILICON CAPACITOR WITH THIN FILM DEPOSITION ON 3D STRUCTURE AND ITS MANUFACTURING METHOD
3y 3m to grant Granted Jun 02, 2026
Patent 12633460
MULTILAYER CERAMIC CAPACITOR INCLUDING DIELECTRIC CERAMIC LAYERS INCLUDING CRYSTAL GRAINS
2y 2m to grant Granted May 19, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
74%
Grant Probability
81%
With Interview (+6.9%)
2y 8m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 274 resolved cases by this examiner. Grant probability derived from career allowance rate.

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